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History log of /src/sys/arch/arm/iomd/iomd_irq.S
RevisionDateAuthorComments
 1.18  21-Nov-2020  skrll Adjust code and register usage so that r4 and r5 are preserved as
cur{cpu,lwp} respectively as required by the change to make ASTs
operate per-LWP rather than per-CPU. These registers are used by
DO_AST_AND_RESTORE_ALIGNMENT_FAULTS expecting this usage.

XXX untested
 1.17  21-Nov-2020  skrll Trailing whitespace
 1.16  02-Dec-2013  joerg branches: 1.16.42;
Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
 1.15  18-Aug-2013  matt Move parts of cpu.h that are not needed by MI code in <arm/locore.h>
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h>
Use <arm/asm.h> instead of <machine/arm.h>
 1.14  29-Aug-2012  matt branches: 1.14.2; 1.14.4;
Avoid using r7 (which is being reserved for a different purpose).
 1.13  20-Dec-2010  matt branches: 1.13.8;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
 1.12  19-Aug-2008  matt branches: 1.12.16;
Re-init r5 at start of loop.
 1.11  27-Apr-2008  matt branches: 1.11.2; 1.11.6;
Merge kernel changes in matt-armv6 to HEAD.
 1.10  08-Jan-2008  matt branches: 1.10.6; 1.10.8; 1.10.10;
As of this commit, all arm32 kernel now build.
 1.9  06-Jan-2008  matt Truly kill current_intr_depth once and for all.
 1.8  17-Oct-2007  garbled branches: 1.8.2; 1.8.8;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
 1.7  13-Aug-2007  tsutsui branches: 1.7.2;
Pull the similar fix from arch/shark/isa/isa_irq.S rev 1.8:

In irq_setmasks(), refer spl_masks[current_spl_level] directly
rather than spl_mask which is a saved value in splraise() and
splx() functions because the latter one is not always sync'ed with
current_spl_level and interrupt state could be mangled.
 1.6  09-Mar-2007  thorpej branches: 1.6.2; 1.6.8; 1.6.10; 1.6.14; 1.6.16; 1.6.18; 1.6.20;
Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing. (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.
 1.5  11-Dec-2005  christos branches: 1.5.26;
merge ktrace-lwp.
 1.4  05-Nov-2003  scw branches: 1.4.16;
Enable/Restore alignment fault state on interrupt handler entry/exit.
 1.3  14-Oct-2002  bjh21 branches: 1.3.8;
Continue the " - . - 8" purge. Specifically:

add rd, pc, #foo - . - 8 -> adr rd, foo
ldr rd, [pc, #foo - . - 8] -> ldr rd, foo

Also, when saving the return address for a function pointer call, use
"mov lr, pc" just before the call unless the return address is somewhere
other than just after the call site.

Finally, a few obvious little micro-optimisations like using LDR directly
rather than ADR followed by LDR, and loading directly into PC rather than
bouncing via R0.
 1.2  20-Dec-2001  thorpej branches: 1.2.2;
* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
between arm26 and arm32.
 1.1  05-Oct-2001  reinoud branches: 1.1.4;
Initial commit of the splitting off of arch/acorn32 from arch/arm32.

The IOMD/VIDC combination is now moved to arch/arm/iomd together. These
files still need a lot of cleaning up :( .... esp. the RC7500 support that
is still dormant in it; this needs either to be removed or split out for
RC7500's ``VIDC'' video/audio variant.

Apart from the RC7500 support wich is still in arch/arm32 the
iomd,vidc,riscpc and podulebus subdirectories of arch/arm32 can be removed.

This split still uses some small parts of arch/arm32 .... those are the MI
parts that haven't been moved yet.

RiscPC/A7000 have been tested and confirmed to build as should NC.
 1.1.4.3  18-Oct-2002  nathanw Catch up to -current.
 1.1.4.2  08-Jan-2002  nathanw Catch up to -current.
 1.1.4.1  05-Oct-2001  nathanw file iomd_irq.S was added on branch nathanw_sa on 2002-01-08 00:23:15 +0000
 1.2.2.2  10-Jan-2002  thorpej Sync kqueue branch with -current.
 1.2.2.1  20-Dec-2001  thorpej file iomd_irq.S was added on branch kqueue on 2002-01-10 19:38:05 +0000
 1.3.8.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.3.8.2  18-Sep-2004  skrll Sync with HEAD.
 1.3.8.1  03-Aug-2004  skrll Sync with HEAD
 1.4.16.2  21-Jan-2008  yamt sync with head
 1.4.16.1  03-Sep-2007  yamt sync with head.
 1.5.26.1  12-Mar-2007  rmind Sync with HEAD.
 1.6.20.3  20-Jan-2008  chris Sync to HEAD.
 1.6.20.2  01-Jan-2008  chris Sync with HEAD.
 1.6.20.1  18-Aug-2007  chris Sync with HEAD
 1.6.18.1  16-Aug-2007  jmcneill Sync with HEAD.
 1.6.16.2  28-Feb-2008  rjs Sync with HEAD.
 1.6.16.1  01-Nov-2007  rjs Sync with HEAD.
 1.6.14.1  15-Aug-2007  skrll Sync with HEAD.
 1.6.10.1  03-Oct-2007  garbled Sync with HEAD
 1.6.8.1  18-Apr-2007  thorpej Remove _lock_cas() in favor of atomic_cas_32().
 1.6.2.1  20-Aug-2007  ad Sync with HEAD.
 1.7.2.4  28-Jan-2008  matt Given the that there are only 4 IPLs (ignoring soft IPLs), a number of
cleanups can be done:
Remove _SPL_* aliases.
Don't store irqmasks in ci_cpl, just make it an ipl level.
Add fast softint switching support.
 1.7.2.3  09-Jan-2008  matt sync with HEAD
 1.7.2.2  09-Nov-2007  matt Make all the evbarm kernels build again. Fix lossage from rebase.
 1.7.2.1  06-Nov-2007  matt sync with HEAD
 1.8.8.1  08-Jan-2008  bouyer Sync with HEAD
 1.8.2.1  18-Feb-2008  mjf Sync with HEAD.
 1.10.10.2  04-May-2009  yamt sync with head.
 1.10.10.1  16-May-2008  yamt sync with head.
 1.10.8.1  18-May-2008  yamt sync with head.
 1.10.6.2  28-Sep-2008  mjf Sync with HEAD.
 1.10.6.1  02-Jun-2008  mjf Sync with HEAD.
 1.11.6.1  19-Oct-2008  haad Sync with HEAD.
 1.11.2.1  18-Sep-2008  wrstuden Sync with wrstuden-revivesa-base-2.
 1.12.16.1  05-Mar-2011  rmind sync with head
 1.13.8.2  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.13.8.1  30-Oct-2012  yamt sync with head
 1.14.4.2  18-May-2014  rmind sync with head
 1.14.4.1  28-Aug-2013  rmind sync with head
 1.14.2.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.16.42.1  14-Dec-2020  thorpej Sync w/ HEAD.

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