iomdkbc.c revision 1.1 1 1.1 bjh21 /* $NetBSD: iomdkbc.c,v 1.1 2004/03/13 17:52:02 bjh21 Exp $ */
2 1.1 bjh21
3 1.1 bjh21 /*-
4 1.1 bjh21 * Copyright (c) 2004 Ben Harris
5 1.1 bjh21 * All rights reserved.
6 1.1 bjh21 *
7 1.1 bjh21 * Redistribution and use in source and binary forms, with or without
8 1.1 bjh21 * modification, are permitted provided that the following conditions
9 1.1 bjh21 * are met:
10 1.1 bjh21 * 1. Redistributions of source code must retain the above copyright
11 1.1 bjh21 * notice, this list of conditions and the following disclaimer.
12 1.1 bjh21 * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 bjh21 * notice, this list of conditions and the following disclaimer in the
14 1.1 bjh21 * documentation and/or other materials provided with the distribution.
15 1.1 bjh21 * 3. The name of the author may not be used to endorse or promote products
16 1.1 bjh21 * derived from this software without specific prior written permission.
17 1.1 bjh21 *
18 1.1 bjh21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 bjh21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 bjh21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 bjh21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 bjh21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.1 bjh21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.1 bjh21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.1 bjh21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.1 bjh21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.1 bjh21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.1 bjh21 */
29 1.1 bjh21
30 1.1 bjh21 #include <sys/cdefs.h>
31 1.1 bjh21 __KERNEL_RCSID(0, "$NetBSD: iomdkbc.c,v 1.1 2004/03/13 17:52:02 bjh21 Exp $");
32 1.1 bjh21
33 1.1 bjh21 #include <sys/param.h>
34 1.1 bjh21 #include <sys/device.h>
35 1.1 bjh21 #include <sys/malloc.h>
36 1.1 bjh21 #include <sys/systm.h>
37 1.1 bjh21
38 1.1 bjh21 #include <dev/pckbport/pckbportvar.h>
39 1.1 bjh21
40 1.1 bjh21 #include <machine/bus.h>
41 1.1 bjh21 #include <machine/intr.h>
42 1.1 bjh21
43 1.1 bjh21 #include <arch/arm/iomd/iomdreg.h>
44 1.1 bjh21 #include <arch/arm/iomd/iomdvar.h>
45 1.1 bjh21 #include <arch/arm/iomd/iomdkbcvar.h>
46 1.1 bjh21
47 1.1 bjh21 /* XXX belongs in iomdreg.h */
48 1.1 bjh21 #define IOMDKBC_TXE 0x80
49 1.1 bjh21 #define IOMDKBC_TXB 0x40
50 1.1 bjh21 #define IOMDKBC_RXF 0x20
51 1.1 bjh21 #define IOMDKBC_RXB 0x10
52 1.1 bjh21 #define IOMDKBC_ENA 0x08
53 1.1 bjh21 #define IOMDKBC_RXP 0x04
54 1.1 bjh21 #define IOMDKBC_DATA 0x02
55 1.1 bjh21 #define IOMDKBC_CLK 0x01
56 1.1 bjh21
57 1.1 bjh21 #define IOMDKBC_DR 0x00
58 1.1 bjh21 #define IOMDKBC_CR 0x01
59 1.1 bjh21
60 1.1 bjh21 #define KBC_DEVCMD_ACK 0xfa
61 1.1 bjh21 #define KBC_DEVCMD_RESEND 0xfe
62 1.1 bjh21
63 1.1 bjh21 struct iomdkbc_softc {
64 1.1 bjh21 struct device sc_dev;
65 1.1 bjh21 struct iomdkbc_internal *sc_id;
66 1.1 bjh21 };
67 1.1 bjh21
68 1.1 bjh21 struct iomdkbc_internal {
69 1.1 bjh21 struct iomdkbc_softc *t_sc;
70 1.1 bjh21 struct pckbport_tag *t_pt;
71 1.1 bjh21
72 1.1 bjh21 int t_haveport[PCKBPORT_NSLOTS];
73 1.1 bjh21 bus_space_tag_t t_iot;
74 1.1 bjh21 bus_space_handle_t t_ioh[PCKBPORT_NSLOTS];
75 1.1 bjh21
76 1.1 bjh21 void *t_rxih[PCKBPORT_NSLOTS];
77 1.1 bjh21 int t_rxirq[PCKBPORT_NSLOTS];
78 1.1 bjh21 };
79 1.1 bjh21
80 1.1 bjh21 static int iomdkbc_match(struct device *, struct cfdata *, void *);
81 1.1 bjh21 static void iomdkbc_attach(struct device *, struct device *, void *);
82 1.1 bjh21
83 1.1 bjh21 static int iomdkbc_xt_translation(void *, pckbport_slot_t, int);
84 1.1 bjh21 static int iomdkbc_send_devcmd(void *, pckbport_slot_t, u_char);
85 1.1 bjh21 static int iomdkbc_poll_data1(void *, pckbport_slot_t);
86 1.1 bjh21 static void iomdkbc_slot_enable(void *, pckbport_slot_t, int);
87 1.1 bjh21 static void iomdkbc_intr_establish(void *, pckbport_slot_t);
88 1.1 bjh21 static void iomdkbc_set_poll(void *, pckbport_slot_t, int);
89 1.1 bjh21
90 1.1 bjh21 static int iomdkbc_intr(void *);
91 1.1 bjh21
92 1.1 bjh21 CFATTACH_DECL(iomdkbc, sizeof(struct iomdkbc_softc),
93 1.1 bjh21 iomdkbc_match, iomdkbc_attach, NULL, NULL);
94 1.1 bjh21
95 1.1 bjh21 static struct pckbport_accessops const iomdkbc_ops = {
96 1.1 bjh21 iomdkbc_xt_translation,
97 1.1 bjh21 iomdkbc_send_devcmd,
98 1.1 bjh21 iomdkbc_poll_data1,
99 1.1 bjh21 iomdkbc_slot_enable,
100 1.1 bjh21 iomdkbc_intr_establish,
101 1.1 bjh21 iomdkbc_set_poll
102 1.1 bjh21 };
103 1.1 bjh21
104 1.1 bjh21 static struct iomdkbc_internal iomdkbc_cntag;
105 1.1 bjh21
106 1.1 bjh21 static int
107 1.1 bjh21 iomdkbc_match(struct device *parent, struct cfdata *cf, void *aux)
108 1.1 bjh21 {
109 1.1 bjh21 struct kbd_attach_args *ka = aux;
110 1.1 bjh21 struct opms_attach_args *pa = aux;
111 1.1 bjh21
112 1.1 bjh21 if (strcmp(ka->ka_name, "kbd") == 0 ||
113 1.1 bjh21 strcmp(pa->pa_name, "opms") == 0)
114 1.1 bjh21 return 1;
115 1.1 bjh21 return 0;
116 1.1 bjh21 }
117 1.1 bjh21
118 1.1 bjh21 static void
119 1.1 bjh21 iomdkbc_attach(struct device *parent, struct device *self, void *aux)
120 1.1 bjh21 {
121 1.1 bjh21 struct kbd_attach_args *ka = aux;
122 1.1 bjh21 struct opms_attach_args *pa = aux;
123 1.1 bjh21 struct iomdkbc_softc *sc = (struct iomdkbc_softc *)self;
124 1.1 bjh21 struct iomdkbc_internal *t;
125 1.1 bjh21
126 1.1 bjh21 printf("\n");
127 1.1 bjh21
128 1.1 bjh21 t = NULL;
129 1.1 bjh21 if (strcmp(ka->ka_name, "kbd") == 0) {
130 1.1 bjh21 /* XXX not really right, but good enough. */
131 1.1 bjh21 if (iomdkbc_cntag.t_haveport[PCKBPORT_KBD_SLOT]) {
132 1.1 bjh21 /* Have an iomdkbc as console. Assume it's this one.*/
133 1.1 bjh21 t = &iomdkbc_cntag;
134 1.1 bjh21 } else {
135 1.1 bjh21 t = malloc(sizeof(struct iomdkbc_internal), M_DEVBUF,
136 1.1 bjh21 M_NOWAIT | M_ZERO);
137 1.1 bjh21 if (t == NULL) {
138 1.1 bjh21 aprint_error(": no memory");
139 1.1 bjh21 return;
140 1.1 bjh21 }
141 1.1 bjh21 t->t_haveport[PCKBPORT_KBD_SLOT] = 1;
142 1.1 bjh21 t->t_iot = ka->ka_iot;
143 1.1 bjh21 t->t_ioh[PCKBPORT_KBD_SLOT] = ka->ka_ioh;
144 1.1 bjh21 }
145 1.1 bjh21 t->t_rxih[PCKBPORT_KBD_SLOT] = intr_claim(ka->ka_rxirq,
146 1.1 bjh21 IPL_TTY, sc->sc_dev.dv_xname, iomdkbc_intr, t);
147 1.1 bjh21 t->t_rxirq[PCKBPORT_KBD_SLOT] = ka->ka_rxirq;
148 1.1 bjh21 disable_irq(t->t_rxirq[PCKBPORT_KBD_SLOT]);
149 1.1 bjh21 sc->sc_id = t;
150 1.1 bjh21 t->t_sc = sc;
151 1.1 bjh21 t->t_pt = pckbport_attach(t, &iomdkbc_ops);
152 1.1 bjh21 pckbport_attach_slot(&sc->sc_dev, t->t_pt, PCKBPORT_KBD_SLOT);
153 1.1 bjh21 }
154 1.1 bjh21
155 1.1 bjh21 if (strcmp(pa->pa_name, "opms") == 0) {
156 1.1 bjh21 if (t == NULL) {
157 1.1 bjh21 t = malloc(sizeof(struct iomdkbc_internal), M_DEVBUF,
158 1.1 bjh21 M_NOWAIT | M_ZERO);
159 1.1 bjh21 if (t == NULL) {
160 1.1 bjh21 aprint_error(": no memory");
161 1.1 bjh21 return;
162 1.1 bjh21 }
163 1.1 bjh21 }
164 1.1 bjh21 t->t_haveport[PCKBPORT_AUX_SLOT] = 1;
165 1.1 bjh21 t->t_iot = pa->pa_iot;
166 1.1 bjh21 t->t_ioh[PCKBPORT_AUX_SLOT] = pa->pa_ioh;
167 1.1 bjh21 t->t_rxih[PCKBPORT_AUX_SLOT] = intr_claim(pa->pa_irq,
168 1.1 bjh21 IPL_TTY, sc->sc_dev.dv_xname, iomdkbc_intr, t);
169 1.1 bjh21 t->t_rxirq[PCKBPORT_AUX_SLOT] = pa->pa_irq;
170 1.1 bjh21 disable_irq(t->t_rxirq[PCKBPORT_AUX_SLOT]);
171 1.1 bjh21 sc->sc_id = t;
172 1.1 bjh21 t->t_sc = sc;
173 1.1 bjh21 if (t->t_pt == NULL)
174 1.1 bjh21 t->t_pt = pckbport_attach(t, &iomdkbc_ops);
175 1.1 bjh21 pckbport_attach_slot(&sc->sc_dev, t->t_pt, PCKBPORT_AUX_SLOT);
176 1.1 bjh21 }
177 1.1 bjh21 }
178 1.1 bjh21
179 1.1 bjh21 static int
180 1.1 bjh21 iomdkbc_send_devcmd(void *cookie, pckbport_slot_t slot, u_char cmd)
181 1.1 bjh21 {
182 1.1 bjh21 struct iomdkbc_internal *t = cookie;
183 1.1 bjh21 bus_space_tag_t iot = t->t_iot;
184 1.1 bjh21 bus_space_handle_t ioh = t->t_ioh[slot];
185 1.1 bjh21 int timeout;
186 1.1 bjh21
187 1.1 bjh21 timeout = 10000;
188 1.1 bjh21 while ((bus_space_read_1(iot, ioh, IOMDKBC_CR) &
189 1.1 bjh21 IOMDKBC_TXE) == 0) {
190 1.1 bjh21 DELAY(10);
191 1.1 bjh21 if (--timeout == 0) return 0;
192 1.1 bjh21 }
193 1.1 bjh21
194 1.1 bjh21 bus_space_write_1(iot, ioh, IOMDKBC_DR, cmd);
195 1.1 bjh21 return 1;
196 1.1 bjh21 }
197 1.1 bjh21
198 1.1 bjh21 static int
199 1.1 bjh21 iomdkbc_poll_data1(void *cookie, pckbport_slot_t slot)
200 1.1 bjh21 {
201 1.1 bjh21 struct iomdkbc_internal *t = cookie;
202 1.1 bjh21 bus_space_tag_t iot = t->t_iot;
203 1.1 bjh21 bus_space_handle_t ioh = t->t_ioh[slot];
204 1.1 bjh21 int timeout;
205 1.1 bjh21
206 1.1 bjh21 timeout = 10000;
207 1.1 bjh21 while ((bus_space_read_1(iot, ioh, IOMDKBC_CR) &
208 1.1 bjh21 IOMDKBC_RXF) == 0) {
209 1.1 bjh21 DELAY(10);
210 1.1 bjh21 if (--timeout == 0) return -1;
211 1.1 bjh21 }
212 1.1 bjh21
213 1.1 bjh21 return bus_space_read_1(iot, ioh, IOMDKBC_DR);
214 1.1 bjh21 }
215 1.1 bjh21
216 1.1 bjh21 /*
217 1.1 bjh21 * switch scancode translation on / off
218 1.1 bjh21 * return nonzero on success
219 1.1 bjh21 */
220 1.1 bjh21 static int
221 1.1 bjh21 iomdkbc_xt_translation(void *cookie, pckbport_slot_t slot, int on)
222 1.1 bjh21 {
223 1.1 bjh21
224 1.1 bjh21 if (on)
225 1.1 bjh21 return 0; /* Can't do XT translation */
226 1.1 bjh21 else
227 1.1 bjh21 return 1;
228 1.1 bjh21 }
229 1.1 bjh21
230 1.1 bjh21 static void
231 1.1 bjh21 iomdkbc_slot_enable(void *cookie, pckbport_slot_t slot, int on)
232 1.1 bjh21 {
233 1.1 bjh21 struct iomdkbc_internal *t = cookie;
234 1.1 bjh21 bus_space_tag_t iot = t->t_iot;
235 1.1 bjh21 bus_space_handle_t ioh = t->t_ioh[slot];
236 1.1 bjh21
237 1.1 bjh21 bus_space_write_1(iot, ioh, IOMDKBC_CR, on ? IOMDKBC_ENA : 0);
238 1.1 bjh21 }
239 1.1 bjh21
240 1.1 bjh21
241 1.1 bjh21 static void
242 1.1 bjh21 iomdkbc_intr_establish(void *cookie, pckbport_slot_t slot)
243 1.1 bjh21 {
244 1.1 bjh21 struct iomdkbc_internal *t = cookie;
245 1.1 bjh21
246 1.1 bjh21 enable_irq(t->t_rxirq[slot]);
247 1.1 bjh21 }
248 1.1 bjh21
249 1.1 bjh21 static void
250 1.1 bjh21 iomdkbc_set_poll(void *cookie, pckbport_slot_t slot, int on)
251 1.1 bjh21 {
252 1.1 bjh21 struct iomdkbc_internal *t = cookie;
253 1.1 bjh21
254 1.1 bjh21 if (on)
255 1.1 bjh21 enable_irq(t->t_rxirq[slot]);
256 1.1 bjh21 else
257 1.1 bjh21 disable_irq(t->t_rxirq[slot]);
258 1.1 bjh21 }
259 1.1 bjh21
260 1.1 bjh21 static int
261 1.1 bjh21 iomdkbc_intr(void *self)
262 1.1 bjh21 {
263 1.1 bjh21 struct iomdkbc_internal *t = self;
264 1.1 bjh21 bus_space_tag_t iot = t->t_iot;
265 1.1 bjh21 bus_space_handle_t ioh;
266 1.1 bjh21 unsigned i;
267 1.1 bjh21 int stat, ret;
268 1.1 bjh21
269 1.1 bjh21 ret = 0;
270 1.1 bjh21 for (i = 0; i < PCKBPORT_NSLOTS; i++)
271 1.1 bjh21 if (t->t_haveport[i]) {
272 1.1 bjh21 ioh = t->t_ioh[i];
273 1.1 bjh21 stat = bus_space_read_1(iot, ioh, IOMDKBC_CR);
274 1.1 bjh21 if ((stat & IOMDKBC_RXF) == 0)
275 1.1 bjh21 continue;
276 1.1 bjh21 pckbportintr(t->t_pt, i,
277 1.1 bjh21 bus_space_read_1(iot, ioh, IOMDKBC_DR));
278 1.1 bjh21 ret = 1;
279 1.1 bjh21 }
280 1.1 bjh21
281 1.1 bjh21 return ret;
282 1.1 bjh21 }
283 1.1 bjh21
284 1.1 bjh21 int
285 1.1 bjh21 iomdkbc_cnattach(bus_space_tag_t iot, bus_addr_t addr, int slot)
286 1.1 bjh21 {
287 1.1 bjh21 struct iomdkbc_internal *t = &iomdkbc_cntag;
288 1.1 bjh21
289 1.1 bjh21 t->t_iot = iot;
290 1.1 bjh21 bus_space_map(iot, addr, 2, 0, &t->t_ioh[slot]);
291 1.1 bjh21 t->t_haveport[slot] = 1;
292 1.1 bjh21 iomdkbc_slot_enable(t, slot, 1);
293 1.1 bjh21 return pckbport_cnattach(t, &iomdkbc_ops, slot);
294 1.1 bjh21 }
295