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tegra_ahcisata.c revision 1.1
      1  1.1  jmcneill /* $NetBSD: tegra_ahcisata.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  jmcneill  * SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill #include "locators.h"
     30  1.1  jmcneill 
     31  1.1  jmcneill #include <sys/cdefs.h>
     32  1.1  jmcneill __KERNEL_RCSID(0, "$NetBSD: tegra_ahcisata.c,v 1.1 2015/03/29 10:41:59 jmcneill Exp $");
     33  1.1  jmcneill 
     34  1.1  jmcneill #include <sys/param.h>
     35  1.1  jmcneill #include <sys/bus.h>
     36  1.1  jmcneill #include <sys/device.h>
     37  1.1  jmcneill #include <sys/intr.h>
     38  1.1  jmcneill #include <sys/systm.h>
     39  1.1  jmcneill #include <sys/kernel.h>
     40  1.1  jmcneill 
     41  1.1  jmcneill #include <dev/ata/atavar.h>
     42  1.1  jmcneill #include <dev/ic/ahcisatavar.h>
     43  1.1  jmcneill 
     44  1.1  jmcneill #include <arm/nvidia/tegra_var.h>
     45  1.1  jmcneill 
     46  1.1  jmcneill static int	tegra_ahcisata_match(device_t, cfdata_t, void *);
     47  1.1  jmcneill static void	tegra_ahcisata_attach(device_t, device_t, void *);
     48  1.1  jmcneill 
     49  1.1  jmcneill struct tegra_ahcisata_softc {
     50  1.1  jmcneill 	struct ahci_softc	sc;
     51  1.1  jmcneill 	void			*sc_ih;
     52  1.1  jmcneill };
     53  1.1  jmcneill 
     54  1.1  jmcneill CFATTACH_DECL_NEW(tegra_ahcisata, sizeof(struct tegra_ahcisata_softc),
     55  1.1  jmcneill 	tegra_ahcisata_match, tegra_ahcisata_attach, NULL, NULL);
     56  1.1  jmcneill 
     57  1.1  jmcneill static int
     58  1.1  jmcneill tegra_ahcisata_match(device_t parent, cfdata_t cf, void *aux)
     59  1.1  jmcneill {
     60  1.1  jmcneill 	return 1;
     61  1.1  jmcneill }
     62  1.1  jmcneill 
     63  1.1  jmcneill static void
     64  1.1  jmcneill tegra_ahcisata_attach(device_t parent, device_t self, void *aux)
     65  1.1  jmcneill {
     66  1.1  jmcneill 	struct tegra_ahcisata_softc * const sc = device_private(self);
     67  1.1  jmcneill 	struct tegraio_attach_args * const tio = aux;
     68  1.1  jmcneill 	const struct tegra_locators * const loc = &tio->tio_loc;
     69  1.1  jmcneill 
     70  1.1  jmcneill 	sc->sc.sc_atac.atac_dev = self;
     71  1.1  jmcneill 	sc->sc.sc_dmat = tio->tio_dmat;
     72  1.1  jmcneill 	sc->sc.sc_ahcit = tio->tio_bst;
     73  1.1  jmcneill 	bus_space_subregion(tio->tio_bst, tio->tio_bsh,
     74  1.1  jmcneill 	    loc->loc_offset, loc->loc_size, &sc->sc.sc_ahcis);
     75  1.1  jmcneill 	sc->sc.sc_ahci_ports = 1;
     76  1.1  jmcneill 
     77  1.1  jmcneill 	aprint_naive("\n");
     78  1.1  jmcneill 	aprint_normal(": SATA\n");
     79  1.1  jmcneill 
     80  1.1  jmcneill 	sc->sc_ih = intr_establish(loc->loc_intr, IPL_BIO, IST_LEVEL,
     81  1.1  jmcneill 	    ahci_intr, &sc->sc);
     82  1.1  jmcneill 	if (sc->sc_ih == NULL) {
     83  1.1  jmcneill 		aprint_error_dev(self, "couldn't establish interrupt %d\n",
     84  1.1  jmcneill 		    loc->loc_intr);
     85  1.1  jmcneill 		return;
     86  1.1  jmcneill 	}
     87  1.1  jmcneill 	aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr);
     88  1.1  jmcneill 
     89  1.1  jmcneill 	ahci_attach(&sc->sc);
     90  1.1  jmcneill }
     91