tegra_com.c revision 1.6 1 /* $NetBSD: tegra_com.c,v 1.6 2017/05/25 23:42:44 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33
34 __KERNEL_RCSID(1, "$NetBSD: tegra_com.c,v 1.6 2017/05/25 23:42:44 jmcneill Exp $");
35
36 #include <sys/param.h>
37 #include <sys/bus.h>
38 #include <sys/device.h>
39 #include <sys/intr.h>
40 #include <sys/systm.h>
41 #include <sys/time.h>
42 #include <sys/termios.h>
43
44 #include <arm/nvidia/tegra_reg.h>
45 #include <arm/nvidia/tegra_var.h>
46
47 #include <dev/ic/comvar.h>
48
49 #include <dev/fdt/fdtvar.h>
50
51 static int tegra_com_match(device_t, cfdata_t, void *);
52 static void tegra_com_attach(device_t, device_t, void *);
53
54 struct tegra_com_softc {
55 struct com_softc tsc_sc;
56 void *tsc_ih;
57
58 struct clk *tsc_clk;
59 struct fdtbus_reset *tsc_rst;
60 };
61
62 CFATTACH_DECL_NEW(tegra_com, sizeof(struct tegra_com_softc),
63 tegra_com_match, tegra_com_attach, NULL, NULL);
64
65 static int
66 tegra_com_match(device_t parent, cfdata_t cf, void *aux)
67 {
68 const char * const compatible[] = {
69 "nvidia,tegra210-uart",
70 "nvidia,tegra124-uart",
71 "nvidia,tegra20-uart",
72 NULL
73 };
74 struct fdt_attach_args * const faa = aux;
75
76 return of_match_compatible(faa->faa_phandle, compatible);
77 }
78
79 static void
80 tegra_com_attach(device_t parent, device_t self, void *aux)
81 {
82 struct tegra_com_softc * const tsc = device_private(self);
83 struct com_softc * const sc = &tsc->tsc_sc;
84 struct fdt_attach_args * const faa = aux;
85 bus_space_handle_t bsh;
86 bus_space_tag_t bst;
87 char intrstr[128];
88 bus_addr_t addr;
89 bus_size_t size;
90 u_int reg_shift;
91 int error;
92
93 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
94 aprint_error(": couldn't get registers\n");
95 return;
96 }
97
98 if (of_getprop_uint32(faa->faa_phandle, "reg-shift", ®_shift)) {
99 /* missing or bad reg-shift property, assume 2 */
100 bst = faa->faa_a4x_bst;
101 } else {
102 if (reg_shift == 2) {
103 bst = faa->faa_a4x_bst;
104 } else if (reg_shift == 0) {
105 bst = faa->faa_bst;
106 } else {
107 aprint_error(": unsupported reg-shift value %d\n",
108 reg_shift);
109 return;
110 }
111 }
112
113 sc->sc_dev = self;
114
115 tsc->tsc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0);
116 tsc->tsc_rst = fdtbus_reset_get(faa->faa_phandle, "serial");
117
118 if (tsc->tsc_clk == NULL) {
119 aprint_error(": couldn't get frequency\n");
120 return;
121 }
122
123 sc->sc_frequency = clk_get_rate(tsc->tsc_clk);
124 sc->sc_type = COM_TYPE_TEGRA;
125
126 error = bus_space_map(bst, addr, size, 0, &bsh);
127 if (error) {
128 aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error);
129 return;
130 }
131
132 COM_INIT_REGS(sc->sc_regs, bst, bsh, addr);
133
134 com_attach_subr(sc);
135 aprint_naive("\n");
136
137 if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) {
138 aprint_error_dev(self, "failed to decode interrupt\n");
139 return;
140 }
141
142 tsc->tsc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SERIAL,
143 FDT_INTR_MPSAFE, comintr, sc);
144 if (tsc->tsc_ih == NULL) {
145 aprint_error_dev(self, "failed to establish interrupt on %s\n",
146 intrstr);
147 }
148 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
149 }
150