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tegra_platform.c revision 1.17
      1  1.17     skrll /* $NetBSD: tegra_platform.c,v 1.17 2018/10/18 09:01:53 skrll Exp $ */
      2   1.1  jmcneill 
      3   1.1  jmcneill /*-
      4   1.1  jmcneill  * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
      5   1.1  jmcneill  * All rights reserved.
      6   1.1  jmcneill  *
      7   1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8   1.1  jmcneill  * modification, are permitted provided that the following conditions
      9   1.1  jmcneill  * are met:
     10   1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11   1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12   1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14   1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15   1.1  jmcneill  *
     16   1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17   1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18   1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19   1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20   1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21   1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22   1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23   1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24   1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25   1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26   1.1  jmcneill  * SUCH DAMAGE.
     27   1.1  jmcneill  */
     28   1.1  jmcneill 
     29  1.17     skrll #include "opt_arm_debug.h"
     30  1.17     skrll #include "opt_console.h"
     31  1.17     skrll #include "opt_multiprocessor.h"
     32   1.1  jmcneill #include "opt_tegra.h"
     33   1.1  jmcneill 
     34   1.1  jmcneill #include "ukbd.h"
     35   1.1  jmcneill 
     36   1.1  jmcneill #include <sys/cdefs.h>
     37  1.17     skrll __KERNEL_RCSID(0, "$NetBSD: tegra_platform.c,v 1.17 2018/10/18 09:01:53 skrll Exp $");
     38   1.1  jmcneill 
     39   1.1  jmcneill #include <sys/param.h>
     40   1.1  jmcneill #include <sys/bus.h>
     41   1.1  jmcneill #include <sys/cpu.h>
     42   1.1  jmcneill #include <sys/device.h>
     43   1.1  jmcneill #include <sys/termios.h>
     44   1.1  jmcneill 
     45   1.1  jmcneill #include <dev/fdt/fdtvar.h>
     46   1.1  jmcneill 
     47   1.1  jmcneill #include <uvm/uvm_extern.h>
     48   1.1  jmcneill 
     49   1.1  jmcneill #include <machine/bootconfig.h>
     50   1.1  jmcneill #include <arm/cpufunc.h>
     51   1.1  jmcneill 
     52   1.1  jmcneill #include <arm/nvidia/tegra_reg.h>
     53   1.1  jmcneill #include <arm/nvidia/tegra_var.h>
     54  1.11       ryo #include <arm/nvidia/tegra_platform.h>
     55   1.1  jmcneill 
     56   1.3  jmcneill #include <arm/fdt/arm_fdtvar.h>
     57   1.1  jmcneill 
     58  1.12  jmcneill #include <arm/arm/psci.h>
     59  1.15       ryo #include <arm/fdt/psci_fdtvar.h>
     60  1.12  jmcneill 
     61   1.1  jmcneill #if NUKBD > 0
     62   1.1  jmcneill #include <dev/usb/ukbdvar.h>
     63   1.1  jmcneill #endif
     64   1.1  jmcneill 
     65   1.4  jmcneill #include <dev/ic/ns16550reg.h>
     66   1.4  jmcneill #include <dev/ic/comreg.h>
     67   1.4  jmcneill 
     68   1.6  jmcneill #define	PLLP_OUT0_FREQ	408000000
     69   1.6  jmcneill 
     70  1.11       ryo void tegra_platform_early_putchar(char);
     71  1.11       ryo 
     72   1.1  jmcneill static const struct pmap_devmap *
     73   1.1  jmcneill tegra_platform_devmap(void)
     74   1.1  jmcneill {
     75   1.1  jmcneill 	static const struct pmap_devmap devmap[] = {
     76   1.1  jmcneill 		DEVMAP_ENTRY(TEGRA_HOST1X_VBASE,
     77   1.1  jmcneill 			     TEGRA_HOST1X_BASE,
     78   1.1  jmcneill 			     TEGRA_HOST1X_SIZE),
     79   1.1  jmcneill 		DEVMAP_ENTRY(TEGRA_PPSB_VBASE,
     80   1.1  jmcneill 			     TEGRA_PPSB_BASE,
     81   1.1  jmcneill 			     TEGRA_PPSB_SIZE),
     82   1.1  jmcneill 		DEVMAP_ENTRY(TEGRA_APB_VBASE,
     83   1.1  jmcneill 			     TEGRA_APB_BASE,
     84   1.1  jmcneill 			     TEGRA_APB_SIZE),
     85   1.1  jmcneill 		DEVMAP_ENTRY(TEGRA_AHB_A2_VBASE,
     86   1.1  jmcneill 			     TEGRA_AHB_A2_BASE,
     87   1.1  jmcneill 			     TEGRA_AHB_A2_SIZE),
     88   1.1  jmcneill 		DEVMAP_ENTRY_END
     89   1.9     skrll 	};
     90   1.1  jmcneill 
     91   1.1  jmcneill 	return devmap;
     92   1.1  jmcneill }
     93   1.1  jmcneill 
     94  1.17     skrll #if defined(SOC_TEGRA124)
     95   1.1  jmcneill static void
     96   1.7  jmcneill tegra124_platform_bootstrap(void)
     97   1.1  jmcneill {
     98  1.11       ryo #ifdef MULTIPROCESSOR
     99  1.17     skrll 	arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
    100  1.11       ryo #endif
    101  1.17     skrll 
    102  1.17     skrll 	tegra_bootstrap();
    103   1.7  jmcneill }
    104  1.12  jmcneill #endif
    105   1.7  jmcneill 
    106  1.17     skrll #if defined(SOC_TEGRA210)
    107   1.7  jmcneill static void
    108   1.7  jmcneill tegra210_platform_bootstrap(void)
    109   1.7  jmcneill {
    110  1.17     skrll 
    111   1.7  jmcneill 	tegra_bootstrap();
    112  1.17     skrll }
    113  1.17     skrll 
    114  1.17     skrll static void
    115  1.17     skrll tegra210_platform_mpstart(void)
    116  1.17     skrll {
    117   1.7  jmcneill 
    118  1.13  jmcneill #if defined(MULTIPROCESSOR) && defined(__aarch64__)
    119  1.15       ryo 	arm_fdt_cpu_bootstrap();
    120  1.11       ryo #endif
    121   1.1  jmcneill }
    122  1.12  jmcneill #endif
    123   1.1  jmcneill 
    124   1.1  jmcneill static void
    125   1.2  jmcneill tegra_platform_init_attach_args(struct fdt_attach_args *faa)
    126   1.2  jmcneill {
    127  1.11       ryo 	extern struct bus_space arm_generic_bs_tag;
    128  1.11       ryo 	extern struct bus_space arm_generic_a4x_bs_tag;
    129  1.10       ryo 	extern struct arm32_bus_dma_tag arm_generic_dma_tag;
    130   1.2  jmcneill 
    131  1.11       ryo 	faa->faa_bst = &arm_generic_bs_tag;
    132  1.11       ryo 	faa->faa_a4x_bst = &arm_generic_a4x_bs_tag;
    133  1.10       ryo 	faa->faa_dmat = &arm_generic_dma_tag;
    134   1.2  jmcneill }
    135   1.2  jmcneill 
    136  1.11       ryo void
    137   1.1  jmcneill tegra_platform_early_putchar(char c)
    138   1.1  jmcneill {
    139   1.1  jmcneill #ifdef CONSADDR
    140   1.1  jmcneill #define CONSADDR_VA	(CONSADDR - TEGRA_APB_BASE + TEGRA_APB_VBASE)
    141  1.11       ryo 
    142  1.11       ryo 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    143  1.11       ryo 	    (volatile uint32_t *)CONSADDR_VA :
    144  1.11       ryo 	    (volatile uint32_t *)CONSADDR;
    145   1.1  jmcneill 
    146   1.1  jmcneill 	while ((uartaddr[com_lsr] & LSR_TXRDY) == 0)
    147   1.1  jmcneill 		;
    148   1.1  jmcneill 
    149   1.1  jmcneill 	uartaddr[com_data] = c;
    150   1.1  jmcneill #endif
    151   1.1  jmcneill }
    152   1.1  jmcneill 
    153   1.1  jmcneill static void
    154   1.1  jmcneill tegra_platform_device_register(device_t self, void *aux)
    155   1.1  jmcneill {
    156   1.1  jmcneill 	prop_dictionary_t dict = device_properties(self);
    157   1.1  jmcneill 
    158   1.1  jmcneill 	if (device_is_a(self, "tegrafb") &&
    159   1.1  jmcneill 	    match_bootconf_option(boot_args, "console", "fb")) {
    160   1.1  jmcneill 		prop_dictionary_set_bool(dict, "is_console", true);
    161   1.1  jmcneill #if NUKBD > 0
    162   1.1  jmcneill 		ukbd_cnattach();
    163   1.1  jmcneill #endif
    164   1.1  jmcneill 	}
    165   1.1  jmcneill 
    166   1.1  jmcneill 	if (device_is_a(self, "tegradrm")) {
    167   1.1  jmcneill 		const char *video = get_bootconf_string(boot_args, "video");
    168   1.1  jmcneill 		if (video)
    169   1.1  jmcneill 			prop_dictionary_set_cstring(dict, "HDMI-A-1", video);
    170   1.1  jmcneill 		if (match_bootconf_option(boot_args, "hdmi.forcemode", "dvi"))
    171   1.1  jmcneill 			prop_dictionary_set_bool(dict, "force-dvi", true);
    172   1.1  jmcneill 	}
    173   1.1  jmcneill 
    174   1.1  jmcneill 	if (device_is_a(self, "tegracec"))
    175   1.1  jmcneill 		prop_dictionary_set_cstring(dict, "hdmi-device", "tegradrm0");
    176   1.1  jmcneill 
    177   1.1  jmcneill 	if (device_is_a(self, "nouveau")) {
    178   1.1  jmcneill 		const char *config = get_bootconf_string(boot_args,
    179   1.1  jmcneill 		    "nouveau.config");
    180   1.1  jmcneill 		if (config)
    181   1.1  jmcneill 			prop_dictionary_set_cstring(dict, "config", config);
    182   1.1  jmcneill 		const char *debug = get_bootconf_string(boot_args,
    183   1.1  jmcneill 		    "nouveau.debug");
    184   1.1  jmcneill 		if (debug)
    185   1.1  jmcneill 			prop_dictionary_set_cstring(dict, "debug", debug);
    186   1.1  jmcneill 	}
    187   1.1  jmcneill 
    188   1.1  jmcneill 	if (device_is_a(self, "tegrapcie")) {
    189   1.1  jmcneill 		const char * const jetsontk1_compat[] = {
    190   1.1  jmcneill 		    "nvidia,jetson-tk1", NULL
    191   1.1  jmcneill 		};
    192   1.1  jmcneill 		const int phandle = OF_peer(0);
    193   1.1  jmcneill 		if (of_match_compatible(phandle, jetsontk1_compat)) {
    194   1.1  jmcneill 			/* rfkill GPIO at GPIO X7 */
    195   1.1  jmcneill 			struct tegra_gpio_pin *pin =
    196   1.1  jmcneill 			    tegra_gpio_acquire("X7", GPIO_PIN_OUTPUT);
    197   1.1  jmcneill 			if (pin)
    198   1.1  jmcneill 				tegra_gpio_write(pin, 1);
    199   1.1  jmcneill 		}
    200   1.1  jmcneill 	}
    201   1.1  jmcneill }
    202   1.1  jmcneill 
    203   1.1  jmcneill static void
    204   1.1  jmcneill tegra_platform_reset(void)
    205   1.1  jmcneill {
    206   1.1  jmcneill 	tegra_pmc_reset();
    207   1.1  jmcneill }
    208   1.1  jmcneill 
    209   1.5  jmcneill static void
    210   1.5  jmcneill tegra_platform_delay(u_int us)
    211   1.5  jmcneill {
    212   1.5  jmcneill 	tegra_timer_delay(us);
    213   1.5  jmcneill }
    214   1.5  jmcneill 
    215   1.6  jmcneill static u_int
    216   1.6  jmcneill tegra_platform_uart_freq(void)
    217   1.6  jmcneill {
    218   1.6  jmcneill 	return PLLP_OUT0_FREQ;
    219   1.6  jmcneill }
    220   1.6  jmcneill 
    221  1.17     skrll #if defined(SOC_TEGRA124)
    222   1.7  jmcneill static const struct arm_platform tegra124_platform = {
    223  1.14     skrll 	.ap_devmap = tegra_platform_devmap,
    224  1.14     skrll 	.ap_bootstrap = tegra124_platform_bootstrap,
    225  1.14     skrll 	.ap_init_attach_args = tegra_platform_init_attach_args,
    226  1.14     skrll 	.ap_early_putchar = tegra_platform_early_putchar,
    227  1.14     skrll 	.ap_device_register = tegra_platform_device_register,
    228  1.14     skrll 	.ap_reset = tegra_platform_reset,
    229  1.14     skrll 	.ap_delay = tegra_platform_delay,
    230  1.14     skrll 	.ap_uart_freq = tegra_platform_uart_freq,
    231  1.17     skrll 	.ap_mpstart = tegra124_mpstart,
    232   1.7  jmcneill };
    233   1.7  jmcneill 
    234   1.7  jmcneill ARM_PLATFORM(tegra124, "nvidia,tegra124", &tegra124_platform);
    235  1.12  jmcneill #endif
    236   1.7  jmcneill 
    237  1.17     skrll #if defined(SOC_TEGRA210)
    238   1.7  jmcneill static const struct arm_platform tegra210_platform = {
    239  1.14     skrll 	.ap_devmap = tegra_platform_devmap,
    240  1.14     skrll 	.ap_bootstrap = tegra210_platform_bootstrap,
    241  1.14     skrll 	.ap_init_attach_args = tegra_platform_init_attach_args,
    242  1.14     skrll 	.ap_early_putchar = tegra_platform_early_putchar,
    243  1.14     skrll 	.ap_device_register = tegra_platform_device_register,
    244  1.14     skrll 	.ap_reset = tegra_platform_reset,
    245  1.14     skrll 	.ap_delay = tegra_platform_delay,
    246  1.14     skrll 	.ap_uart_freq = tegra_platform_uart_freq,
    247  1.17     skrll 	.ap_mpstart = tegra210_platform_mpstart,
    248   1.1  jmcneill };
    249   1.1  jmcneill 
    250   1.7  jmcneill ARM_PLATFORM(tegra210, "nvidia,tegra210", &tegra210_platform);
    251  1.12  jmcneill #endif
    252