tegra_platform.c revision 1.2
1 /* $NetBSD: tegra_platform.c,v 1.2 2017/05/29 23:13:03 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_tegra.h" 30 #include "opt_multiprocessor.h" 31 32 #include "com.h" 33 #include "ukbd.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: tegra_platform.c,v 1.2 2017/05/29 23:13:03 jmcneill Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/termios.h> 43 44 #include <dev/fdt/fdtvar.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/bootconfig.h> 49 #include <arm/cpufunc.h> 50 51 #include <arm/nvidia/tegra_reg.h> 52 #include <arm/nvidia/tegra_var.h> 53 54 #include <arm/fdt/armv7_fdtvar.h> 55 56 #if NUKBD > 0 57 #include <dev/usb/ukbdvar.h> 58 #endif 59 60 #define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET) 61 #define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE) 62 #define DEVMAP_ENTRY(va, pa, sz) \ 63 { \ 64 .pd_va = DEVMAP_ALIGN(va), \ 65 .pd_pa = DEVMAP_ALIGN(pa), \ 66 .pd_size = DEVMAP_SIZE(sz), \ 67 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ 68 .pd_cache = PTE_NOCACHE \ 69 } 70 #define DEVMAP_ENTRY_END { 0 } 71 72 static const struct pmap_devmap * 73 tegra_platform_devmap(void) 74 { 75 static const struct pmap_devmap devmap[] = { 76 DEVMAP_ENTRY(TEGRA_HOST1X_VBASE, 77 TEGRA_HOST1X_BASE, 78 TEGRA_HOST1X_SIZE), 79 DEVMAP_ENTRY(TEGRA_PPSB_VBASE, 80 TEGRA_PPSB_BASE, 81 TEGRA_PPSB_SIZE), 82 DEVMAP_ENTRY(TEGRA_APB_VBASE, 83 TEGRA_APB_BASE, 84 TEGRA_APB_SIZE), 85 DEVMAP_ENTRY(TEGRA_AHB_A2_VBASE, 86 TEGRA_AHB_A2_BASE, 87 TEGRA_AHB_A2_SIZE), 88 DEVMAP_ENTRY_END 89 }; 90 91 return devmap; 92 } 93 94 static void 95 tegra_platform_bootstrap(void) 96 { 97 tegra_bootstrap(); 98 } 99 100 static void 101 tegra_platform_init_attach_args(struct fdt_attach_args *faa) 102 { 103 extern struct bus_space armv7_generic_bs_tag; 104 extern struct bus_space armv7_generic_a4x_bs_tag; 105 extern struct arm32_bus_dma_tag armv7_generic_dma_tag; 106 107 faa->faa_bst = &armv7_generic_bs_tag; 108 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 109 faa->faa_dmat = &armv7_generic_dma_tag; 110 } 111 112 static void 113 tegra_platform_early_putchar(char c) 114 { 115 #ifdef CONSADDR 116 #define CONSADDR_VA (CONSADDR - TEGRA_APB_BASE + TEGRA_APB_VBASE) 117 volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA; 118 119 while ((uartaddr[com_lsr] & LSR_TXRDY) == 0) 120 ; 121 122 uartaddr[com_data] = c; 123 #endif 124 } 125 126 static void 127 tegra_platform_device_register(device_t self, void *aux) 128 { 129 prop_dictionary_t dict = device_properties(self); 130 131 if (device_is_a(self, "tegrafb") && 132 match_bootconf_option(boot_args, "console", "fb")) { 133 prop_dictionary_set_bool(dict, "is_console", true); 134 #if NUKBD > 0 135 ukbd_cnattach(); 136 #endif 137 } 138 139 if (device_is_a(self, "tegradrm")) { 140 const char *video = get_bootconf_string(boot_args, "video"); 141 if (video) 142 prop_dictionary_set_cstring(dict, "HDMI-A-1", video); 143 if (match_bootconf_option(boot_args, "hdmi.forcemode", "dvi")) 144 prop_dictionary_set_bool(dict, "force-dvi", true); 145 } 146 147 if (device_is_a(self, "tegracec")) 148 prop_dictionary_set_cstring(dict, "hdmi-device", "tegradrm0"); 149 150 if (device_is_a(self, "nouveau")) { 151 const char *config = get_bootconf_string(boot_args, 152 "nouveau.config"); 153 if (config) 154 prop_dictionary_set_cstring(dict, "config", config); 155 const char *debug = get_bootconf_string(boot_args, 156 "nouveau.debug"); 157 if (debug) 158 prop_dictionary_set_cstring(dict, "debug", debug); 159 } 160 161 if (device_is_a(self, "tegrapcie")) { 162 const char * const jetsontk1_compat[] = { 163 "nvidia,jetson-tk1", NULL 164 }; 165 const int phandle = OF_peer(0); 166 if (of_match_compatible(phandle, jetsontk1_compat)) { 167 /* rfkill GPIO at GPIO X7 */ 168 struct tegra_gpio_pin *pin = 169 tegra_gpio_acquire("X7", GPIO_PIN_OUTPUT); 170 if (pin) 171 tegra_gpio_write(pin, 1); 172 } 173 } 174 } 175 176 static void 177 tegra_platform_reset(void) 178 { 179 tegra_pmc_reset(); 180 } 181 182 static const struct armv7_platform tegra_platform = { 183 .devmap = tegra_platform_devmap, 184 .bootstrap = tegra_platform_bootstrap, 185 .init_attach_args = tegra_platform_init_attach_args, 186 .early_putchar = tegra_platform_early_putchar, 187 .device_register = tegra_platform_device_register, 188 .reset = tegra_platform_reset, 189 }; 190 191 ARMV7_PLATFORM(tegra124, "nvidia,tegra124", &tegra_platform); 192 ARMV7_PLATFORM(tegra210, "nvidia,tegra210", &tegra_platform); 193
Indexes created Thu Sep 25 08:09:54 GMT 2025