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tegra_sdhc.c revision 1.2
      1  1.2  jmcneill /* $NetBSD: tegra_sdhc.c,v 1.2 2015/05/02 14:10:03 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  jmcneill  * SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill #include "locators.h"
     30  1.1  jmcneill 
     31  1.1  jmcneill #include <sys/cdefs.h>
     32  1.2  jmcneill __KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.2 2015/05/02 14:10:03 jmcneill Exp $");
     33  1.1  jmcneill 
     34  1.1  jmcneill #include <sys/param.h>
     35  1.1  jmcneill #include <sys/bus.h>
     36  1.1  jmcneill #include <sys/device.h>
     37  1.1  jmcneill #include <sys/intr.h>
     38  1.1  jmcneill #include <sys/systm.h>
     39  1.1  jmcneill #include <sys/kernel.h>
     40  1.1  jmcneill 
     41  1.1  jmcneill #include <dev/sdmmc/sdhcreg.h>
     42  1.1  jmcneill #include <dev/sdmmc/sdhcvar.h>
     43  1.1  jmcneill #include <dev/sdmmc/sdmmcvar.h>
     44  1.1  jmcneill 
     45  1.1  jmcneill #include <arm/nvidia/tegra_var.h>
     46  1.1  jmcneill 
     47  1.1  jmcneill /* 8-bit eMMC is supported on SDMMC2 and SDMMC4 */
     48  1.1  jmcneill #define SDMMC_8BIT_P(port)	((port) == 1 || (port) == 3)
     49  1.1  jmcneill 
     50  1.1  jmcneill static int	tegra_sdhc_match(device_t, cfdata_t, void *);
     51  1.1  jmcneill static void	tegra_sdhc_attach(device_t, device_t, void *);
     52  1.1  jmcneill 
     53  1.1  jmcneill struct tegra_sdhc_softc {
     54  1.1  jmcneill 	struct sdhc_softc	sc;
     55  1.1  jmcneill 
     56  1.2  jmcneill 	u_int			sc_port;
     57  1.2  jmcneill 
     58  1.1  jmcneill 	bus_space_tag_t		sc_bst;
     59  1.1  jmcneill 	bus_space_handle_t	sc_bsh;
     60  1.1  jmcneill 	bus_size_t		sc_bsz;
     61  1.1  jmcneill 	struct sdhc_host	*sc_host;
     62  1.1  jmcneill 	void			*sc_ih;
     63  1.1  jmcneill };
     64  1.1  jmcneill 
     65  1.1  jmcneill CFATTACH_DECL_NEW(tegra_sdhc, sizeof(struct tegra_sdhc_softc),
     66  1.1  jmcneill 	tegra_sdhc_match, tegra_sdhc_attach, NULL, NULL);
     67  1.1  jmcneill 
     68  1.1  jmcneill static int
     69  1.1  jmcneill tegra_sdhc_match(device_t parent, cfdata_t cf, void *aux)
     70  1.1  jmcneill {
     71  1.1  jmcneill 	return 1;
     72  1.1  jmcneill }
     73  1.1  jmcneill 
     74  1.1  jmcneill static void
     75  1.1  jmcneill tegra_sdhc_attach(device_t parent, device_t self, void *aux)
     76  1.1  jmcneill {
     77  1.1  jmcneill 	struct tegra_sdhc_softc * const sc = device_private(self);
     78  1.1  jmcneill 	struct tegraio_attach_args * const tio = aux;
     79  1.1  jmcneill 	const struct tegra_locators * const loc = &tio->tio_loc;
     80  1.2  jmcneill 	int error;
     81  1.1  jmcneill 
     82  1.1  jmcneill 	sc->sc.sc_dev = self;
     83  1.1  jmcneill 	sc->sc.sc_dmat = tio->tio_dmat;
     84  1.1  jmcneill 	sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
     85  1.2  jmcneill 			  SDHC_FLAG_NO_PWR0 |
     86  1.2  jmcneill 			  SDHC_FLAG_NO_HS_BIT |
     87  1.2  jmcneill 			  SDHC_FLAG_NO_CLKBASE |
     88  1.1  jmcneill 			  SDHC_FLAG_USE_DMA;
     89  1.1  jmcneill 	if (SDMMC_8BIT_P(loc->loc_port)) {
     90  1.1  jmcneill 		sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
     91  1.1  jmcneill 	}
     92  1.1  jmcneill 	sc->sc.sc_host = &sc->sc_host;
     93  1.1  jmcneill 
     94  1.1  jmcneill 	sc->sc_bst = tio->tio_bst;
     95  1.1  jmcneill 	bus_space_subregion(tio->tio_bst, tio->tio_bsh,
     96  1.1  jmcneill 	    loc->loc_offset, loc->loc_size, &sc->sc_bsh);
     97  1.1  jmcneill 	sc->sc_bsz = loc->loc_size;
     98  1.2  jmcneill 	sc->sc_port = loc->loc_port;
     99  1.1  jmcneill 
    100  1.2  jmcneill 	/*
    101  1.2  jmcneill 	 * The controller supports SDR104 speeds (208 MHz). With PLLP (408 Mhz)
    102  1.2  jmcneill 	 * as input and div=2 we can get a reasonable 204 MHz for the SDHC.
    103  1.2  jmcneill 	 */
    104  1.2  jmcneill 	const u_int div = howmany(tegra_car_pllp0_rate() / 1000, 208000);
    105  1.2  jmcneill 	tegra_car_periph_sdmmc_set_div(sc->sc_port, div);
    106  1.2  jmcneill 	sc->sc.sc_clkbase = tegra_car_periph_sdmmc_rate(sc->sc_port) / 1000;
    107  1.1  jmcneill 
    108  1.1  jmcneill 	aprint_naive("\n");
    109  1.1  jmcneill 	aprint_normal(": SDMMC%d\n", loc->loc_port + 1);
    110  1.1  jmcneill 
    111  1.1  jmcneill 	if (sc->sc.sc_clkbase == 0) {
    112  1.1  jmcneill 		aprint_error_dev(self, "couldn't determine frequency\n");
    113  1.1  jmcneill 		return;
    114  1.1  jmcneill 	}
    115  1.1  jmcneill 
    116  1.1  jmcneill 	sc->sc_ih = intr_establish(loc->loc_intr, IPL_SDMMC, IST_LEVEL,
    117  1.1  jmcneill 	    sdhc_intr, &sc->sc);
    118  1.1  jmcneill 	if (sc->sc_ih == NULL) {
    119  1.1  jmcneill 		aprint_error_dev(self, "couldn't establish interrupt %d\n",
    120  1.1  jmcneill 		    loc->loc_intr);
    121  1.1  jmcneill 		return;
    122  1.1  jmcneill 	}
    123  1.1  jmcneill 	aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr);
    124  1.1  jmcneill 
    125  1.1  jmcneill 	error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
    126  1.1  jmcneill 	if (error) {
    127  1.1  jmcneill 		aprint_error_dev(self, "couldn't initialize host, error = %d\n",
    128  1.1  jmcneill 		    error);
    129  1.1  jmcneill 		intr_disestablish(sc->sc_ih);
    130  1.1  jmcneill 		sc->sc_ih = NULL;
    131  1.1  jmcneill 		return;
    132  1.1  jmcneill 	}
    133  1.1  jmcneill }
    134