| History log of /src/sys/arch/arm/nvidia/tegra_sdhc.c |
| Revision | | Date | Author | Comments |
| 1.32 |
| 06-Feb-2022 |
jmcneill | sdhc: Retire SDHC_FLAG_USE_ADMA2 flag.
ADMA2 support in sdhc is mature now, so no need for it to be opt-in.
|
| 1.31 |
| 06-Feb-2022 |
jmcneill | sdhc: tegra: Set SDHC_FLAG_BROKEN_ADMA2_ZEROLEN quirk flag.
The Tegra SDHCI implementation apparently treats ADMA2 descriptors with
length of 0 incorrectly.
|
| 1.30 |
| 22-Jan-2022 |
skrll | Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.
|
| 1.29 |
| 27-Jan-2021 |
thorpej | Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.28 |
| 15-Jan-2021 |
jmcneill | use fdtbus_intr_establish_xname
|
| 1.27 |
| 14-Sep-2020 |
skrll | branches: 1.27.2;
Trailing whitespace.
|
| 1.26 |
| 01-Mar-2020 |
skrll | bus_dmatag_subregion isn't supported on (compiled into) arm so ifdef its
use in previous.
|
| 1.25 |
| 15-Feb-2020 |
skrll | Need to limit the DMA range for tx1. Assume 32bit DMA everywhere for now.
|
| 1.24 |
| 13-Oct-2019 |
skrll | branches: 1.24.2;
Restore %# for PRIxBUSADDR
|
| 1.23 |
| 13-Oct-2019 |
skrll | Use PRIxBUSADDR
|
| 1.22 |
| 16-Jul-2018 |
christos | Add missing pointer <-> integer casts
Use PRI?64 to print uint64_t instead 'll?'
|
| 1.21 |
| 21-Jul-2017 |
jmcneill | branches: 1.21.2; 1.21.4; 1.21.6;
Disable UHS modes if signaling voltage regulator is unavailable.
|
| 1.20 |
| 25-May-2017 |
jmcneill | Match nvidia,tegra210-sdhci compat string.
|
| 1.19 |
| 22-Apr-2017 |
jmcneill | If the "vqmmc-supply" regulator is present, use it to set signal voltage.
|
| 1.18 |
| 22-Apr-2017 |
jmcneill | Set parent clock rate to 100MHz when SDR104 is disabled
|
| 1.17 |
| 16-Apr-2017 |
jmcneill | Disable SDR104 until the Tegra K1 custom tuning method is implemented.
This is required to work around errata that describes periodic data CRC
errors after autotuning has completed.
|
| 1.16 |
| 11-Apr-2017 |
jmcneill | Set SDHC_FLAG_NO_HS_BIT for Tegra sdhc. No noticeable impact on performance
and it seems to get rid of the spurious data transfer timeouts.
|
| 1.15 |
| 22-Dec-2015 |
jmcneill | branches: 1.15.2; 1.15.4;
Switch Tegra over to fdt based clocks and reset controls.
|
| 1.14 |
| 16-Dec-2015 |
jmcneill | use of_getprop_uint32
|
| 1.13 |
| 15-Dec-2015 |
jmcneill | fdtbus_gpio_read handles pin polarity, so fix inverted test in tegra_sdhc_card_detect
|
| 1.12 |
| 13-Dec-2015 |
jmcneill | Use fdt for device enumeration.
|
| 1.11 |
| 03-Aug-2015 |
jmcneill | set SDHC_FLAG_POLL_CARD_DET when we have a card detect pin
|
| 1.10 |
| 02-Aug-2015 |
jmcneill | set ref clk to 204MHz so we can take advantage of UHS-I modes
|
| 1.9 |
| 29-Jul-2015 |
jmcneill | enable ADMA2 data transfer mode
|
| 1.8 |
| 23-Jul-2015 |
jmcneill | use SDHC_FLAG_NO_TIMEOUT
|
| 1.7 |
| 23-Jul-2015 |
jmcneill | Support fractional dividers. This lets us use 48MHz for SDMMC HS mode
instead of 45.333MHz.
|
| 1.6 |
| 30-May-2015 |
jmcneill | dont set SDHC_FLAG_NO_HS_BIT flag
|
| 1.5 |
| 03-May-2015 |
jmcneill | since we dont support SDR104 yet, dont try to optimize it; instead, optimize for HS mode, which brings us up from 34 MHz to 45.333 MHz
|
| 1.4 |
| 03-May-2015 |
jmcneill | set SDHC_FLAG_SINGLE_POWER_WRITE
|
| 1.3 |
| 02-May-2015 |
jmcneill | hook up power, card detect, write protect gpios
|
| 1.2 |
| 02-May-2015 |
jmcneill | SDMMC clock input is PLLP (408 MHz). Set input divisor to 2 to get a
204 MHz input for the SDHC, which is just below the maximum supported
frequency for SDR104.
|
| 1.1 |
| 29-Mar-2015 |
jmcneill | branches: 1.1.2;
NVIDIA Tegra K1 support, work in progress.
|
| 1.1.2.6 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.1.2.5 |
| 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.1.2.4 |
| 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.1.2.3 |
| 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.1.2.2 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.1.2.1 |
| 29-Mar-2015 |
skrll | file tegra_sdhc.c was added on branch nick-nhusb on 2015-04-06 15:17:53 +0000
|
| 1.15.4.1 |
| 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.15.2.1 |
| 26-Apr-2017 |
pgoyette | Sync with HEAD
|
| 1.21.6.3 |
| 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.21.6.2 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.21.6.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.21.4.1 |
| 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.21.2.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.21.2.1 |
| 21-Jul-2017 |
jdolecek | file tegra_sdhc.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
|
| 1.24.2.1 |
| 29-Feb-2020 |
ad | Sync with head.
|
| 1.27.2.1 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
