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tegra_sdhc.c revision 1.21.6.2
      1  1.21.6.2    martin /* $NetBSD: tegra_sdhc.c,v 1.21.6.2 2020/04/08 14:07:30 martin Exp $ */
      2       1.1  jmcneill 
      3       1.1  jmcneill /*-
      4       1.1  jmcneill  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5       1.1  jmcneill  * All rights reserved.
      6       1.1  jmcneill  *
      7       1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8       1.1  jmcneill  * modification, are permitted provided that the following conditions
      9       1.1  jmcneill  * are met:
     10       1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11       1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12       1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15       1.1  jmcneill  *
     16       1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17       1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18       1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19       1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20       1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21       1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22       1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23       1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24       1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25       1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26       1.1  jmcneill  * SUCH DAMAGE.
     27       1.1  jmcneill  */
     28       1.1  jmcneill 
     29      1.18  jmcneill #define	TEGRA_SDHC_NO_SDR104
     30      1.18  jmcneill 
     31       1.1  jmcneill #include "locators.h"
     32       1.1  jmcneill 
     33       1.1  jmcneill #include <sys/cdefs.h>
     34  1.21.6.2    martin __KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.21.6.2 2020/04/08 14:07:30 martin Exp $");
     35       1.1  jmcneill 
     36       1.1  jmcneill #include <sys/param.h>
     37       1.1  jmcneill #include <sys/bus.h>
     38       1.1  jmcneill #include <sys/device.h>
     39       1.1  jmcneill #include <sys/intr.h>
     40       1.1  jmcneill #include <sys/systm.h>
     41       1.1  jmcneill #include <sys/kernel.h>
     42       1.1  jmcneill 
     43       1.1  jmcneill #include <dev/sdmmc/sdhcreg.h>
     44       1.1  jmcneill #include <dev/sdmmc/sdhcvar.h>
     45       1.1  jmcneill #include <dev/sdmmc/sdmmcvar.h>
     46       1.1  jmcneill 
     47      1.12  jmcneill #include <arm/nvidia/tegra_reg.h>
     48       1.1  jmcneill #include <arm/nvidia/tegra_var.h>
     49       1.1  jmcneill 
     50      1.12  jmcneill #include <dev/fdt/fdtvar.h>
     51      1.12  jmcneill 
     52       1.1  jmcneill static int	tegra_sdhc_match(device_t, cfdata_t, void *);
     53       1.1  jmcneill static void	tegra_sdhc_attach(device_t, device_t, void *);
     54       1.1  jmcneill 
     55       1.3  jmcneill static int	tegra_sdhc_card_detect(struct sdhc_softc *);
     56       1.3  jmcneill static int	tegra_sdhc_write_protect(struct sdhc_softc *);
     57      1.19  jmcneill static int	tegra_sdhc_signal_voltage(struct sdhc_softc *, int);
     58       1.3  jmcneill 
     59       1.1  jmcneill struct tegra_sdhc_softc {
     60       1.1  jmcneill 	struct sdhc_softc	sc;
     61       1.1  jmcneill 
     62      1.15  jmcneill 	struct clk		*sc_clk;
     63      1.15  jmcneill 	struct fdtbus_reset	*sc_rst;
     64       1.2  jmcneill 
     65       1.1  jmcneill 	bus_space_tag_t		sc_bst;
     66       1.1  jmcneill 	bus_space_handle_t	sc_bsh;
     67       1.1  jmcneill 	bus_size_t		sc_bsz;
     68       1.1  jmcneill 	struct sdhc_host	*sc_host;
     69       1.1  jmcneill 	void			*sc_ih;
     70       1.3  jmcneill 
     71      1.12  jmcneill 	struct fdtbus_gpio_pin	*sc_pin_cd;
     72      1.12  jmcneill 	struct fdtbus_gpio_pin	*sc_pin_power;
     73      1.12  jmcneill 	struct fdtbus_gpio_pin	*sc_pin_wp;
     74      1.19  jmcneill 
     75      1.19  jmcneill 	struct fdtbus_regulator	*sc_reg_vqmmc;
     76       1.1  jmcneill };
     77       1.1  jmcneill 
     78       1.1  jmcneill CFATTACH_DECL_NEW(tegra_sdhc, sizeof(struct tegra_sdhc_softc),
     79       1.1  jmcneill 	tegra_sdhc_match, tegra_sdhc_attach, NULL, NULL);
     80       1.1  jmcneill 
     81       1.1  jmcneill static int
     82       1.1  jmcneill tegra_sdhc_match(device_t parent, cfdata_t cf, void *aux)
     83       1.1  jmcneill {
     84      1.20  jmcneill 	const char * const compatible[] = {
     85      1.20  jmcneill 		"nvidia,tegra210-sdhci",
     86      1.20  jmcneill 		"nvidia,tegra124-sdhci",
     87      1.20  jmcneill 		NULL
     88      1.20  jmcneill 	};
     89      1.12  jmcneill 	struct fdt_attach_args * const faa = aux;
     90      1.12  jmcneill 
     91      1.12  jmcneill 	return of_match_compatible(faa->faa_phandle, compatible);
     92       1.1  jmcneill }
     93       1.1  jmcneill 
     94       1.1  jmcneill static void
     95       1.1  jmcneill tegra_sdhc_attach(device_t parent, device_t self, void *aux)
     96       1.1  jmcneill {
     97       1.1  jmcneill 	struct tegra_sdhc_softc * const sc = device_private(self);
     98      1.12  jmcneill 	struct fdt_attach_args * const faa = aux;
     99      1.12  jmcneill 	char intrstr[128];
    100      1.12  jmcneill 	bus_addr_t addr;
    101      1.12  jmcneill 	bus_size_t size;
    102      1.12  jmcneill 	u_int bus_width;
    103       1.2  jmcneill 	int error;
    104       1.1  jmcneill 
    105      1.12  jmcneill 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
    106      1.12  jmcneill 		aprint_error(": couldn't get registers\n");
    107      1.12  jmcneill 		return;
    108      1.12  jmcneill 	}
    109      1.12  jmcneill 
    110      1.14  jmcneill 	if (of_getprop_uint32(faa->faa_phandle, "bus-width", &bus_width))
    111      1.12  jmcneill 		bus_width = 4;
    112      1.12  jmcneill 
    113       1.1  jmcneill 	sc->sc.sc_dev = self;
    114      1.12  jmcneill 	sc->sc.sc_dmat = faa->faa_dmat;
    115  1.21.6.2    martin 
    116  1.21.6.2    martin #ifdef _LP64
    117  1.21.6.2    martin 	error = bus_dmatag_subregion(faa->faa_dmat, 0, 0xffffffff,
    118  1.21.6.2    martin 	    &sc->sc.sc_dmat, BUS_DMA_WAITOK);
    119  1.21.6.2    martin 	if (error != 0) {
    120  1.21.6.2    martin 		aprint_error(": couldn't create DMA tag: %d\n", error);
    121  1.21.6.2    martin 		return;
    122  1.21.6.2    martin 	}
    123  1.21.6.2    martin #endif
    124  1.21.6.2    martin 
    125       1.1  jmcneill 	sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
    126       1.2  jmcneill 			  SDHC_FLAG_NO_PWR0 |
    127       1.2  jmcneill 			  SDHC_FLAG_NO_CLKBASE |
    128       1.8  jmcneill 			  SDHC_FLAG_NO_TIMEOUT |
    129       1.4  jmcneill 			  SDHC_FLAG_SINGLE_POWER_WRITE |
    130      1.16  jmcneill 			  SDHC_FLAG_NO_HS_BIT |
    131       1.9  jmcneill 			  SDHC_FLAG_USE_DMA |
    132       1.9  jmcneill 			  SDHC_FLAG_USE_ADMA2;
    133      1.12  jmcneill 	if (bus_width == 8) {
    134       1.1  jmcneill 		sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
    135       1.1  jmcneill 	}
    136       1.1  jmcneill 	sc->sc.sc_host = &sc->sc_host;
    137       1.1  jmcneill 
    138      1.12  jmcneill 	sc->sc_bst = faa->faa_bst;
    139      1.12  jmcneill 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
    140      1.12  jmcneill 	if (error) {
    141  1.21.6.1  christos 		aprint_error(": couldn't map %#" PRIx64 ": %d",
    142  1.21.6.1  christos 		    (uint64_t)addr, error);
    143      1.12  jmcneill 		return;
    144      1.12  jmcneill 	}
    145      1.12  jmcneill 	sc->sc_bsz = size;
    146      1.12  jmcneill 
    147      1.18  jmcneill #ifdef TEGRA_SDHC_NO_SDR104
    148      1.17  jmcneill 	/* XXX SDR104 requires a custom tuning method on Tegra K1 */
    149      1.17  jmcneill 	sc->sc.sc_flags |= SDHC_FLAG_HOSTCAPS;
    150      1.17  jmcneill 	sc->sc.sc_caps = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
    151      1.17  jmcneill 	    SDHC_CAPABILITIES);
    152      1.17  jmcneill 	sc->sc.sc_caps2 = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
    153      1.17  jmcneill 	    SDHC_CAPABILITIES2);
    154      1.17  jmcneill 	sc->sc.sc_caps2 &= ~SDHC_SDR104_SUPP;
    155      1.18  jmcneill #endif
    156      1.17  jmcneill 
    157      1.12  jmcneill 	sc->sc_pin_power = fdtbus_gpio_acquire(faa->faa_phandle,
    158      1.12  jmcneill 	    "power-gpios", GPIO_PIN_OUTPUT);
    159      1.12  jmcneill 	if (sc->sc_pin_power)
    160      1.12  jmcneill 		fdtbus_gpio_write(sc->sc_pin_power, 1);
    161      1.12  jmcneill 
    162      1.12  jmcneill 	sc->sc_pin_cd = fdtbus_gpio_acquire(faa->faa_phandle,
    163      1.12  jmcneill 	    "cd-gpios", GPIO_PIN_INPUT);
    164      1.12  jmcneill 	sc->sc_pin_wp = fdtbus_gpio_acquire(faa->faa_phandle,
    165      1.12  jmcneill 	    "wp-gpios", GPIO_PIN_INPUT);
    166       1.3  jmcneill 
    167      1.11  jmcneill 	if (sc->sc_pin_cd) {
    168       1.3  jmcneill 		sc->sc.sc_vendor_card_detect = tegra_sdhc_card_detect;
    169      1.11  jmcneill 		sc->sc.sc_flags |= SDHC_FLAG_POLL_CARD_DET;
    170      1.11  jmcneill 	}
    171      1.12  jmcneill 	if (sc->sc_pin_wp) {
    172       1.3  jmcneill 		sc->sc.sc_vendor_write_protect = tegra_sdhc_write_protect;
    173      1.12  jmcneill 	}
    174       1.3  jmcneill 
    175      1.19  jmcneill 	sc->sc_reg_vqmmc = fdtbus_regulator_acquire(faa->faa_phandle,
    176      1.19  jmcneill 	    "vqmmc-supply");
    177      1.19  jmcneill 	if (sc->sc_reg_vqmmc) {
    178      1.19  jmcneill 		sc->sc.sc_vendor_signal_voltage = tegra_sdhc_signal_voltage;
    179      1.21  jmcneill 	} else {
    180      1.21  jmcneill 		/* Regulator required for UHS signaling */
    181      1.21  jmcneill 		sc->sc.sc_flags |= SDHC_FLAG_HOSTCAPS;
    182      1.21  jmcneill 		sc->sc.sc_caps = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
    183      1.21  jmcneill 		    SDHC_CAPABILITIES);
    184      1.21  jmcneill 		sc->sc.sc_caps2 = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
    185      1.21  jmcneill 		    SDHC_CAPABILITIES2);
    186      1.21  jmcneill 		sc->sc.sc_caps2 &= ~(SDHC_SDR50_SUPP|SDHC_SDR104_SUPP|SDHC_DDR50_SUPP);
    187      1.19  jmcneill 	}
    188      1.19  jmcneill 
    189      1.15  jmcneill 	sc->sc_clk = fdtbus_clock_get_index(faa->faa_phandle, 0);
    190      1.15  jmcneill 	if (sc->sc_clk == NULL) {
    191      1.15  jmcneill 		aprint_error(": couldn't get clock\n");
    192      1.15  jmcneill 		return;
    193      1.15  jmcneill 	}
    194      1.15  jmcneill 	sc->sc_rst = fdtbus_reset_get(faa->faa_phandle, "sdhci");
    195      1.15  jmcneill 	if (sc->sc_rst == NULL) {
    196      1.15  jmcneill 		aprint_error(": couldn't get reset\n");
    197      1.15  jmcneill 		return;
    198      1.15  jmcneill 	}
    199      1.15  jmcneill 
    200      1.15  jmcneill 	fdtbus_reset_assert(sc->sc_rst);
    201      1.18  jmcneill #ifdef TEGRA_SDHC_NO_SDR104
    202      1.18  jmcneill 	error = clk_set_rate(sc->sc_clk, 100000000);
    203      1.18  jmcneill #else
    204      1.15  jmcneill 	error = clk_set_rate(sc->sc_clk, 204000000);
    205      1.18  jmcneill #endif
    206      1.15  jmcneill 	if (error) {
    207      1.15  jmcneill 		aprint_error(": couldn't set frequency: %d\n", error);
    208      1.15  jmcneill 		return;
    209      1.15  jmcneill 	}
    210      1.15  jmcneill 	error = clk_enable(sc->sc_clk);
    211      1.15  jmcneill 	if (error) {
    212      1.15  jmcneill 		aprint_error(": couldn't enable clock: %d\n", error);
    213      1.15  jmcneill 		return;
    214      1.15  jmcneill 	}
    215      1.15  jmcneill 	fdtbus_reset_deassert(sc->sc_rst);
    216      1.15  jmcneill 
    217      1.15  jmcneill 	sc->sc.sc_clkbase = clk_get_rate(sc->sc_clk) / 1000;
    218       1.1  jmcneill 
    219       1.1  jmcneill 	aprint_naive("\n");
    220      1.18  jmcneill 	aprint_normal(": SDMMC (%u kHz)\n", sc->sc.sc_clkbase);
    221       1.1  jmcneill 
    222       1.1  jmcneill 	if (sc->sc.sc_clkbase == 0) {
    223       1.1  jmcneill 		aprint_error_dev(self, "couldn't determine frequency\n");
    224       1.1  jmcneill 		return;
    225       1.1  jmcneill 	}
    226       1.1  jmcneill 
    227      1.12  jmcneill 	if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) {
    228      1.12  jmcneill 		aprint_error_dev(self, "failed to decode interrupt\n");
    229      1.12  jmcneill 		return;
    230      1.12  jmcneill 	}
    231      1.12  jmcneill 
    232      1.12  jmcneill 	sc->sc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SDMMC, 0,
    233       1.1  jmcneill 	    sdhc_intr, &sc->sc);
    234       1.1  jmcneill 	if (sc->sc_ih == NULL) {
    235      1.12  jmcneill 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
    236      1.12  jmcneill 		    intrstr);
    237       1.1  jmcneill 		return;
    238       1.1  jmcneill 	}
    239      1.12  jmcneill 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    240       1.1  jmcneill 
    241       1.1  jmcneill 	error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
    242       1.1  jmcneill 	if (error) {
    243       1.1  jmcneill 		aprint_error_dev(self, "couldn't initialize host, error = %d\n",
    244       1.1  jmcneill 		    error);
    245      1.12  jmcneill 		fdtbus_intr_disestablish(faa->faa_phandle, sc->sc_ih);
    246       1.1  jmcneill 		sc->sc_ih = NULL;
    247       1.1  jmcneill 		return;
    248       1.1  jmcneill 	}
    249       1.1  jmcneill }
    250       1.3  jmcneill 
    251       1.3  jmcneill static int
    252       1.3  jmcneill tegra_sdhc_card_detect(struct sdhc_softc *ssc)
    253       1.3  jmcneill {
    254       1.3  jmcneill 	struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
    255       1.3  jmcneill 
    256       1.3  jmcneill 	KASSERT(sc->sc_pin_cd != NULL);
    257       1.3  jmcneill 
    258      1.13  jmcneill 	return fdtbus_gpio_read(sc->sc_pin_cd);
    259       1.3  jmcneill }
    260       1.3  jmcneill 
    261       1.3  jmcneill static int
    262       1.3  jmcneill tegra_sdhc_write_protect(struct sdhc_softc *ssc)
    263       1.3  jmcneill {
    264       1.3  jmcneill 	struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
    265       1.3  jmcneill 
    266       1.3  jmcneill 	KASSERT(sc->sc_pin_wp != NULL);
    267       1.3  jmcneill 
    268      1.12  jmcneill 	return fdtbus_gpio_read(sc->sc_pin_wp);
    269       1.3  jmcneill }
    270      1.19  jmcneill 
    271      1.19  jmcneill static int
    272      1.19  jmcneill tegra_sdhc_signal_voltage(struct sdhc_softc *ssc, int signal_voltage)
    273      1.19  jmcneill {
    274      1.19  jmcneill 	struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
    275      1.19  jmcneill 	u_int uvol;
    276      1.19  jmcneill 	int error;
    277      1.19  jmcneill 
    278      1.19  jmcneill 	KASSERT(sc->sc_reg_vqmmc != NULL);
    279      1.19  jmcneill 
    280      1.19  jmcneill 	switch (signal_voltage) {
    281      1.19  jmcneill 	case SDMMC_SIGNAL_VOLTAGE_330:
    282      1.19  jmcneill 		uvol = 3300000;
    283      1.19  jmcneill 		break;
    284      1.19  jmcneill 	case SDMMC_SIGNAL_VOLTAGE_180:
    285      1.19  jmcneill 		uvol = 1800000;
    286      1.19  jmcneill 		break;
    287      1.19  jmcneill 	default:
    288      1.19  jmcneill 		return EINVAL;
    289      1.19  jmcneill 	}
    290      1.19  jmcneill 
    291      1.19  jmcneill 	error = fdtbus_regulator_set_voltage(sc->sc_reg_vqmmc, uvol, uvol);
    292      1.19  jmcneill 	if (error != 0)
    293      1.19  jmcneill 		return error;
    294      1.19  jmcneill 
    295      1.19  jmcneill 	return fdtbus_regulator_enable(sc->sc_reg_vqmmc);
    296      1.19  jmcneill }
    297