tegra_sdhc.c revision 1.14 1 /* $NetBSD: tegra_sdhc.c,v 1.14 2015/12/16 19:46:55 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "locators.h"
30
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.14 2015/12/16 19:46:55 jmcneill Exp $");
33
34 #include <sys/param.h>
35 #include <sys/bus.h>
36 #include <sys/device.h>
37 #include <sys/intr.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40
41 #include <dev/sdmmc/sdhcreg.h>
42 #include <dev/sdmmc/sdhcvar.h>
43 #include <dev/sdmmc/sdmmcvar.h>
44
45 #include <arm/nvidia/tegra_reg.h>
46 #include <arm/nvidia/tegra_var.h>
47
48 #include <dev/fdt/fdtvar.h>
49
50 /* XXX */
51 static int
52 tegra_sdhc_addr2port(bus_addr_t addr)
53 {
54 switch (addr) {
55 case TEGRA_APB_BASE + TEGRA_SDMMC1_OFFSET:
56 return 0;
57 case TEGRA_APB_BASE + TEGRA_SDMMC2_OFFSET:
58 return 1;
59 case TEGRA_APB_BASE + TEGRA_SDMMC3_OFFSET:
60 return 2;
61 case TEGRA_APB_BASE + TEGRA_SDMMC4_OFFSET:
62 return 3;
63 default:
64 return -1;
65 }
66 }
67
68 static int tegra_sdhc_match(device_t, cfdata_t, void *);
69 static void tegra_sdhc_attach(device_t, device_t, void *);
70
71 static int tegra_sdhc_card_detect(struct sdhc_softc *);
72 static int tegra_sdhc_write_protect(struct sdhc_softc *);
73
74 struct tegra_sdhc_softc {
75 struct sdhc_softc sc;
76
77 u_int sc_port;
78
79 bus_space_tag_t sc_bst;
80 bus_space_handle_t sc_bsh;
81 bus_size_t sc_bsz;
82 struct sdhc_host *sc_host;
83 void *sc_ih;
84
85 struct fdtbus_gpio_pin *sc_pin_cd;
86 struct fdtbus_gpio_pin *sc_pin_power;
87 struct fdtbus_gpio_pin *sc_pin_wp;
88 };
89
90 CFATTACH_DECL_NEW(tegra_sdhc, sizeof(struct tegra_sdhc_softc),
91 tegra_sdhc_match, tegra_sdhc_attach, NULL, NULL);
92
93 static int
94 tegra_sdhc_match(device_t parent, cfdata_t cf, void *aux)
95 {
96 const char * const compatible[] = { "nvidia,tegra124-sdhci", NULL };
97 struct fdt_attach_args * const faa = aux;
98
99 return of_match_compatible(faa->faa_phandle, compatible);
100 }
101
102 static void
103 tegra_sdhc_attach(device_t parent, device_t self, void *aux)
104 {
105 struct tegra_sdhc_softc * const sc = device_private(self);
106 struct fdt_attach_args * const faa = aux;
107 char intrstr[128];
108 bus_addr_t addr;
109 bus_size_t size;
110 u_int bus_width;
111 int error;
112
113 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
114 aprint_error(": couldn't get registers\n");
115 return;
116 }
117
118 if (of_getprop_uint32(faa->faa_phandle, "bus-width", &bus_width))
119 bus_width = 4;
120
121 sc->sc.sc_dev = self;
122 sc->sc.sc_dmat = faa->faa_dmat;
123 sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
124 SDHC_FLAG_NO_PWR0 |
125 SDHC_FLAG_NO_CLKBASE |
126 SDHC_FLAG_NO_TIMEOUT |
127 SDHC_FLAG_SINGLE_POWER_WRITE |
128 SDHC_FLAG_USE_DMA |
129 SDHC_FLAG_USE_ADMA2;
130 if (bus_width == 8) {
131 sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
132 }
133 sc->sc.sc_host = &sc->sc_host;
134
135 sc->sc_bst = faa->faa_bst;
136 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
137 if (error) {
138 aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error);
139 return;
140 }
141 sc->sc_bsz = size;
142 sc->sc_port = tegra_sdhc_addr2port(addr);
143
144 sc->sc_pin_power = fdtbus_gpio_acquire(faa->faa_phandle,
145 "power-gpios", GPIO_PIN_OUTPUT);
146 if (sc->sc_pin_power)
147 fdtbus_gpio_write(sc->sc_pin_power, 1);
148
149 sc->sc_pin_cd = fdtbus_gpio_acquire(faa->faa_phandle,
150 "cd-gpios", GPIO_PIN_INPUT);
151 sc->sc_pin_wp = fdtbus_gpio_acquire(faa->faa_phandle,
152 "wp-gpios", GPIO_PIN_INPUT);
153
154 if (sc->sc_pin_cd) {
155 sc->sc.sc_vendor_card_detect = tegra_sdhc_card_detect;
156 sc->sc.sc_flags |= SDHC_FLAG_POLL_CARD_DET;
157 }
158 if (sc->sc_pin_wp) {
159 sc->sc.sc_vendor_write_protect = tegra_sdhc_write_protect;
160 }
161
162 tegra_car_periph_sdmmc_set_rate(sc->sc_port, 204000000);
163 sc->sc.sc_clkbase = tegra_car_periph_sdmmc_rate(sc->sc_port) / 1000;
164
165 aprint_naive("\n");
166 aprint_normal(": SDMMC%d\n", sc->sc_port + 1);
167
168 if (sc->sc.sc_clkbase == 0) {
169 aprint_error_dev(self, "couldn't determine frequency\n");
170 return;
171 }
172
173 if (!fdtbus_intr_str(faa->faa_phandle, 0, intrstr, sizeof(intrstr))) {
174 aprint_error_dev(self, "failed to decode interrupt\n");
175 return;
176 }
177
178 sc->sc_ih = fdtbus_intr_establish(faa->faa_phandle, 0, IPL_SDMMC, 0,
179 sdhc_intr, &sc->sc);
180 if (sc->sc_ih == NULL) {
181 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
182 intrstr);
183 return;
184 }
185 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
186
187 error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
188 if (error) {
189 aprint_error_dev(self, "couldn't initialize host, error = %d\n",
190 error);
191 fdtbus_intr_disestablish(faa->faa_phandle, sc->sc_ih);
192 sc->sc_ih = NULL;
193 return;
194 }
195 }
196
197 static int
198 tegra_sdhc_card_detect(struct sdhc_softc *ssc)
199 {
200 struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
201
202 KASSERT(sc->sc_pin_cd != NULL);
203
204 return fdtbus_gpio_read(sc->sc_pin_cd);
205 }
206
207 static int
208 tegra_sdhc_write_protect(struct sdhc_softc *ssc)
209 {
210 struct tegra_sdhc_softc *sc = device_private(ssc->sc_dev);
211
212 KASSERT(sc->sc_pin_wp != NULL);
213
214 return fdtbus_gpio_read(sc->sc_pin_wp);
215 }
216