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tegra_sdhc.c revision 1.2 
      1 /* $NetBSD: tegra_sdhc.c,v 1.2 2015/05/02 14:10:03 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "locators.h"
     30 
     31 #include <sys/cdefs.h>
     32 __KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.2 2015/05/02 14:10:03 jmcneill Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/bus.h>
     36 #include <sys/device.h>
     37 #include <sys/intr.h>
     38 #include <sys/systm.h>
     39 #include <sys/kernel.h>
     40 
     41 #include <dev/sdmmc/sdhcreg.h>
     42 #include <dev/sdmmc/sdhcvar.h>
     43 #include <dev/sdmmc/sdmmcvar.h>
     44 
     45 #include <arm/nvidia/tegra_var.h>
     46 
     47 /* 8-bit eMMC is supported on SDMMC2 and SDMMC4 */
     48 #define SDMMC_8BIT_P(port)	((port) == 1 || (port) == 3)
     49 
     50 static int	tegra_sdhc_match(device_t, cfdata_t, void *);
     51 static void	tegra_sdhc_attach(device_t, device_t, void *);
     52 
     53 struct tegra_sdhc_softc {
     54 	struct sdhc_softc	sc;
     55 
     56 	u_int			sc_port;
     57 
     58 	bus_space_tag_t		sc_bst;
     59 	bus_space_handle_t	sc_bsh;
     60 	bus_size_t		sc_bsz;
     61 	struct sdhc_host	*sc_host;
     62 	void			*sc_ih;
     63 };
     64 
     65 CFATTACH_DECL_NEW(tegra_sdhc, sizeof(struct tegra_sdhc_softc),
     66 	tegra_sdhc_match, tegra_sdhc_attach, NULL, NULL);
     67 
     68 static int
     69 tegra_sdhc_match(device_t parent, cfdata_t cf, void *aux)
     70 {
     71 	return 1;
     72 }
     73 
     74 static void
     75 tegra_sdhc_attach(device_t parent, device_t self, void *aux)
     76 {
     77 	struct tegra_sdhc_softc * const sc = device_private(self);
     78 	struct tegraio_attach_args * const tio = aux;
     79 	const struct tegra_locators * const loc = &tio->tio_loc;
     80 	int error;
     81 
     82 	sc->sc.sc_dev = self;
     83 	sc->sc.sc_dmat = tio->tio_dmat;
     84 	sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
     85 			  SDHC_FLAG_NO_PWR0 |
     86 			  SDHC_FLAG_NO_HS_BIT |
     87 			  SDHC_FLAG_NO_CLKBASE |
     88 			  SDHC_FLAG_USE_DMA;
     89 	if (SDMMC_8BIT_P(loc->loc_port)) {
     90 		sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
     91 	}
     92 	sc->sc.sc_host = &sc->sc_host;
     93 
     94 	sc->sc_bst = tio->tio_bst;
     95 	bus_space_subregion(tio->tio_bst, tio->tio_bsh,
     96 	    loc->loc_offset, loc->loc_size, &sc->sc_bsh);
     97 	sc->sc_bsz = loc->loc_size;
     98 	sc->sc_port = loc->loc_port;
     99 
    100 	/*
    101 	 * The controller supports SDR104 speeds (208 MHz). With PLLP (408 Mhz)
    102 	 * as input and div=2 we can get a reasonable 204 MHz for the SDHC.
    103 	 */
    104 	const u_int div = howmany(tegra_car_pllp0_rate() / 1000, 208000);
    105 	tegra_car_periph_sdmmc_set_div(sc->sc_port, div);
    106 	sc->sc.sc_clkbase = tegra_car_periph_sdmmc_rate(sc->sc_port) / 1000;
    107 
    108 	aprint_naive("\n");
    109 	aprint_normal(": SDMMC%d\n", loc->loc_port + 1);
    110 
    111 	if (sc->sc.sc_clkbase == 0) {
    112 		aprint_error_dev(self, "couldn't determine frequency\n");
    113 		return;
    114 	}
    115 
    116 	sc->sc_ih = intr_establish(loc->loc_intr, IPL_SDMMC, IST_LEVEL,
    117 	    sdhc_intr, &sc->sc);
    118 	if (sc->sc_ih == NULL) {
    119 		aprint_error_dev(self, "couldn't establish interrupt %d\n",
    120 		    loc->loc_intr);
    121 		return;
    122 	}
    123 	aprint_normal_dev(self, "interrupting on irq %d\n", loc->loc_intr);
    124 
    125 	error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
    126 	if (error) {
    127 		aprint_error_dev(self, "couldn't initialize host, error = %d\n",
    128 		    error);
    129 		intr_disestablish(sc->sc_ih);
    130 		sc->sc_ih = NULL;
    131 		return;
    132 	}
    133 }
    134