pic.c revision 1.20 1 /* $NetBSD: pic.c,v 1.20 2014/03/03 08:50:48 matt Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.20 2014/03/03 08:50:48 matt Exp $");
32
33 #define _INTR_PRIVATE
34 #include <sys/param.h>
35 #include <sys/atomic.h>
36 #include <sys/cpu.h>
37 #include <sys/evcnt.h>
38 #include <sys/intr.h>
39 #include <sys/kernel.h>
40 #include <sys/kmem.h>
41 #include <sys/xcall.h>
42
43 #include <arm/armreg.h>
44 #include <arm/cpufunc.h>
45
46 #include <arm/pic/picvar.h>
47
48 static uint32_t
49 pic_find_pending_irqs_by_ipl(struct pic_softc *, size_t, uint32_t, int);
50 static struct pic_softc *
51 pic_list_find_pic_by_pending_ipl(uint32_t);
52 static void
53 pic_deliver_irqs(struct pic_softc *, int, void *);
54 static void
55 pic_list_deliver_irqs(register_t, int, void *);
56
57 struct pic_softc *pic_list[PIC_MAXPICS];
58 #if PIC_MAXPICS > 32
59 #error PIC_MAXPICS > 32 not supported
60 #endif
61 volatile uint32_t pic_blocked_pics;
62 volatile uint32_t pic_pending_pics;
63 volatile uint32_t pic_pending_ipls;
64 struct intrsource *pic_sources[PIC_MAXMAXSOURCES];
65 struct intrsource *pic__iplsources[PIC_MAXMAXSOURCES];
66 struct intrsource **pic_iplsource[NIPL] = {
67 [0 ... NIPL-1] = pic__iplsources,
68 };
69 size_t pic_ipl_offset[NIPL+1];
70 size_t pic_sourcebase;
71 static struct evcnt pic_deferral_ev =
72 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "deferred", "intr");
73 EVCNT_ATTACH_STATIC(pic_deferral_ev);
74
75 #ifdef __HAVE_PIC_SET_PRIORITY
76 void
77 pic_set_priority(struct cpu_info *ci, int newipl)
78 {
79 register_t psw = cpsid(I32_bit);
80 if (pic_list[0] != NULL)
81 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
82 ci->ci_cpl = newipl;
83 if ((psw & I32_bit) == 0)
84 cpsie(I32_bit);
85 }
86 #endif
87
88 #ifdef MULTIPROCESSOR
89 int
90 pic_ipi_nop(void *arg)
91 {
92 /* do nothing */
93 return 1;
94 }
95
96 int
97 pic_ipi_xcall(void *arg)
98 {
99 xc_ipi_handler();
100 return 1;
101 }
102
103 void
104 intr_cpu_init(struct cpu_info *ci)
105 {
106 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
107 struct pic_softc * const pic = pic_list[slot];
108 if (pic != NULL && pic->pic_ops->pic_cpu_init != NULL) {
109 (*pic->pic_ops->pic_cpu_init)(pic, ci);
110 }
111 }
112 }
113
114 typedef void (*pic_ipi_send_func_t)(struct pic_softc *, u_long);
115
116 static struct pic_softc *
117 pic_ipi_sender(void)
118 {
119 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
120 struct pic_softc * const pic = pic_list[slot];
121 if (pic != NULL && pic->pic_ops->pic_ipi_send != NULL) {
122 return pic;
123 }
124 }
125 return NULL;
126 }
127
128 void
129 intr_ipi_send(const kcpuset_t *kcp, u_long ipi)
130 {
131 struct pic_softc * const pic = pic_ipi_sender();
132 KASSERT(ipi < NIPI);
133 if (cold && pic == NULL)
134 return;
135 KASSERT(pic != NULL);
136 (*pic->pic_ops->pic_ipi_send)(pic, kcp, ipi);
137 }
138 #endif /* MULTIPROCESSOR */
139
140 #ifdef __HAVE_PIC_FAST_SOFTINTS
141 int
142 pic_handle_softint(void *arg)
143 {
144 void softint_switch(lwp_t *, int);
145 struct cpu_info * const ci = curcpu();
146 const size_t softint = (size_t) arg;
147 int s = splhigh();
148 ci->ci_intr_depth--; // don't count these as interrupts
149 softint_switch(ci->ci_softlwps[softint], s);
150 ci->ci_intr_depth++;
151 splx(s);
152 return 1;
153 }
154 #endif
155
156 int
157 pic_handle_intr(void *arg)
158 {
159 struct pic_softc * const pic = arg;
160 int rv;
161
162 rv = (*pic->pic_ops->pic_find_pending_irqs)(pic);
163
164 return rv > 0;
165 }
166
167 void
168 pic_mark_pending_source(struct pic_softc *pic, struct intrsource *is)
169 {
170 const uint32_t ipl_mask = __BIT(is->is_ipl);
171
172 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
173 __BIT(is->is_irq & 0x1f));
174
175 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
176 atomic_or_32(&pic_pending_ipls, ipl_mask);
177 atomic_or_32(&pic_pending_pics, __BIT(pic->pic_id));
178 }
179
180 void
181 pic_mark_pending(struct pic_softc *pic, int irq)
182 {
183 struct intrsource * const is = pic->pic_sources[irq];
184
185 KASSERT(irq < pic->pic_maxsources);
186 KASSERT(is != NULL);
187
188 pic_mark_pending_source(pic, is);
189 }
190
191 uint32_t
192 pic_mark_pending_sources(struct pic_softc *pic, size_t irq_base,
193 uint32_t pending)
194 {
195 struct intrsource ** const isbase = &pic->pic_sources[irq_base];
196 struct intrsource *is;
197 volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
198 uint32_t ipl_mask = 0;
199
200 if (pending == 0)
201 return ipl_mask;
202
203 KASSERT((irq_base & 31) == 0);
204
205 (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
206
207 atomic_or_32(ipending, pending);
208 while (pending != 0) {
209 int n = ffs(pending);
210 if (n-- == 0)
211 break;
212 is = isbase[n];
213 KASSERT(is != NULL);
214 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
215 pending &= ~__BIT(n);
216 ipl_mask |= __BIT(is->is_ipl);
217 }
218
219 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
220 atomic_or_32(&pic_pending_ipls, ipl_mask);
221 atomic_or_32(&pic_pending_pics, __BIT(pic->pic_id));
222
223 return ipl_mask;
224 }
225
226 uint32_t
227 pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
228 uint32_t pending, int ipl)
229 {
230 uint32_t ipl_irq_mask = 0;
231 uint32_t irq_mask;
232
233 for (;;) {
234 int irq = ffs(pending);
235 if (irq-- == 0)
236 return ipl_irq_mask;
237
238 irq_mask = __BIT(irq);
239 #if 1
240 KASSERTMSG(pic->pic_sources[irq_base + irq] != NULL,
241 "%s: irq_base %zu irq %d\n", __func__, irq_base, irq);
242 #else
243 if (pic->pic_sources[irq_base + irq] == NULL) {
244 aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
245 irq_base, irq);
246 } else
247 #endif
248 if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
249 ipl_irq_mask |= irq_mask;
250
251 pending &= ~irq_mask;
252 }
253 }
254
255 void
256 pic_dispatch(struct intrsource *is, void *frame)
257 {
258 int (*func)(void *) = is->is_func;
259 void *arg = is->is_arg;
260
261 if (__predict_false(arg == NULL)) {
262 if (__predict_false(frame == NULL)) {
263 pic_deferral_ev.ev_count++;
264 return;
265 }
266 arg = frame;
267 }
268
269 #ifdef MULTIPROCESSOR
270 if (!is->is_mpsafe) {
271 KERNEL_LOCK(1, NULL);
272 (void)(*func)(arg);
273 KERNEL_UNLOCK_ONE(NULL);
274 } else
275 #endif
276 (void)(*func)(arg);
277
278
279 struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
280 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
281 pcpu->pcpu_evs[is->is_irq].ev_count++;
282 percpu_putref(is->is_pic->pic_percpu);
283 }
284
285 void
286 pic_deliver_irqs(struct pic_softc *pic, int ipl, void *frame)
287 {
288 const uint32_t ipl_mask = __BIT(ipl);
289 struct intrsource *is;
290 volatile uint32_t *ipending = pic->pic_pending_irqs;
291 volatile uint32_t *iblocked = pic->pic_blocked_irqs;
292 size_t irq_base;
293 #if PIC_MAXSOURCES > 32
294 size_t irq_count;
295 int poi = 0; /* Possibility of interrupting */
296 #endif
297 uint32_t pending_irqs;
298 uint32_t blocked_irqs;
299 int irq;
300 bool progress __diagused = false;
301
302 KASSERT(pic->pic_pending_ipls & ipl_mask);
303
304 irq_base = 0;
305 #if PIC_MAXSOURCES > 32
306 irq_count = 0;
307 #endif
308
309 for (;;) {
310 pending_irqs = pic_find_pending_irqs_by_ipl(pic, irq_base,
311 *ipending, ipl);
312 KASSERT((pending_irqs & *ipending) == pending_irqs);
313 KASSERT((pending_irqs & ~(*ipending)) == 0);
314 if (pending_irqs == 0) {
315 #if PIC_MAXSOURCES > 32
316 irq_count += 32;
317 if (__predict_true(irq_count >= pic->pic_maxsources)) {
318 if (!poi)
319 /*Interrupt at this level was handled.*/
320 break;
321 irq_base = 0;
322 irq_count = 0;
323 poi = 0;
324 ipending = pic->pic_pending_irqs;
325 iblocked = pic->pic_blocked_irqs;
326 } else {
327 irq_base += 32;
328 ipending++;
329 iblocked++;
330 KASSERT(irq_base <= pic->pic_maxsources);
331 }
332 continue;
333 #else
334 break;
335 #endif
336 }
337 progress = true;
338 blocked_irqs = 0;
339 do {
340 irq = ffs(pending_irqs) - 1;
341 KASSERT(irq >= 0);
342
343 atomic_and_32(ipending, ~__BIT(irq));
344 is = pic->pic_sources[irq_base + irq];
345 if (is != NULL) {
346 cpsie(I32_bit);
347 pic_dispatch(is, frame);
348 cpsid(I32_bit);
349 #if PIC_MAXSOURCES > 32
350 /*
351 * There is a possibility of interrupting
352 * from cpsie() to cpsid().
353 */
354 poi = 1;
355 #endif
356 blocked_irqs |= __BIT(irq);
357 } else {
358 KASSERT(0);
359 }
360 pending_irqs = pic_find_pending_irqs_by_ipl(pic,
361 irq_base, *ipending, ipl);
362 } while (pending_irqs);
363 if (blocked_irqs) {
364 atomic_or_32(iblocked, blocked_irqs);
365 atomic_or_32(&pic_blocked_pics, __BIT(pic->pic_id));
366 }
367 }
368
369 KASSERT(progress);
370 /*
371 * Since interrupts are disabled, we don't have to be too careful
372 * about these.
373 */
374 if (atomic_and_32_nv(&pic->pic_pending_ipls, ~ipl_mask) == 0)
375 atomic_and_32(&pic_pending_pics, ~__BIT(pic->pic_id));
376 }
377
378 static void
379 pic_list_unblock_irqs(void)
380 {
381 uint32_t blocked_pics = pic_blocked_pics;
382
383 pic_blocked_pics = 0;
384 for (;;) {
385 struct pic_softc *pic;
386 #if PIC_MAXSOURCES > 32
387 volatile uint32_t *iblocked;
388 uint32_t blocked;
389 size_t irq_base;
390 #endif
391
392 int pic_id = ffs(blocked_pics);
393 if (pic_id-- == 0)
394 return;
395
396 pic = pic_list[pic_id];
397 KASSERT(pic != NULL);
398 #if PIC_MAXSOURCES > 32
399 for (irq_base = 0, iblocked = pic->pic_blocked_irqs;
400 irq_base < pic->pic_maxsources;
401 irq_base += 32, iblocked++) {
402 if ((blocked = *iblocked) != 0) {
403 (*pic->pic_ops->pic_unblock_irqs)(pic,
404 irq_base, blocked);
405 atomic_and_32(iblocked, ~blocked);
406 }
407 }
408 #else
409 KASSERT(pic->pic_blocked_irqs[0] != 0);
410 (*pic->pic_ops->pic_unblock_irqs)(pic,
411 0, pic->pic_blocked_irqs[0]);
412 pic->pic_blocked_irqs[0] = 0;
413 #endif
414 blocked_pics &= ~__BIT(pic_id);
415 }
416 }
417
418
419 struct pic_softc *
420 pic_list_find_pic_by_pending_ipl(uint32_t ipl_mask)
421 {
422 uint32_t pending_pics = pic_pending_pics;
423 struct pic_softc *pic;
424
425 for (;;) {
426 int pic_id = ffs(pending_pics);
427 if (pic_id-- == 0)
428 return NULL;
429
430 pic = pic_list[pic_id];
431 KASSERT(pic != NULL);
432 if (pic->pic_pending_ipls & ipl_mask)
433 return pic;
434 pending_pics &= ~__BIT(pic_id);
435 }
436 }
437
438 void
439 pic_list_deliver_irqs(register_t psw, int ipl, void *frame)
440 {
441 const uint32_t ipl_mask = __BIT(ipl);
442 struct pic_softc *pic;
443
444 while ((pic = pic_list_find_pic_by_pending_ipl(ipl_mask)) != NULL) {
445 pic_deliver_irqs(pic, ipl, frame);
446 KASSERT((pic->pic_pending_ipls & ipl_mask) == 0);
447 }
448 atomic_and_32(&pic_pending_ipls, ~ipl_mask);
449 }
450
451 void
452 pic_do_pending_ints(register_t psw, int newipl, void *frame)
453 {
454 struct cpu_info * const ci = curcpu();
455 if (__predict_false(newipl == IPL_HIGH)) {
456 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl %d", ci->ci_cpl);
457 return;
458 }
459 while ((pic_pending_ipls & ~__BIT(newipl)) > __BIT(newipl)) {
460 KASSERT(pic_pending_ipls < __BIT(NIPL));
461 for (;;) {
462 int ipl = 31 - __builtin_clz(pic_pending_ipls);
463 KASSERT(ipl < NIPL);
464 if (ipl <= newipl)
465 break;
466
467 pic_set_priority(ci, ipl);
468 pic_list_deliver_irqs(psw, ipl, frame);
469 pic_list_unblock_irqs();
470 }
471 }
472 if (ci->ci_cpl != newipl)
473 pic_set_priority(ci, newipl);
474 }
475
476 static void
477 pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
478 {
479 struct pic_percpu * const pcpu = v0;
480 struct pic_softc * const pic = v1;
481
482 pcpu->pcpu_evs = kmem_zalloc(pic->pic_maxsources * sizeof(pcpu->pcpu_evs[0]),
483 KM_SLEEP);
484 KASSERT(pcpu->pcpu_evs != NULL);
485
486 #define PCPU_NAMELEN 32
487 #ifdef DIAGNOSTIC
488 const size_t namelen = strlen(pic->pic_name) + 4 + strlen(ci->ci_data.cpu_name);
489 #endif
490
491 KASSERT(namelen < PCPU_NAMELEN);
492 pcpu->pcpu_name = kmem_alloc(PCPU_NAMELEN, KM_SLEEP);
493 #ifdef MULTIPROCESSOR
494 snprintf(pcpu->pcpu_name, PCPU_NAMELEN,
495 "%s (%s)", pic->pic_name, ci->ci_data.cpu_name);
496 #else
497 strlcpy(pcpu->pcpu_name, pic->pic_name, PCPU_NAMELEN);
498 #endif
499 pcpu->pcpu_magic = PICPERCPU_MAGIC;
500 #if 0
501 printf("%s: %s %s: <%s>\n",
502 __func__, ci->ci_data.cpu_name, pic->pic_name,
503 pcpu->pcpu_name);
504 #endif
505 }
506
507 void
508 pic_add(struct pic_softc *pic, int irqbase)
509 {
510 int slot, maybe_slot = -1;
511
512 KASSERT(strlen(pic->pic_name) > 0);
513
514 for (slot = 0; slot < PIC_MAXPICS; slot++) {
515 struct pic_softc * const xpic = pic_list[slot];
516 if (xpic == NULL) {
517 if (maybe_slot < 0)
518 maybe_slot = slot;
519 if (irqbase < 0)
520 break;
521 continue;
522 }
523 if (irqbase < 0 || xpic->pic_irqbase < 0)
524 continue;
525 if (irqbase >= xpic->pic_irqbase + xpic->pic_maxsources)
526 continue;
527 if (irqbase + pic->pic_maxsources <= xpic->pic_irqbase)
528 continue;
529 panic("pic_add: pic %s (%zu sources @ irq %u) conflicts"
530 " with pic %s (%zu sources @ irq %u)",
531 pic->pic_name, pic->pic_maxsources, irqbase,
532 xpic->pic_name, xpic->pic_maxsources, xpic->pic_irqbase);
533 }
534 slot = maybe_slot;
535 #if 0
536 printf("%s: pic_sourcebase=%zu pic_maxsources=%zu\n",
537 pic->pic_name, pic_sourcebase, pic->pic_maxsources);
538 #endif
539 KASSERTMSG(pic->pic_maxsources <= PIC_MAXSOURCES, "%zu",
540 pic->pic_maxsources);
541 KASSERT(pic_sourcebase + pic->pic_maxsources <= PIC_MAXMAXSOURCES);
542
543 /*
544 * Allocate a pointer to each cpu's evcnts and then, for each cpu,
545 * allocate its evcnts and then attach an evcnt for each pin.
546 * We can't allocate the evcnt structures directly since
547 * percpu will move the contents of percpu memory around and
548 * corrupt the pointers in the evcnts themselves. Remember, any
549 * problem can be solved with sufficient indirection.
550 */
551 pic->pic_percpu = percpu_alloc(sizeof(struct pic_percpu));
552 KASSERT(pic->pic_percpu != NULL);
553
554 /*
555 * Now allocate the per-cpu evcnts.
556 */
557 percpu_foreach(pic->pic_percpu, pic_percpu_allocate, pic);
558
559 pic->pic_sources = &pic_sources[pic_sourcebase];
560 pic->pic_irqbase = irqbase;
561 pic_sourcebase += pic->pic_maxsources;
562 pic->pic_id = slot;
563 #ifdef __HAVE_PIC_SET_PRIORITY
564 KASSERT((slot == 0) == (pic->pic_ops->pic_set_priority != NULL));
565 #endif
566 #ifdef MULTIPROCESSOR
567 KASSERT((slot == 0) == (pic->pic_ops->pic_ipi_send != NULL));
568 #endif
569 pic_list[slot] = pic;
570 }
571
572 int
573 pic_alloc_irq(struct pic_softc *pic)
574 {
575 int irq;
576
577 for (irq = 0; irq < pic->pic_maxsources; irq++) {
578 if (pic->pic_sources[irq] == NULL)
579 return irq;
580 }
581
582 return -1;
583 }
584
585 static void
586 pic_percpu_evcnt_attach(void *v0, void *v1, struct cpu_info *ci)
587 {
588 struct pic_percpu * const pcpu = v0;
589 struct intrsource * const is = v1;
590
591 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
592 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
593 pcpu->pcpu_name, is->is_source);
594 }
595
596 void *
597 pic_establish_intr(struct pic_softc *pic, int irq, int ipl, int type,
598 int (*func)(void *), void *arg)
599 {
600 struct intrsource *is;
601 int off, nipl;
602
603 if (pic->pic_sources[irq]) {
604 printf("pic_establish_intr: pic %s irq %d already present\n",
605 pic->pic_name, irq);
606 return NULL;
607 }
608
609 is = kmem_zalloc(sizeof(*is), KM_SLEEP);
610 if (is == NULL)
611 return NULL;
612
613 is->is_pic = pic;
614 is->is_irq = irq;
615 is->is_ipl = ipl;
616 is->is_type = type;
617 is->is_func = func;
618 is->is_arg = arg;
619 #ifdef MULTIPROCESSOR
620 is->is_mpsafe = false;
621 #endif
622
623 if (pic->pic_ops->pic_source_name)
624 (*pic->pic_ops->pic_source_name)(pic, irq, is->is_source,
625 sizeof(is->is_source));
626 else
627 snprintf(is->is_source, sizeof(is->is_source), "irq %d", irq);
628
629 /*
630 * Now attach the per-cpu evcnts.
631 */
632 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_attach, is);
633
634 pic->pic_sources[irq] = is;
635
636 /*
637 * First try to use an existing slot which is empty.
638 */
639 for (off = pic_ipl_offset[ipl]; off < pic_ipl_offset[ipl+1]; off++) {
640 if (pic__iplsources[off] == NULL) {
641 is->is_iplidx = off - pic_ipl_offset[ipl];
642 pic__iplsources[off] = is;
643 return is;
644 }
645 }
646
647 /*
648 * Move up all the sources by one.
649 */
650 if (ipl < NIPL) {
651 off = pic_ipl_offset[ipl+1];
652 memmove(&pic__iplsources[off+1], &pic__iplsources[off],
653 sizeof(pic__iplsources[0]) * (pic_ipl_offset[NIPL] - off));
654 }
655
656 /*
657 * Advance the offset of all IPLs higher than this. Include an
658 * extra one as well. Thus the number of sources per ipl is
659 * pic_ipl_offset[ipl+1] - pic_ipl_offset[ipl].
660 */
661 for (nipl = ipl + 1; nipl <= NIPL; nipl++)
662 pic_ipl_offset[nipl]++;
663
664 /*
665 * Insert into the previously made position at the end of this IPL's
666 * sources.
667 */
668 off = pic_ipl_offset[ipl + 1] - 1;
669 is->is_iplidx = off - pic_ipl_offset[ipl];
670 pic__iplsources[off] = is;
671
672 (*pic->pic_ops->pic_establish_irq)(pic, is);
673
674 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
675 __BIT(is->is_irq & 0x1f));
676
677 /* We're done. */
678 return is;
679 }
680
681 static void
682 pic_percpu_evcnt_deattach(void *v0, void *v1, struct cpu_info *ci)
683 {
684 struct pic_percpu * const pcpu = v0;
685 struct intrsource * const is = v1;
686
687 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
688 evcnt_detach(&pcpu->pcpu_evs[is->is_irq]);
689 }
690
691 void
692 pic_disestablish_source(struct intrsource *is)
693 {
694 struct pic_softc * const pic = is->is_pic;
695 const int irq = is->is_irq;
696
697 KASSERT(is == pic->pic_sources[irq]);
698
699 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
700 pic->pic_sources[irq] = NULL;
701 pic__iplsources[pic_ipl_offset[is->is_ipl] + is->is_iplidx] = NULL;
702 /*
703 * Now detach the per-cpu evcnts.
704 */
705 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_deattach, is);
706
707 kmem_free(is, sizeof(*is));
708 }
709
710 void *
711 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
712 {
713 KASSERT(!cpu_intr_p());
714 KASSERT(!cpu_softintr_p());
715
716 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
717 struct pic_softc * const pic = pic_list[slot];
718 if (pic == NULL || pic->pic_irqbase < 0)
719 continue;
720 if (pic->pic_irqbase <= irq
721 && irq < pic->pic_irqbase + pic->pic_maxsources) {
722 return pic_establish_intr(pic, irq - pic->pic_irqbase,
723 ipl, type, func, arg);
724 }
725 }
726
727 return NULL;
728 }
729
730 void
731 intr_disestablish(void *ih)
732 {
733 struct intrsource * const is = ih;
734
735 KASSERT(!cpu_intr_p());
736 KASSERT(!cpu_softintr_p());
737
738 pic_disestablish_source(is);
739 }
740