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History log of /src/sys/arch/arm/pic/pic.c
RevisionDateAuthorComments
 1.85  30-Oct-2022  riastradh arm/pic: Sprinkle dtrace probes on interrupt handlers like x86.
 1.84  29-Oct-2022  riastradh arm/pic: Use a local variable to reduce #ifdef scope.

Avoids straddling a conditional this way.
 1.83  28-Jul-2022  riastradh arm/pic: Mark definitions static to match declarations.
 1.82  28-Jul-2022  riastradh arm/pic: Assert ci_cpl doesn't lower across interrupt handler.
 1.81  28-Jul-2022  skrll Catch up with the per lwp astpending (rather than per cpu) flag in the
preemption code. NFC as preemption (still) isn't enabled.
 1.80  25-Jun-2022  jmcneill pic: Update ci_cpl in pic_set_priority callback.

Not all ICs need interrupts disabled to update the priority. DAIF accesses
are not cheap, so push the update of ci_cpl from pic_set_priority to the
IC's pic_set_priority callback, and let the IC driver determine whether
or not it needs interrupts disabled.
 1.79  02-Jan-2022  riastradh arm: No #if DIAGNOSTIC needed any more.

Compiler can (and gcc does) flush call to strlen when the result is
unused, so no performance impact here.
 1.78  21-Dec-2021  skrll Fix a bug where pic_establish_intr would fail to call pic_establish_irq
if a free pic__iplsources slot was found, i.e. an interrupt handler at
the same ipl had been disestablished previously.
 1.77  21-Dec-2021  skrll G/C pic_iplsource
 1.76  21-Dec-2021  skrll KNF
 1.75  31-Oct-2021  skrll Only perform pic_unblock_percpu if all of the following are true
- mp_online, i.e. APs are running.
- is_mpsafe, i.e. the interrupt handler is MP safe
- is_percpu, i.e. the interrupt actually requires it!

The last one (is_percpu) is true for GIC PPI+SGI only.
 1.74  31-Oct-2021  skrll Assert we can sleep in pic_add
 1.73  31-Oct-2021  skrll Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
 1.72  26-Sep-2021  jmcneill If an SGI or PPI is established after interrupts are enabled, make sure
we unblock the source on _all_ CPUs and not just the CPU that is
establishing the interrupt.
 1.71  08-Aug-2021  skrll Re-apply

Move 'struct pic_pending' from percpu to struct cpu_info. Saves a few
instructions in splx.

There is(/was) no need to use atomic operations on the percpu / cpu_info
members, so don't.

Finally removng the use of percpu should help avoid problems with "late"
attaching cpus.
 1.70  27-Mar-2021  jmcneill Revert recent pic optimizations until I have more time to work on this.
 1.69  21-Feb-2021  jmcneill branches: 1.69.2;
Inline pic_set_priority and use cpu_dosoftints_ci when available.
 1.68  21-Feb-2021  skrll Fixup with __HAVE_PREEMPTION code which is currently unused
 1.67  20-Feb-2021  jmcneill Inline "pic_do_pending_ints" in splx and check ci_pending_ipls to optimize
the common case (hw priority, no cascaded interrupts pending).

This also removes the need for the "pic_pending_used" flag, and should fix
booting on Raspberry Pi 3.
 1.66  20-Feb-2021  jmcneill Move 'struct pic_pending' from percpu to struct cpu_info. Saves a few
instructions in splx.
 1.65  16-Feb-2021  jmcneill pic: avoid pic_do_pending_ints if pic_mark_pending_* has never been called
 1.64  15-Feb-2021  jmcneill splx: use pic_set_priority_psw in interrupts disabled case to skip a few
more daif accesses.
 1.63  15-Feb-2021  jmcneill pic: reduce the number of daif accesses in pic_do_pending_ints

The caller has already provided daif state. No need to keep updating
daif via pic_set_priority if it's already in the state we need (interrupts
disabled).
 1.62  07-Feb-2021  jmcneill Use ENABLE_INTERRUPT() / DISABLE_INTERRUPT() instead of cpsie()/cpsid() in
places where we don't care about the cpsie() return value.
 1.61  01-Nov-2020  jmcneill branches: 1.61.2;
intr_ipi_send: assert that kcp is either NULL or contains exactly one CPU
 1.60  26-Oct-2020  skrll Improve a comment
 1.59  26-Oct-2020  skrll KNF
 1.58  25-Oct-2020  skrll KASSERT -> KASSERTMSG
 1.57  27-Jul-2020  skrll Trailing whitespace
 1.56  01-Feb-2020  riastradh KNF
 1.55  01-Feb-2020  riastradh Reduce some ifdefs.
 1.54  01-Feb-2020  riastradh pic_pending_zero is unnecessary; percpu_alloc already zeroes.
 1.53  01-Feb-2020  riastradh Switch arm pic allocation and initialization to percpu_create.
 1.52  24-Dec-2019  skrll branches: 1.52.2;
Update pic_add to allocate and return an irqbase if passed
PIC_IRQBASE_ALLOC.
 1.51  24-Dec-2019  skrll Make pic_sourcebase static
 1.50  23-Dec-2019  jmcneill Add reference counts to intr_mask/intr_unmask as calls can be nested, spotted by thorpej
 1.49  23-Dec-2019  jmcneill Implement acpi_md_intr_mask and acpi_md_intr_unmask
 1.48  16-Nov-2018  jmcneill Add intr_establish_xname support to arm and expose it to intrctl
 1.47  13-Nov-2018  jmcneill Fix intrctl for pics with non-0 irqbase
 1.46  11-Nov-2018  jmcneill Add support for intrctl(8).
 1.45  12-Oct-2018  jmcneill Implement intr_string(9)
 1.44  15-Jul-2018  jmcneill Add support for setting and getting interrupt affinity.
 1.43  09-Jul-2018  ryo fix false positive KASSERT.
the case that secondary processors failed to hatch, and not attached.

when "cpu1 at cpus0: disabled (unresponsive)"
 1.42  01-Apr-2018  ryo branches: 1.42.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
 1.41  12-Oct-2017  skrll branches: 1.41.2;
Trailing whitespace
 1.40  21-Sep-2017  skrll spaces to TAB
 1.39  29-Aug-2017  nisimura decouple pic_ipi_kpreempt() from DDB
 1.38  25-Aug-2017  jmcneill The assertion at the bottom of intr_ipi_send is invalid for UP configs; add
a text for arm_cpu_max == 1
 1.37  01-Jun-2017  chs remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.
 1.36  11-Oct-2015  mlelstv unblock interrupts also when reusing a previously freed irq slot.
 1.35  18-Apr-2015  skrll Serialise work in pic_add.
 1.34  15-Apr-2015  matt Add separate IPI routines for IPI_AST and IPI_KPREEMPT.
 1.33  14-Apr-2015  jmcneill __HAVE_PREEEMPTION -> __HAVE_PREEMPTION
 1.32  12-Apr-2015  matt Don't send IPIs to ourselves if sending to everyone.
 1.31  12-Apr-2015  matt Don't need pic_ipi_sender anymore.
 1.30  12-Apr-2015  matt Use right kcpuset call.
 1.29  11-Apr-2015  matt Adapt pic to deal with the BCM2836 interrupts.
Move pic_pending_pics, pic_pending_ipls, and pic_blocked_irqs into a
structure and make then per-cpu. There is no global interrupt state anymore.
 1.28  08-Apr-2015  matt Add __HAVE_PIC_HAVE_PENDING_INTRS and define it if __HAVE_PIC_SET_PRIORITY
is undefined (also define in mvsoc_intr.h since their use of the latter is
peculiar). This new define controls whether the pending interrupt logic is
compiled. The GIC doesn't use pending interrupts since it uses the priority
level on the GIC to control delivery of interrupts, thus there can never
be a pending interrupt. The kernel shrinks about 4KB with the removal of
the pending interupt support,
 1.27  08-Apr-2015  matt Don't clear CI_ASTPENDING in exception return, do it in ast() instead.
Add basic support for __HAVE_PREEMPTION.
Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
Use kpreempt_disable/kpreempt_enable
 1.26  29-Mar-2015  matt Add aarch64 support (mostly remapping I32_bit and F32_bit onto aarch64 bits).
 1.25  08-Nov-2014  skrll branches: 1.25.2;
Include opt_multiprocessor.h
 1.24  29-Oct-2014  skrll In the MULTIPROCESSOR case mark all interrupt handlers not at IPL_VM as
mpsafe, so the kernel_lock is only taken at IPL_VM as per spl(9).
 1.23  13-Oct-2014  skrll Comment out a printf that was confusing entering ddb output.
 1.22  19-May-2014  rmind branches: 1.22.2;
Implement MI IPI interface with cross-call support.
 1.21  13-Mar-2014  matt branches: 1.21.2;
Support MPSAFE interrupts.
 1.20  03-Mar-2014  matt Add a mpsafe flag to the intrsource
 1.19  28-Jan-2014  martin Mark a diagnostic-only variable
 1.18  08-Dec-2013  skrll Mark rv as unused (for now)
 1.17  07-Sep-2013  matt Use KASSERTMSG
 1.16  19-Aug-2013  skrll Whitespace
 1.15  30-Oct-2012  msaitoh branches: 1.15.2; 1.15.6;
Fix a bug that incorrect arg is passed to pic_block_irqs() on disestablish.
Fixes PR#45371 by Yuichiro Goto.
 1.14  01-Sep-2012  matt branches: 1.14.2;
Add #ifdef DIAGNOSTIC / #endif
 1.13  01-Sep-2012  matt Add PIC hooks for MP and for the ARM Generic Interrupt Controller.
 1.12  20-Jul-2012  matt Fix botched change to use right value for ipl. Thanks jak
 1.11  14-Jul-2012  matt Add hooks for __HAVE_PIC_SET_PRIORITY which allows updating of a hardware
(PIC) priority based on current IPL.
 1.10  07-Jul-2012  skrll Convert a KASSERT to a KASSERTMSG
 1.9  04-Jul-2012  skrll Add a KASSERT
 1.8  11-Mar-2011  bsh branches: 1.8.4; 1.8.10; 1.8.12;
split arch/arm/pic/pic.c so that we can implement more efficient version of splfoo() while using pic framework.
 1.7  01-Feb-2011  jakllsch Increment ci->ci_intr_depth for the duration of pic_do_pending_ints().
Fixes locking catastrophy commonly noticed with mvsata(4) on evbarm.
 1.6  31-Aug-2010  kiyohara branches: 1.6.2; 1.6.4;
Fix lost interrupt. (2/2)
+ It is likely to lose sight of interrupt when the interrupt of irq_base
that is smaller than the same at the level is generated if PIC_MAXSOURCES
is 33 or more.
 1.5  31-Aug-2010  kiyohara Fix lost interrupt. (1/2)
+ Change blocked_irqs that dispach if change pending_irqs in the loop.
 1.4  30-Dec-2008  matt branches: 1.4.4; 1.4.6;
Use atomic ops to manipulate the bitmasks.
 1.3  28-Apr-2008  martin branches: 1.3.8; 1.3.16;
Remove clause 3 and 4 from TNF licenses
 1.2  27-Apr-2008  matt Merge kernel changes in matt-armv6 to HEAD.
 1.1  29-Aug-2007  matt branches: 1.1.2; 1.1.20; 1.1.22; 1.1.24;
file pic.c was initially added on branch matt-armv6.
 1.1.24.3  09-Oct-2010  yamt sync with head
 1.1.24.2  04-May-2009  yamt sync with head.
 1.1.24.1  16-May-2008  yamt sync with head.
 1.1.22.1  18-May-2008  yamt sync with head.
 1.1.20.2  17-Jan-2009  mjf Sync with HEAD.
 1.1.20.1  02-Jun-2008  mjf Sync with HEAD.
 1.1.2.13  23-Mar-2008  matt sync with HEAD
 1.1.2.12  01-Mar-2008  matt fix off-by-error.
pass irq_base to pic_find_pending_irqs_by_ipl
 1.1.2.11  29-Feb-2008  matt fix another swapped argument
 1.1.2.10  29-Feb-2008  matt Fix swapped args to pic_find_pending_irqs_by_ipl
 1.1.2.9  29-Feb-2008  matt set pic->pic_id to the slot # when we add it.
 1.1.2.8  29-Feb-2008  matt Make sure we established the interrupts we thought we did.
 1.1.2.7  29-Feb-2008  matt Rework establish_irq to take an intrsource.
Enable an interrupt after establishing it.
 1.1.2.6  28-Jan-2008  matt Update to new vmlocking world.
 1.1.2.5  06-Nov-2007  matt add spl* routines and prototypes.
add intr_establish/intr_disestablish
 1.1.2.4  12-Sep-2007  matt Add commented out debug code to pic_add.
 1.1.2.3  11-Sep-2007  matt Another round of pic code. Includes spl* code.
 1.1.2.2  30-Aug-2007  matt More W-I-P
 1.1.2.1  29-Aug-2007  matt Commit W-I-P new generic interrupt controller code similar in idea
to the one in ppcoea-renovation.
 1.3.16.1  15-Feb-2014  matt Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.
 1.3.8.1  19-Jan-2009  skrll Sync with HEAD.
 1.4.6.2  21-Apr-2011  rmind sync with head
 1.4.6.1  05-Mar-2011  rmind sync with head
 1.4.4.1  22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.6.4.1  08-Feb-2011  bouyer Sync with HEAD
 1.6.2.1  06-Jun-2011  jruoho Sync with HEAD.
 1.8.12.1  28-Nov-2012  matt Merge improved arm support (especially Cortex) from HEAD
including OMAP and BCM53xx support.
 1.8.10.1  19-Nov-2012  riz Pull up following revision(s) (requested by msaitoh in ticket #656):
sys/arch/arm/pic/pic.c: revision 1.15
Fix a bug that incorrect arg is passed to pic_block_irqs() on disestablish.
Fixes PR#45371 by Yuichiro Goto.
 1.8.4.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.8.4.2  16-Jan-2013  yamt sync with (a bit old) head
 1.8.4.1  30-Oct-2012  yamt sync with head
 1.14.2.3  03-Dec-2017  jdolecek update from HEAD
 1.14.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.14.2.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.15.6.1  10-May-2013  khorben Allow interrupt handlers to be temporarily disabled or enabled again,
including from within interrupt context: returning non-zero keeps the
handler enabled (as previously), while returning zero disables the
interrupt until a call to intr_enable().

This is necessary with the TPS65950 companion chip because:
- it interrupts on the main code (via IRQ_SYS_nIRQ0)
- interrupt handling requires I2C traffic (to access registers)
- interrupt-based interaction is necessary with this chip (keypad, GPIO...)

XXX Affects other ARM devices using the ARM PIC code, additional code
review is required to address them.
 1.15.2.2  18-May-2014  rmind sync with head
 1.15.2.1  28-Aug-2013  rmind sync with head
 1.21.2.1  10-Aug-2014  tls Rebase.
 1.22.2.3  30-Jul-2015  martin Pull up following revision(s) (requested by skrll in ticket #890):
sys/arch/arm/pic/pic.c: revision 1.27-1.32
sys/arch/arm/omap/omap5430_intr.h: revision 1.3
sys/arch/arm/broadcom/bcm2835_obio.c: revision 1.25
sys/arch/arm/cortex/gic.c: revision 1.18
sys/arch/arm/broadcom/bcm2835reg.h: revision 1.15
sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.61
sys/arch/arm/broadcom/bcm2835_intr.h: revision 1.2
sys/arch/arm/marvell/mvsoc_intr.h: revision 1.5
sys/arch/arm/broadcom/bcm2835_intr.c: revision 1.8-1.10
sys/arch/arm/pic/picvar.h: revision 1.12-1.14
sys/arch/arm/omap/omap4430_intr.h: revision 1.3

Don't clear CI_ASTPENDING in exception return, do it in ast() instead.
Add basic support for __HAVE_PREEMPTION.
Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
Use kpreempt_disable/kpreempt_enable
Add __HAVE_PIC_HAVE_PENDING_INTRS and define it if __HAVE_PIC_SET_PRIORITY
is undefined (also define in mvsoc_intr.h since their use of the latter is
peculiar). This new define controls whether the pending interrupt logic is
compiled. The GIC doesn't use pending interrupts since it uses the priority
level on the GIC to control delivery of interrupts, thus there can never
be a pending interrupt. The kernel shrinks about 4KB with the removal of
the pending interupt support,
Only if we __HAVE_PIC_PENDING_INTRS do we need the variables to track them.
Add #define __HAVE_PIC_PENDING_INTRS for the non-GIC PICs.
Add a pic_cpus to the softc which specifies which cpus the pic can send
IPIs to. For GIC, initialize pic_cpus to kcpuset_running since it can handle
all the cpus.
Adapt pic to deal with the BCM2836 interrupts.
Move pic_pending_pics, pic_pending_ipls, and pic_blocked_irqs into a
structure and make then per-cpu. There is no global interrupt state anymore.
Use right kcpuset call.
Don't need pic_ipi_sender anymore.
Don't send IPIs to ourselves if sending to everyone.
RPI2 MP support.
Thanks to Matt Thomas for making this possible with his changes to pic.c
Use a bit per IPI type in local mailbox 0 registers. Ok matt@
IPIs should be IPL_HIGH according to rmind@
Fix bcm2836mp_pic_{un,}block_irqs to handle timer AND mailbox interrupts
if they're both passed. Thanks to nat@ for finding this.
Sprinkle some KASSERTs
 1.22.2.2  10-Nov-2014  martin Pull up following revision(s) (requested by skrll in ticket #209):
sys/arch/arm/pic/pic.c: revision 1.25
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.21
sys/arch/arm/arm32/pmap.c: revision 1.312
sys/arch/arm/arm32/bus_dma.c: revision 1.89
sys/arch/arm/arm32/pmap.c: revision 1.313
sys/arch/arm/arm32/pmap.c: revision 1.314
sys/arch/arm/arm32/pmap.c: revision 1.315
sys/arch/arm/arm32/pmap.c: revision 1.316
Include opt_multiprocessor.h
When allocing a l1page, if a page isn't available, use uvm_wait to wait
for one to become available. Should fix PR/49364.
Post a dmb before invalidating the cache in the post-{read,write}
operations to ensure that any/all cachelines brought in via speculation
are really flushed.
Ensure all memory operations are complete by before wfi. For example, the
cpu could have just been in uvm_pageidlezero.
In pmap_fault_fixup re-instate the TLB flush for the shared L1 case that
occurs for non-ARM_MMU_EXTENDED kernels.
This fixes rump/rumpkern/t_sp:stress_killer on rpi which is currently
non-ARM_MMU_EXTENDED
Remove an unnecessary flush that sneaked in as part of break-before-make
change.
Remove an XXXNH comment.
Update PTE_SYNC_CURRENT to add a dsb for armv7 - part of the
break-before-make fix.
 1.22.2.1  09-Nov-2014  martin Pull up following revision(s) (requested by skrll in ticket #188):
sys/arch/arm/include/arm32/pmap.h: revision 1.136
sys/arch/arm/include/armreg.h: revision 1.100
sys/arch/arm/cortex/gic.c: revision 1.11
sys/arch/arm/arm32/db_interface.c: revision 1.54
sys/arch/arm/include/armreg.h: revision 1.101
sys/arch/arm/cortex/gic.c: revision 1.12
sys/arch/arm/arm32/arm32_machdep.c: revision 1.107
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20
sys/arch/evbarm/conf/BPI: revision 1.5
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21
sys/arch/arm/arm32/pmap.c: revision 1.306
sys/arch/arm/arm32/db_machdep.c: revision 1.22
sys/arch/arm/arm32/arm32_tlb.c: revision 1.3
sys/arch/arm/arm/undefined.c: revision 1.55
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22
sys/arch/arm/arm32/pmap.c: revision 1.307
sys/arch/arm/arm32/arm32_tlb.c: revision 1.4
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23
sys/arch/arm/arm32/arm32_tlb.c: revision 1.5
sys/arch/evbarm/conf/BPI: revision 1.8
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24
sys/arch/arm/arm32/arm32_tlb.c: revision 1.6
sys/arch/arm/arm32/arm32_tlb.c: revision 1.7
sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5
sys/arch/arm/pic/pic.c: revision 1.23
sys/arch/arm/pic/pic.c: revision 1.24
sys/arch/arm/pic/picvar.h: revision 1.11
sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20
sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16
sys/arch/arm/arm32/pmap.c: revision 1.298
sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17
sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5
sys/arch/arm/arm32/pmap.c: revision 1.310
sys/arch/arm/arm32/pmap.c: revision 1.311
sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32
sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19
sys/arch/arm/arm32/arm32_boot.c: revision 1.10
sys/arch/arm/arm/ast.c: revision 1.25
sys/arch/arm/include/armreg.h: revision 1.98
sys/uvm/pmap/pmap_tlb.c: revision 1.10
sys/arch/arm/arm32/arm32_boot.c: revision 1.8
sys/arch/arm/arm32/arm32_boot.c: revision 1.9
sys/arch/arm/arm/arm_machdep.c: revision 1.43
Various ARM MP fixes.
 1.25.2.4  28-Aug-2017  skrll Sync with HEAD
 1.25.2.3  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.25.2.2  06-Jun-2015  skrll Sync with HEAD
 1.25.2.1  06-Apr-2015  skrll Sync with HEAD
 1.41.2.4  26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.41.2.3  20-Oct-2018  pgoyette Sync with head
 1.41.2.2  28-Jul-2018  pgoyette Sync with HEAD
 1.41.2.1  07-Apr-2018  pgoyette Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
 1.42.2.2  08-Apr-2020  martin Merge changes from current as of 20200406
 1.42.2.1  10-Jun-2019  christos Sync with HEAD
 1.52.2.1  29-Feb-2020  ad Sync with head.
 1.61.2.1  03-Apr-2021  thorpej Sync with HEAD.
 1.69.2.1  03-Apr-2021  thorpej Sync with HEAD.

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