pic.c revision 1.62 1 /* $NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #define _INTR_PRIVATE
32 #include "opt_ddb.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $");
37
38 #include <sys/param.h>
39 #include <sys/atomic.h>
40 #include <sys/cpu.h>
41 #include <sys/evcnt.h>
42 #include <sys/interrupt.h>
43 #include <sys/intr.h>
44 #include <sys/ipi.h>
45 #include <sys/kernel.h>
46 #include <sys/kmem.h>
47 #include <sys/mutex.h>
48 #include <sys/once.h>
49 #include <sys/xcall.h>
50
51 #include <arm/armreg.h>
52 #include <arm/cpufunc.h>
53 #include <arm/locore.h> /* for compat aarch64 */
54
55 #ifdef DDB
56 #include <arm/db_machdep.h>
57 #endif
58
59 #include <arm/pic/picvar.h>
60
61 #if defined(__HAVE_PIC_PENDING_INTRS)
62 /*
63 * This implementation of pending interrupts on a MULTIPROCESSOR system makes
64 * the assumption that a PIC (pic_softc) shall only have all its interrupts
65 * come from the same CPU. In other words, interrupts from a single PIC will
66 * not be distributed among multiple CPUs.
67 */
68 struct pic_pending {
69 volatile uint32_t blocked_pics;
70 volatile uint32_t pending_pics;
71 volatile uint32_t pending_ipls;
72 };
73 static uint32_t
74 pic_find_pending_irqs_by_ipl(struct pic_softc *, size_t, uint32_t, int);
75 static struct pic_softc *
76 pic_list_find_pic_by_pending_ipl(struct pic_pending *, uint32_t);
77 static void
78 pic_deliver_irqs(struct pic_pending *, struct pic_softc *, int, void *);
79 static void
80 pic_list_deliver_irqs(struct pic_pending *, register_t, int, void *);
81
82 #ifdef MULTIPROCESSOR
83 percpu_t *pic_pending_percpu;
84 static struct pic_pending *
85 pic_pending_get(void)
86 {
87 return percpu_getref(pic_pending_percpu);
88 }
89 static void
90 pic_pending_put(struct pic_pending *pend)
91 {
92 percpu_putref(pic_pending_percpu);
93 }
94 #else
95 struct pic_pending pic_pending;
96 #define pic_pending_get() (&pic_pending)
97 #define pic_pending_put(pend) __nothing
98 #endif /* MULTIPROCESSOR */
99 #endif /* __HAVE_PIC_PENDING_INTRS */
100
101 struct pic_softc *pic_list[PIC_MAXPICS];
102 #if PIC_MAXPICS > 32
103 #error PIC_MAXPICS > 32 not supported
104 #endif
105 struct intrsource *pic_sources[PIC_MAXMAXSOURCES];
106 struct intrsource *pic__iplsources[PIC_MAXMAXSOURCES];
107 struct intrsource **pic_iplsource[NIPL] = {
108 [0 ... NIPL-1] = pic__iplsources,
109 };
110 size_t pic_ipl_offset[NIPL+1];
111
112 static kmutex_t pic_lock;
113 static size_t pic_sourcebase;
114 static int pic_lastbase;
115 static struct evcnt pic_deferral_ev =
116 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "deferred", "intr");
117 EVCNT_ATTACH_STATIC(pic_deferral_ev);
118
119 static int pic_init(void);
120
121 #ifdef __HAVE_PIC_SET_PRIORITY
122 void
123 pic_set_priority(struct cpu_info *ci, int newipl)
124 {
125 register_t psw = cpsid(I32_bit);
126 if (pic_list[0] != NULL)
127 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
128 ci->ci_cpl = newipl;
129 if ((psw & I32_bit) == 0)
130 cpsie(I32_bit);
131 }
132 #endif
133
134 #ifdef MULTIPROCESSOR
135 int
136 pic_ipi_ast(void *arg)
137 {
138 setsoftast(curcpu());
139 return 1;
140 }
141
142 int
143 pic_ipi_nop(void *arg)
144 {
145 /* do nothing */
146 return 1;
147 }
148
149 int
150 pic_ipi_xcall(void *arg)
151 {
152 xc_ipi_handler();
153 return 1;
154 }
155
156 int
157 pic_ipi_generic(void *arg)
158 {
159 ipi_cpu_handler();
160 return 1;
161 }
162
163 #ifdef DDB
164 int
165 pic_ipi_ddb(void *arg)
166 {
167 // printf("%s: %s: tf=%p\n", __func__, curcpu()->ci_cpuname, arg);
168 kdb_trap(-1, arg);
169 return 1;
170 }
171 #endif /* DDB */
172
173 #ifdef __HAVE_PREEMPTION
174 int
175 pic_ipi_kpreempt(void *arg)
176 {
177 atomic_or_uint(&curcpu()->ci_astpending, __BIT(1));
178 return 1;
179 }
180 #endif /* __HAVE_PREEMPTION */
181
182 void
183 intr_cpu_init(struct cpu_info *ci)
184 {
185 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
186 struct pic_softc * const pic = pic_list[slot];
187 if (pic != NULL && pic->pic_ops->pic_cpu_init != NULL) {
188 (*pic->pic_ops->pic_cpu_init)(pic, ci);
189 }
190 }
191 }
192
193 typedef void (*pic_ipi_send_func_t)(struct pic_softc *, u_long);
194
195 void
196 intr_ipi_send(const kcpuset_t *kcp, u_long ipi)
197 {
198 struct cpu_info * const ci = curcpu();
199 KASSERT(ipi < NIPI);
200 KASSERT(kcp == NULL || kcpuset_countset(kcp) == 1);
201 bool __diagused sent_p = false;
202 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
203 struct pic_softc * const pic = pic_list[slot];
204 if (pic == NULL || pic->pic_cpus == NULL)
205 continue;
206 if (kcp == NULL || kcpuset_intersecting_p(kcp, pic->pic_cpus)) {
207 /*
208 * Never send to ourself.
209 *
210 * This test uses pointer comparison for systems
211 * that have a pic per cpu, e.g. RPI[23]. GIC sets
212 * pic_cpus to kcpuset_running and handles "not for
213 * self" internally.
214 */
215 if (pic->pic_cpus == ci->ci_kcpuset)
216 continue;
217
218 (*pic->pic_ops->pic_ipi_send)(pic, kcp, ipi);
219
220 /*
221 * If we were targeting a single CPU or this pic
222 * handles all cpus, we're done.
223 */
224 if (kcp != NULL || pic->pic_cpus == kcpuset_running)
225 return;
226 sent_p = true;
227 }
228 }
229 KASSERTMSG(cold || sent_p || ncpu <= 1, "cold %d sent_p %d ncpu %d",
230 cold, sent_p, ncpu);
231 }
232 #endif /* MULTIPROCESSOR */
233
234 #ifdef __HAVE_PIC_FAST_SOFTINTS
235 int
236 pic_handle_softint(void *arg)
237 {
238 void softint_switch(lwp_t *, int);
239 struct cpu_info * const ci = curcpu();
240 const size_t softint = (size_t) arg;
241 int s = splhigh();
242 ci->ci_intr_depth--; // don't count these as interrupts
243 softint_switch(ci->ci_softlwps[softint], s);
244 ci->ci_intr_depth++;
245 splx(s);
246 return 1;
247 }
248 #endif
249
250 int
251 pic_handle_intr(void *arg)
252 {
253 struct pic_softc * const pic = arg;
254 int rv;
255
256 rv = (*pic->pic_ops->pic_find_pending_irqs)(pic);
257
258 return rv > 0;
259 }
260
261 #if defined(__HAVE_PIC_PENDING_INTRS)
262 void
263 pic_mark_pending_source(struct pic_softc *pic, struct intrsource *is)
264 {
265 const uint32_t ipl_mask = __BIT(is->is_ipl);
266
267 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
268 __BIT(is->is_irq & 0x1f));
269
270 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
271 struct pic_pending *pend = pic_pending_get();
272 atomic_or_32(&pend->pending_ipls, ipl_mask);
273 atomic_or_32(&pend->pending_pics, __BIT(pic->pic_id));
274 pic_pending_put(pend);
275 }
276
277 void
278 pic_mark_pending(struct pic_softc *pic, int irq)
279 {
280 struct intrsource * const is = pic->pic_sources[irq];
281
282 KASSERT(irq < pic->pic_maxsources);
283 KASSERT(is != NULL);
284
285 pic_mark_pending_source(pic, is);
286 }
287
288 uint32_t
289 pic_mark_pending_sources(struct pic_softc *pic, size_t irq_base,
290 uint32_t pending)
291 {
292 struct intrsource ** const isbase = &pic->pic_sources[irq_base];
293 struct intrsource *is;
294 volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
295 uint32_t ipl_mask = 0;
296
297 if (pending == 0)
298 return ipl_mask;
299
300 KASSERT((irq_base & 31) == 0);
301
302 (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
303
304 atomic_or_32(ipending, pending);
305 while (pending != 0) {
306 int n = ffs(pending);
307 if (n-- == 0)
308 break;
309 is = isbase[n];
310 KASSERT(is != NULL);
311 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
312 pending &= ~__BIT(n);
313 ipl_mask |= __BIT(is->is_ipl);
314 }
315
316 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
317 struct pic_pending *pend = pic_pending_get();
318 atomic_or_32(&pend->pending_ipls, ipl_mask);
319 atomic_or_32(&pend->pending_pics, __BIT(pic->pic_id));
320 pic_pending_put(pend);
321 return ipl_mask;
322 }
323
324 uint32_t
325 pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
326 uint32_t pending, int ipl)
327 {
328 uint32_t ipl_irq_mask = 0;
329 uint32_t irq_mask;
330
331 for (;;) {
332 int irq = ffs(pending);
333 if (irq-- == 0)
334 return ipl_irq_mask;
335
336 irq_mask = __BIT(irq);
337 #if 1
338 KASSERTMSG(pic->pic_sources[irq_base + irq] != NULL,
339 "%s: irq_base %zu irq %d\n", __func__, irq_base, irq);
340 #else
341 if (pic->pic_sources[irq_base + irq] == NULL) {
342 aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
343 irq_base, irq);
344 } else
345 #endif
346 if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
347 ipl_irq_mask |= irq_mask;
348
349 pending &= ~irq_mask;
350 }
351 }
352 #endif /* __HAVE_PIC_PENDING_INTRS */
353
354 void
355 pic_dispatch(struct intrsource *is, void *frame)
356 {
357 int (*func)(void *) = is->is_func;
358 void *arg = is->is_arg;
359
360 if (__predict_false(arg == NULL)) {
361 if (__predict_false(frame == NULL)) {
362 pic_deferral_ev.ev_count++;
363 return;
364 }
365 arg = frame;
366 }
367
368 #ifdef MULTIPROCESSOR
369 if (!is->is_mpsafe) {
370 KERNEL_LOCK(1, NULL);
371 const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
372 const u_int l_blcnt __diagused = curlwp->l_blcnt;
373 (void)(*func)(arg);
374 KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
375 KASSERT(l_blcnt == curlwp->l_blcnt);
376 KERNEL_UNLOCK_ONE(NULL);
377 } else
378 #endif
379 (void)(*func)(arg);
380
381 struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
382 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
383 pcpu->pcpu_evs[is->is_irq].ev_count++;
384 percpu_putref(is->is_pic->pic_percpu);
385 }
386
387 #if defined(__HAVE_PIC_PENDING_INTRS)
388 void
389 pic_deliver_irqs(struct pic_pending *pend, struct pic_softc *pic, int ipl,
390 void *frame)
391 {
392 const uint32_t ipl_mask = __BIT(ipl);
393 struct intrsource *is;
394 volatile uint32_t *ipending = pic->pic_pending_irqs;
395 volatile uint32_t *iblocked = pic->pic_blocked_irqs;
396 size_t irq_base;
397 #if PIC_MAXSOURCES > 32
398 size_t irq_count;
399 int poi = 0; /* Possibility of interrupting */
400 #endif
401 uint32_t pending_irqs;
402 uint32_t blocked_irqs;
403 int irq;
404 bool progress __diagused = false;
405
406 KASSERT(pic->pic_pending_ipls & ipl_mask);
407
408 irq_base = 0;
409 #if PIC_MAXSOURCES > 32
410 irq_count = 0;
411 #endif
412
413 for (;;) {
414 pending_irqs = pic_find_pending_irqs_by_ipl(pic, irq_base,
415 *ipending, ipl);
416 KASSERT((pending_irqs & *ipending) == pending_irqs);
417 KASSERT((pending_irqs & ~(*ipending)) == 0);
418 if (pending_irqs == 0) {
419 #if PIC_MAXSOURCES > 32
420 irq_count += 32;
421 if (__predict_true(irq_count >= pic->pic_maxsources)) {
422 if (!poi)
423 /*Interrupt at this level was handled.*/
424 break;
425 irq_base = 0;
426 irq_count = 0;
427 poi = 0;
428 ipending = pic->pic_pending_irqs;
429 iblocked = pic->pic_blocked_irqs;
430 } else {
431 irq_base += 32;
432 ipending++;
433 iblocked++;
434 KASSERT(irq_base <= pic->pic_maxsources);
435 }
436 continue;
437 #else
438 break;
439 #endif
440 }
441 progress = true;
442 blocked_irqs = 0;
443 do {
444 irq = ffs(pending_irqs) - 1;
445 KASSERT(irq >= 0);
446
447 atomic_and_32(ipending, ~__BIT(irq));
448 is = pic->pic_sources[irq_base + irq];
449 if (is != NULL) {
450 ENABLE_INTERRUPT();
451 pic_dispatch(is, frame);
452 DISABLE_INTERRUPT();
453 #if PIC_MAXSOURCES > 32
454 /*
455 * There is a possibility of interrupting
456 * from ENABLE_INTERRUPT() to
457 * DISABLE_INTERRUPT().
458 */
459 poi = 1;
460 #endif
461 blocked_irqs |= __BIT(irq);
462 } else {
463 KASSERT(0);
464 }
465 pending_irqs = pic_find_pending_irqs_by_ipl(pic,
466 irq_base, *ipending, ipl);
467 } while (pending_irqs);
468 if (blocked_irqs) {
469 atomic_or_32(iblocked, blocked_irqs);
470 atomic_or_32(&pend->blocked_pics, __BIT(pic->pic_id));
471 }
472 }
473
474 KASSERT(progress);
475 /*
476 * Since interrupts are disabled, we don't have to be too careful
477 * about these.
478 */
479 if (atomic_and_32_nv(&pic->pic_pending_ipls, ~ipl_mask) == 0)
480 atomic_and_32(&pend->pending_pics, ~__BIT(pic->pic_id));
481 }
482
483 static void
484 pic_list_unblock_irqs(struct pic_pending *pend)
485 {
486 uint32_t blocked_pics = pend->blocked_pics;
487
488 pend->blocked_pics = 0;
489
490 for (;;) {
491 struct pic_softc *pic;
492 #if PIC_MAXSOURCES > 32
493 volatile uint32_t *iblocked;
494 uint32_t blocked;
495 size_t irq_base;
496 #endif
497
498 int pic_id = ffs(blocked_pics);
499 if (pic_id-- == 0)
500 return;
501
502 pic = pic_list[pic_id];
503 KASSERT(pic != NULL);
504 #if PIC_MAXSOURCES > 32
505 for (irq_base = 0, iblocked = pic->pic_blocked_irqs;
506 irq_base < pic->pic_maxsources;
507 irq_base += 32, iblocked++) {
508 if ((blocked = *iblocked) != 0) {
509 (*pic->pic_ops->pic_unblock_irqs)(pic,
510 irq_base, blocked);
511 atomic_and_32(iblocked, ~blocked);
512 }
513 }
514 #else
515 KASSERT(pic->pic_blocked_irqs[0] != 0);
516 (*pic->pic_ops->pic_unblock_irqs)(pic,
517 0, pic->pic_blocked_irqs[0]);
518 pic->pic_blocked_irqs[0] = 0;
519 #endif
520 blocked_pics &= ~__BIT(pic_id);
521 }
522 }
523
524 struct pic_softc *
525 pic_list_find_pic_by_pending_ipl(struct pic_pending *pend, uint32_t ipl_mask)
526 {
527 uint32_t pending_pics = pend->pending_pics;
528 struct pic_softc *pic;
529
530 for (;;) {
531 int pic_id = ffs(pending_pics);
532 if (pic_id-- == 0)
533 return NULL;
534
535 pic = pic_list[pic_id];
536 KASSERT(pic != NULL);
537 if (pic->pic_pending_ipls & ipl_mask)
538 return pic;
539 pending_pics &= ~__BIT(pic_id);
540 }
541 }
542
543 void
544 pic_list_deliver_irqs(struct pic_pending *pend, register_t psw, int ipl,
545 void *frame)
546 {
547 const uint32_t ipl_mask = __BIT(ipl);
548 struct pic_softc *pic;
549
550 while ((pic = pic_list_find_pic_by_pending_ipl(pend, ipl_mask)) != NULL) {
551 pic_deliver_irqs(pend, pic, ipl, frame);
552 KASSERT((pic->pic_pending_ipls & ipl_mask) == 0);
553 }
554 atomic_and_32(&pend->pending_ipls, ~ipl_mask);
555 }
556 #endif /* __HAVE_PIC_PENDING_INTRS */
557
558 void
559 pic_do_pending_ints(register_t psw, int newipl, void *frame)
560 {
561 struct cpu_info * const ci = curcpu();
562 if (__predict_false(newipl == IPL_HIGH)) {
563 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl %d", ci->ci_cpl);
564 return;
565 }
566 #if defined(__HAVE_PIC_PENDING_INTRS)
567 struct pic_pending *pend = pic_pending_get();
568 while ((pend->pending_ipls & ~__BIT(newipl)) > __BIT(newipl)) {
569 KASSERT(pend->pending_ipls < __BIT(NIPL));
570 for (;;) {
571 int ipl = 31 - __builtin_clz(pend->pending_ipls);
572 KASSERT(ipl < NIPL);
573 if (ipl <= newipl)
574 break;
575
576 pic_set_priority(ci, ipl);
577 pic_list_deliver_irqs(pend, psw, ipl, frame);
578 pic_list_unblock_irqs(pend);
579 }
580 }
581 pic_pending_put(pend);
582 #endif /* __HAVE_PIC_PENDING_INTRS */
583 #ifdef __HAVE_PREEMPTION
584 if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
585 pic_set_priority(ci, IPL_SCHED);
586 kpreempt(0);
587 }
588 #endif
589 if (ci->ci_cpl != newipl)
590 pic_set_priority(ci, newipl);
591 }
592
593 static void
594 pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
595 {
596 struct pic_percpu * const pcpu = v0;
597 struct pic_softc * const pic = v1;
598
599 pcpu->pcpu_evs = kmem_zalloc(pic->pic_maxsources * sizeof(pcpu->pcpu_evs[0]),
600 KM_SLEEP);
601 KASSERT(pcpu->pcpu_evs != NULL);
602
603 #define PCPU_NAMELEN 32
604 #ifdef DIAGNOSTIC
605 const size_t namelen = strlen(pic->pic_name) + 4 + strlen(ci->ci_data.cpu_name);
606 #endif
607
608 KASSERT(namelen < PCPU_NAMELEN);
609 pcpu->pcpu_name = kmem_alloc(PCPU_NAMELEN, KM_SLEEP);
610 #ifdef MULTIPROCESSOR
611 snprintf(pcpu->pcpu_name, PCPU_NAMELEN,
612 "%s (%s)", pic->pic_name, ci->ci_data.cpu_name);
613 #else
614 strlcpy(pcpu->pcpu_name, pic->pic_name, PCPU_NAMELEN);
615 #endif
616 pcpu->pcpu_magic = PICPERCPU_MAGIC;
617 #if 0
618 printf("%s: %s %s: <%s>\n",
619 __func__, ci->ci_data.cpu_name, pic->pic_name,
620 pcpu->pcpu_name);
621 #endif
622 }
623
624 static int
625 pic_init(void)
626 {
627
628 mutex_init(&pic_lock, MUTEX_DEFAULT, IPL_HIGH);
629
630 return 0;
631 }
632
633 int
634 pic_add(struct pic_softc *pic, int irqbase)
635 {
636 int slot, maybe_slot = -1;
637 size_t sourcebase;
638 static ONCE_DECL(pic_once);
639
640 RUN_ONCE(&pic_once, pic_init);
641
642 KASSERT(strlen(pic->pic_name) > 0);
643
644 #if defined(__HAVE_PIC_PENDING_INTRS) && defined(MULTIPROCESSOR)
645 if (__predict_false(pic_pending_percpu == NULL))
646 pic_pending_percpu = percpu_alloc(sizeof(struct pic_pending));
647 #endif /* __HAVE_PIC_PENDING_INTRS && MULTIPROCESSOR */
648
649 mutex_enter(&pic_lock);
650 if (irqbase == PIC_IRQBASE_ALLOC) {
651 irqbase = pic_lastbase;
652 }
653 for (slot = 0; slot < PIC_MAXPICS; slot++) {
654 struct pic_softc * const xpic = pic_list[slot];
655 if (xpic == NULL) {
656 if (maybe_slot < 0)
657 maybe_slot = slot;
658 if (irqbase < 0)
659 break;
660 continue;
661 }
662 if (irqbase < 0 || xpic->pic_irqbase < 0)
663 continue;
664 if (irqbase >= xpic->pic_irqbase + xpic->pic_maxsources)
665 continue;
666 if (irqbase + pic->pic_maxsources <= xpic->pic_irqbase)
667 continue;
668 panic("pic_add: pic %s (%zu sources @ irq %u) conflicts"
669 " with pic %s (%zu sources @ irq %u)",
670 pic->pic_name, pic->pic_maxsources, irqbase,
671 xpic->pic_name, xpic->pic_maxsources, xpic->pic_irqbase);
672 }
673 slot = maybe_slot;
674 #if 0
675 printf("%s: pic_sourcebase=%zu pic_maxsources=%zu\n",
676 pic->pic_name, pic_sourcebase, pic->pic_maxsources);
677 #endif
678 KASSERTMSG(pic->pic_maxsources <= PIC_MAXSOURCES, "%zu",
679 pic->pic_maxsources);
680 KASSERT(pic_sourcebase + pic->pic_maxsources <= PIC_MAXMAXSOURCES);
681 sourcebase = pic_sourcebase;
682 pic_sourcebase += pic->pic_maxsources;
683 if (pic_lastbase < irqbase + pic->pic_maxsources)
684 pic_lastbase = irqbase + pic->pic_maxsources;
685 mutex_exit(&pic_lock);
686
687 /*
688 * Allocate a pointer to each cpu's evcnts and then, for each cpu,
689 * allocate its evcnts and then attach an evcnt for each pin.
690 * We can't allocate the evcnt structures directly since
691 * percpu will move the contents of percpu memory around and
692 * corrupt the pointers in the evcnts themselves. Remember, any
693 * problem can be solved with sufficient indirection.
694 */
695 pic->pic_percpu = percpu_create(sizeof(struct pic_percpu),
696 pic_percpu_allocate, NULL, pic);
697
698 pic->pic_sources = &pic_sources[sourcebase];
699 pic->pic_irqbase = irqbase;
700 pic->pic_id = slot;
701 #ifdef __HAVE_PIC_SET_PRIORITY
702 KASSERT((slot == 0) == (pic->pic_ops->pic_set_priority != NULL));
703 #endif
704 #ifdef MULTIPROCESSOR
705 KASSERT((pic->pic_cpus != NULL) == (pic->pic_ops->pic_ipi_send != NULL));
706 #endif
707 pic_list[slot] = pic;
708
709 return irqbase;
710 }
711
712 int
713 pic_alloc_irq(struct pic_softc *pic)
714 {
715 int irq;
716
717 for (irq = 0; irq < pic->pic_maxsources; irq++) {
718 if (pic->pic_sources[irq] == NULL)
719 return irq;
720 }
721
722 return -1;
723 }
724
725 static void
726 pic_percpu_evcnt_attach(void *v0, void *v1, struct cpu_info *ci)
727 {
728 struct pic_percpu * const pcpu = v0;
729 struct intrsource * const is = v1;
730
731 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
732 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
733 pcpu->pcpu_name, is->is_source);
734 }
735
736 void *
737 pic_establish_intr(struct pic_softc *pic, int irq, int ipl, int type,
738 int (*func)(void *), void *arg, const char *xname)
739 {
740 struct intrsource *is;
741 int off, nipl;
742
743 if (pic->pic_sources[irq]) {
744 printf("pic_establish_intr: pic %s irq %d already present\n",
745 pic->pic_name, irq);
746 return NULL;
747 }
748
749 is = kmem_zalloc(sizeof(*is), KM_SLEEP);
750 is->is_pic = pic;
751 is->is_irq = irq;
752 is->is_ipl = ipl;
753 is->is_type = type & 0xff;
754 is->is_func = func;
755 is->is_arg = arg;
756 #ifdef MULTIPROCESSOR
757 is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;
758 #endif
759
760 if (pic->pic_ops->pic_source_name)
761 (*pic->pic_ops->pic_source_name)(pic, irq, is->is_source,
762 sizeof(is->is_source));
763 else
764 snprintf(is->is_source, sizeof(is->is_source), "irq %d", irq);
765
766 /*
767 * Now attach the per-cpu evcnts.
768 */
769 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_attach, is);
770
771 pic->pic_sources[irq] = is;
772
773 /*
774 * First try to use an existing slot which is empty.
775 */
776 for (off = pic_ipl_offset[ipl]; off < pic_ipl_offset[ipl+1]; off++) {
777 if (pic__iplsources[off] == NULL) {
778 is->is_iplidx = off - pic_ipl_offset[ipl];
779 pic__iplsources[off] = is;
780 goto unblock;
781 }
782 }
783
784 /*
785 * Move up all the sources by one.
786 */
787 if (ipl < NIPL) {
788 off = pic_ipl_offset[ipl+1];
789 memmove(&pic__iplsources[off+1], &pic__iplsources[off],
790 sizeof(pic__iplsources[0]) * (pic_ipl_offset[NIPL] - off));
791 }
792
793 /*
794 * Advance the offset of all IPLs higher than this. Include an
795 * extra one as well. Thus the number of sources per ipl is
796 * pic_ipl_offset[ipl+1] - pic_ipl_offset[ipl].
797 */
798 for (nipl = ipl + 1; nipl <= NIPL; nipl++)
799 pic_ipl_offset[nipl]++;
800
801 /*
802 * Insert into the previously made position at the end of this IPL's
803 * sources.
804 */
805 off = pic_ipl_offset[ipl + 1] - 1;
806 is->is_iplidx = off - pic_ipl_offset[ipl];
807 pic__iplsources[off] = is;
808
809 (*pic->pic_ops->pic_establish_irq)(pic, is);
810
811 unblock:
812 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
813 __BIT(is->is_irq & 0x1f));
814
815 if (xname) {
816 if (is->is_xname == NULL)
817 is->is_xname = kmem_zalloc(INTRDEVNAMEBUF, KM_SLEEP);
818 if (is->is_xname[0] != '\0')
819 strlcat(is->is_xname, ", ", INTRDEVNAMEBUF);
820 strlcat(is->is_xname, xname, INTRDEVNAMEBUF);
821 }
822
823 /* We're done. */
824 return is;
825 }
826
827 static void
828 pic_percpu_evcnt_deattach(void *v0, void *v1, struct cpu_info *ci)
829 {
830 struct pic_percpu * const pcpu = v0;
831 struct intrsource * const is = v1;
832
833 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
834 evcnt_detach(&pcpu->pcpu_evs[is->is_irq]);
835 }
836
837 void
838 pic_disestablish_source(struct intrsource *is)
839 {
840 struct pic_softc * const pic = is->is_pic;
841 const int irq = is->is_irq;
842
843 KASSERT(is == pic->pic_sources[irq]);
844
845 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
846 pic->pic_sources[irq] = NULL;
847 pic__iplsources[pic_ipl_offset[is->is_ipl] + is->is_iplidx] = NULL;
848 if (is->is_xname != NULL) {
849 kmem_free(is->is_xname, INTRDEVNAMEBUF);
850 is->is_xname = NULL;
851 }
852 /*
853 * Now detach the per-cpu evcnts.
854 */
855 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_deattach, is);
856
857 kmem_free(is, sizeof(*is));
858 }
859
860 void *
861 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
862 {
863 return intr_establish_xname(irq, ipl, type, func, arg, NULL);
864 }
865
866 void *
867 intr_establish_xname(int irq, int ipl, int type, int (*func)(void *), void *arg,
868 const char *xname)
869 {
870 KASSERT(!cpu_intr_p());
871 KASSERT(!cpu_softintr_p());
872
873 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
874 struct pic_softc * const pic = pic_list[slot];
875 if (pic == NULL || pic->pic_irqbase < 0)
876 continue;
877 if (pic->pic_irqbase <= irq
878 && irq < pic->pic_irqbase + pic->pic_maxsources) {
879 return pic_establish_intr(pic, irq - pic->pic_irqbase,
880 ipl, type, func, arg, xname);
881 }
882 }
883
884 return NULL;
885 }
886
887 void
888 intr_disestablish(void *ih)
889 {
890 struct intrsource * const is = ih;
891
892 KASSERT(!cpu_intr_p());
893 KASSERT(!cpu_softintr_p());
894
895 pic_disestablish_source(is);
896 }
897
898 void
899 intr_mask(void *ih)
900 {
901 struct intrsource * const is = ih;
902 struct pic_softc * const pic = is->is_pic;
903 const int irq = is->is_irq;
904
905 if (atomic_inc_32_nv(&is->is_mask_count) == 1)
906 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
907 }
908
909 void
910 intr_unmask(void *ih)
911 {
912 struct intrsource * const is = ih;
913 struct pic_softc * const pic = is->is_pic;
914 const int irq = is->is_irq;
915
916 if (atomic_dec_32_nv(&is->is_mask_count) == 0)
917 (*pic->pic_ops->pic_unblock_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
918 }
919
920 const char *
921 intr_string(intr_handle_t irq, char *buf, size_t len)
922 {
923 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
924 struct pic_softc * const pic = pic_list[slot];
925 if (pic == NULL || pic->pic_irqbase < 0)
926 continue;
927 if (pic->pic_irqbase <= irq
928 && irq < pic->pic_irqbase + pic->pic_maxsources) {
929 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
930 snprintf(buf, len, "%s %s", pic->pic_name, is->is_source);
931 return buf;
932 }
933 }
934
935 return NULL;
936 }
937
938 static struct intrsource *
939 intr_get_source(const char *intrid)
940 {
941 struct intrsource *is;
942 intrid_t buf;
943 size_t slot;
944 int irq;
945
946 KASSERT(mutex_owned(&cpu_lock));
947
948 for (slot = 0; slot < PIC_MAXPICS; slot++) {
949 struct pic_softc * const pic = pic_list[slot];
950 if (pic == NULL || pic->pic_irqbase < 0)
951 continue;
952 for (irq = 0; irq < pic->pic_maxsources; irq++) {
953 is = pic->pic_sources[irq];
954 if (is == NULL || is->is_source[0] == '\0')
955 continue;
956
957 snprintf(buf, sizeof(buf), "%s %s", pic->pic_name, is->is_source);
958 if (strcmp(buf, intrid) == 0)
959 return is;
960 }
961 }
962
963 return NULL;
964 }
965
966 struct intrids_handler *
967 interrupt_construct_intrids(const kcpuset_t *cpuset)
968 {
969 struct intrids_handler *iih;
970 struct intrsource *is;
971 int count, irq, n;
972 size_t slot;
973
974 if (kcpuset_iszero(cpuset))
975 return NULL;
976
977 count = 0;
978 for (slot = 0; slot < PIC_MAXPICS; slot++) {
979 struct pic_softc * const pic = pic_list[slot];
980 if (pic != NULL && pic->pic_irqbase >= 0) {
981 for (irq = 0; irq < pic->pic_maxsources; irq++) {
982 is = pic->pic_sources[irq];
983 if (is && is->is_source[0] != '\0')
984 count++;
985 }
986 }
987 }
988
989 iih = kmem_zalloc(sizeof(int) + sizeof(intrid_t) * count, KM_SLEEP);
990 iih->iih_nids = count;
991
992 for (n = 0, slot = 0; n < count && slot < PIC_MAXPICS; slot++) {
993 struct pic_softc * const pic = pic_list[slot];
994 if (pic == NULL || pic->pic_irqbase < 0)
995 continue;
996 for (irq = 0; irq < pic->pic_maxsources; irq++) {
997 is = pic->pic_sources[irq];
998 if (is == NULL || is->is_source[0] == '\0')
999 continue;
1000
1001 snprintf(iih->iih_intrids[n++], sizeof(intrid_t), "%s %s",
1002 pic->pic_name, is->is_source);
1003 }
1004 }
1005
1006 return iih;
1007 }
1008
1009 void
1010 interrupt_destruct_intrids(struct intrids_handler *iih)
1011 {
1012 if (iih == NULL)
1013 return;
1014
1015 kmem_free(iih, sizeof(int) + sizeof(intrid_t) * iih->iih_nids);
1016 }
1017
1018 void
1019 interrupt_get_available(kcpuset_t *cpuset)
1020 {
1021 CPU_INFO_ITERATOR cii;
1022 struct cpu_info *ci;
1023
1024 kcpuset_zero(cpuset);
1025
1026 mutex_enter(&cpu_lock);
1027 for (CPU_INFO_FOREACH(cii, ci)) {
1028 if ((ci->ci_schedstate.spc_flags & SPCF_NOINTR) == 0)
1029 kcpuset_set(cpuset, cpu_index(ci));
1030 }
1031 mutex_exit(&cpu_lock);
1032 }
1033
1034 void
1035 interrupt_get_devname(const char *intrid, char *buf, size_t len)
1036 {
1037 struct intrsource *is;
1038
1039 mutex_enter(&cpu_lock);
1040 is = intr_get_source(intrid);
1041 if (is == NULL || is->is_xname == NULL)
1042 buf[0] = '\0';
1043 else
1044 strlcpy(buf, is->is_xname, len);
1045 mutex_exit(&cpu_lock);
1046 }
1047
1048 struct interrupt_get_count_arg {
1049 struct intrsource *is;
1050 uint64_t count;
1051 u_int cpu_idx;
1052 };
1053
1054 static void
1055 interrupt_get_count_cb(void *v0, void *v1, struct cpu_info *ci)
1056 {
1057 struct pic_percpu * const pcpu = v0;
1058 struct interrupt_get_count_arg * const arg = v1;
1059
1060 if (arg->cpu_idx != cpu_index(ci))
1061 return;
1062
1063 arg->count = pcpu->pcpu_evs[arg->is->is_irq].ev_count;
1064 }
1065
1066 uint64_t
1067 interrupt_get_count(const char *intrid, u_int cpu_idx)
1068 {
1069 struct interrupt_get_count_arg arg;
1070 struct intrsource *is;
1071 uint64_t count;
1072
1073 count = 0;
1074
1075 mutex_enter(&cpu_lock);
1076 is = intr_get_source(intrid);
1077 if (is != NULL && is->is_pic != NULL) {
1078 arg.is = is;
1079 arg.count = 0;
1080 arg.cpu_idx = cpu_idx;
1081 percpu_foreach(is->is_pic->pic_percpu, interrupt_get_count_cb, &arg);
1082 count = arg.count;
1083 }
1084 mutex_exit(&cpu_lock);
1085
1086 return count;
1087 }
1088
1089 #ifdef MULTIPROCESSOR
1090 void
1091 interrupt_get_assigned(const char *intrid, kcpuset_t *cpuset)
1092 {
1093 struct intrsource *is;
1094 struct pic_softc *pic;
1095
1096 kcpuset_zero(cpuset);
1097
1098 mutex_enter(&cpu_lock);
1099 is = intr_get_source(intrid);
1100 if (is != NULL) {
1101 pic = is->is_pic;
1102 if (pic && pic->pic_ops->pic_get_affinity)
1103 pic->pic_ops->pic_get_affinity(pic, is->is_irq, cpuset);
1104 }
1105 mutex_exit(&cpu_lock);
1106 }
1107
1108 int
1109 interrupt_distribute_handler(const char *intrid, const kcpuset_t *newset,
1110 kcpuset_t *oldset)
1111 {
1112 struct intrsource *is;
1113 int error;
1114
1115 mutex_enter(&cpu_lock);
1116 is = intr_get_source(intrid);
1117 if (is == NULL) {
1118 error = ENOENT;
1119 } else {
1120 error = interrupt_distribute(is, newset, oldset);
1121 }
1122 mutex_exit(&cpu_lock);
1123
1124 return error;
1125 }
1126
1127 int
1128 interrupt_distribute(void *ih, const kcpuset_t *newset, kcpuset_t *oldset)
1129 {
1130 struct intrsource * const is = ih;
1131 struct pic_softc * const pic = is->is_pic;
1132
1133 if (pic == NULL)
1134 return EOPNOTSUPP;
1135 if (pic->pic_ops->pic_set_affinity == NULL ||
1136 pic->pic_ops->pic_get_affinity == NULL)
1137 return EOPNOTSUPP;
1138
1139 if (!is->is_mpsafe)
1140 return EINVAL;
1141
1142 if (oldset != NULL)
1143 pic->pic_ops->pic_get_affinity(pic, is->is_irq, oldset);
1144
1145 return pic->pic_ops->pic_set_affinity(pic, is->is_irq, newset);
1146 }
1147 #endif
1148