pic.c revision 1.64 1 /* $NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #define _INTR_PRIVATE
32 #include "opt_ddb.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $");
37
38 #include <sys/param.h>
39 #include <sys/atomic.h>
40 #include <sys/cpu.h>
41 #include <sys/evcnt.h>
42 #include <sys/interrupt.h>
43 #include <sys/intr.h>
44 #include <sys/ipi.h>
45 #include <sys/kernel.h>
46 #include <sys/kmem.h>
47 #include <sys/mutex.h>
48 #include <sys/once.h>
49 #include <sys/xcall.h>
50
51 #include <arm/armreg.h>
52 #include <arm/cpufunc.h>
53 #include <arm/locore.h> /* for compat aarch64 */
54
55 #ifdef DDB
56 #include <arm/db_machdep.h>
57 #endif
58
59 #include <arm/pic/picvar.h>
60
61 #if defined(__HAVE_PIC_PENDING_INTRS)
62 /*
63 * This implementation of pending interrupts on a MULTIPROCESSOR system makes
64 * the assumption that a PIC (pic_softc) shall only have all its interrupts
65 * come from the same CPU. In other words, interrupts from a single PIC will
66 * not be distributed among multiple CPUs.
67 */
68 struct pic_pending {
69 volatile uint32_t blocked_pics;
70 volatile uint32_t pending_pics;
71 volatile uint32_t pending_ipls;
72 };
73 static uint32_t
74 pic_find_pending_irqs_by_ipl(struct pic_softc *, size_t, uint32_t, int);
75 static struct pic_softc *
76 pic_list_find_pic_by_pending_ipl(struct pic_pending *, uint32_t);
77 static void
78 pic_deliver_irqs(struct pic_pending *, struct pic_softc *, int, void *);
79 static void
80 pic_list_deliver_irqs(struct pic_pending *, register_t, int, void *);
81
82 #ifdef MULTIPROCESSOR
83 percpu_t *pic_pending_percpu;
84 static struct pic_pending *
85 pic_pending_get(void)
86 {
87 return percpu_getref(pic_pending_percpu);
88 }
89 static void
90 pic_pending_put(struct pic_pending *pend)
91 {
92 percpu_putref(pic_pending_percpu);
93 }
94 #else
95 struct pic_pending pic_pending;
96 #define pic_pending_get() (&pic_pending)
97 #define pic_pending_put(pend) __nothing
98 #endif /* MULTIPROCESSOR */
99 #endif /* __HAVE_PIC_PENDING_INTRS */
100
101 struct pic_softc *pic_list[PIC_MAXPICS];
102 #if PIC_MAXPICS > 32
103 #error PIC_MAXPICS > 32 not supported
104 #endif
105 struct intrsource *pic_sources[PIC_MAXMAXSOURCES];
106 struct intrsource *pic__iplsources[PIC_MAXMAXSOURCES];
107 struct intrsource **pic_iplsource[NIPL] = {
108 [0 ... NIPL-1] = pic__iplsources,
109 };
110 size_t pic_ipl_offset[NIPL+1];
111
112 static kmutex_t pic_lock;
113 static size_t pic_sourcebase;
114 static int pic_lastbase;
115 static struct evcnt pic_deferral_ev =
116 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "deferred", "intr");
117 EVCNT_ATTACH_STATIC(pic_deferral_ev);
118
119 static int pic_init(void);
120
121 #ifdef __HAVE_PIC_SET_PRIORITY
122 void
123 pic_set_priority(struct cpu_info *ci, int newipl)
124 {
125 register_t psw = cpsid(I32_bit);
126 if (pic_list[0] != NULL)
127 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
128 ci->ci_cpl = newipl;
129 if ((psw & I32_bit) == 0)
130 cpsie(I32_bit);
131 }
132
133 void
134 pic_set_priority_psw(struct cpu_info *ci, register_t psw, int newipl)
135 {
136 if ((psw & I32_bit) == 0) {
137 DISABLE_INTERRUPT();
138 }
139 if (pic_list[0] != NULL) {
140 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
141 }
142 ci->ci_cpl = newipl;
143 if ((psw & I32_bit) == 0) {
144 ENABLE_INTERRUPT();
145 }
146 }
147 #endif
148
149 #ifdef MULTIPROCESSOR
150 int
151 pic_ipi_ast(void *arg)
152 {
153 setsoftast(curcpu());
154 return 1;
155 }
156
157 int
158 pic_ipi_nop(void *arg)
159 {
160 /* do nothing */
161 return 1;
162 }
163
164 int
165 pic_ipi_xcall(void *arg)
166 {
167 xc_ipi_handler();
168 return 1;
169 }
170
171 int
172 pic_ipi_generic(void *arg)
173 {
174 ipi_cpu_handler();
175 return 1;
176 }
177
178 #ifdef DDB
179 int
180 pic_ipi_ddb(void *arg)
181 {
182 // printf("%s: %s: tf=%p\n", __func__, curcpu()->ci_cpuname, arg);
183 kdb_trap(-1, arg);
184 return 1;
185 }
186 #endif /* DDB */
187
188 #ifdef __HAVE_PREEMPTION
189 int
190 pic_ipi_kpreempt(void *arg)
191 {
192 atomic_or_uint(&curcpu()->ci_astpending, __BIT(1));
193 return 1;
194 }
195 #endif /* __HAVE_PREEMPTION */
196
197 void
198 intr_cpu_init(struct cpu_info *ci)
199 {
200 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
201 struct pic_softc * const pic = pic_list[slot];
202 if (pic != NULL && pic->pic_ops->pic_cpu_init != NULL) {
203 (*pic->pic_ops->pic_cpu_init)(pic, ci);
204 }
205 }
206 }
207
208 typedef void (*pic_ipi_send_func_t)(struct pic_softc *, u_long);
209
210 void
211 intr_ipi_send(const kcpuset_t *kcp, u_long ipi)
212 {
213 struct cpu_info * const ci = curcpu();
214 KASSERT(ipi < NIPI);
215 KASSERT(kcp == NULL || kcpuset_countset(kcp) == 1);
216 bool __diagused sent_p = false;
217 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
218 struct pic_softc * const pic = pic_list[slot];
219 if (pic == NULL || pic->pic_cpus == NULL)
220 continue;
221 if (kcp == NULL || kcpuset_intersecting_p(kcp, pic->pic_cpus)) {
222 /*
223 * Never send to ourself.
224 *
225 * This test uses pointer comparison for systems
226 * that have a pic per cpu, e.g. RPI[23]. GIC sets
227 * pic_cpus to kcpuset_running and handles "not for
228 * self" internally.
229 */
230 if (pic->pic_cpus == ci->ci_kcpuset)
231 continue;
232
233 (*pic->pic_ops->pic_ipi_send)(pic, kcp, ipi);
234
235 /*
236 * If we were targeting a single CPU or this pic
237 * handles all cpus, we're done.
238 */
239 if (kcp != NULL || pic->pic_cpus == kcpuset_running)
240 return;
241 sent_p = true;
242 }
243 }
244 KASSERTMSG(cold || sent_p || ncpu <= 1, "cold %d sent_p %d ncpu %d",
245 cold, sent_p, ncpu);
246 }
247 #endif /* MULTIPROCESSOR */
248
249 #ifdef __HAVE_PIC_FAST_SOFTINTS
250 int
251 pic_handle_softint(void *arg)
252 {
253 void softint_switch(lwp_t *, int);
254 struct cpu_info * const ci = curcpu();
255 const size_t softint = (size_t) arg;
256 int s = splhigh();
257 ci->ci_intr_depth--; // don't count these as interrupts
258 softint_switch(ci->ci_softlwps[softint], s);
259 ci->ci_intr_depth++;
260 splx(s);
261 return 1;
262 }
263 #endif
264
265 int
266 pic_handle_intr(void *arg)
267 {
268 struct pic_softc * const pic = arg;
269 int rv;
270
271 rv = (*pic->pic_ops->pic_find_pending_irqs)(pic);
272
273 return rv > 0;
274 }
275
276 #if defined(__HAVE_PIC_PENDING_INTRS)
277 void
278 pic_mark_pending_source(struct pic_softc *pic, struct intrsource *is)
279 {
280 const uint32_t ipl_mask = __BIT(is->is_ipl);
281
282 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
283 __BIT(is->is_irq & 0x1f));
284
285 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
286 struct pic_pending *pend = pic_pending_get();
287 atomic_or_32(&pend->pending_ipls, ipl_mask);
288 atomic_or_32(&pend->pending_pics, __BIT(pic->pic_id));
289 pic_pending_put(pend);
290 }
291
292 void
293 pic_mark_pending(struct pic_softc *pic, int irq)
294 {
295 struct intrsource * const is = pic->pic_sources[irq];
296
297 KASSERT(irq < pic->pic_maxsources);
298 KASSERT(is != NULL);
299
300 pic_mark_pending_source(pic, is);
301 }
302
303 uint32_t
304 pic_mark_pending_sources(struct pic_softc *pic, size_t irq_base,
305 uint32_t pending)
306 {
307 struct intrsource ** const isbase = &pic->pic_sources[irq_base];
308 struct intrsource *is;
309 volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
310 uint32_t ipl_mask = 0;
311
312 if (pending == 0)
313 return ipl_mask;
314
315 KASSERT((irq_base & 31) == 0);
316
317 (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
318
319 atomic_or_32(ipending, pending);
320 while (pending != 0) {
321 int n = ffs(pending);
322 if (n-- == 0)
323 break;
324 is = isbase[n];
325 KASSERT(is != NULL);
326 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
327 pending &= ~__BIT(n);
328 ipl_mask |= __BIT(is->is_ipl);
329 }
330
331 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
332 struct pic_pending *pend = pic_pending_get();
333 atomic_or_32(&pend->pending_ipls, ipl_mask);
334 atomic_or_32(&pend->pending_pics, __BIT(pic->pic_id));
335 pic_pending_put(pend);
336 return ipl_mask;
337 }
338
339 uint32_t
340 pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
341 uint32_t pending, int ipl)
342 {
343 uint32_t ipl_irq_mask = 0;
344 uint32_t irq_mask;
345
346 for (;;) {
347 int irq = ffs(pending);
348 if (irq-- == 0)
349 return ipl_irq_mask;
350
351 irq_mask = __BIT(irq);
352 #if 1
353 KASSERTMSG(pic->pic_sources[irq_base + irq] != NULL,
354 "%s: irq_base %zu irq %d\n", __func__, irq_base, irq);
355 #else
356 if (pic->pic_sources[irq_base + irq] == NULL) {
357 aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
358 irq_base, irq);
359 } else
360 #endif
361 if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
362 ipl_irq_mask |= irq_mask;
363
364 pending &= ~irq_mask;
365 }
366 }
367 #endif /* __HAVE_PIC_PENDING_INTRS */
368
369 void
370 pic_dispatch(struct intrsource *is, void *frame)
371 {
372 int (*func)(void *) = is->is_func;
373 void *arg = is->is_arg;
374
375 if (__predict_false(arg == NULL)) {
376 if (__predict_false(frame == NULL)) {
377 pic_deferral_ev.ev_count++;
378 return;
379 }
380 arg = frame;
381 }
382
383 #ifdef MULTIPROCESSOR
384 if (!is->is_mpsafe) {
385 KERNEL_LOCK(1, NULL);
386 const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
387 const u_int l_blcnt __diagused = curlwp->l_blcnt;
388 (void)(*func)(arg);
389 KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
390 KASSERT(l_blcnt == curlwp->l_blcnt);
391 KERNEL_UNLOCK_ONE(NULL);
392 } else
393 #endif
394 (void)(*func)(arg);
395
396 struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
397 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
398 pcpu->pcpu_evs[is->is_irq].ev_count++;
399 percpu_putref(is->is_pic->pic_percpu);
400 }
401
402 #if defined(__HAVE_PIC_PENDING_INTRS)
403 void
404 pic_deliver_irqs(struct pic_pending *pend, struct pic_softc *pic, int ipl,
405 void *frame)
406 {
407 const uint32_t ipl_mask = __BIT(ipl);
408 struct intrsource *is;
409 volatile uint32_t *ipending = pic->pic_pending_irqs;
410 volatile uint32_t *iblocked = pic->pic_blocked_irqs;
411 size_t irq_base;
412 #if PIC_MAXSOURCES > 32
413 size_t irq_count;
414 int poi = 0; /* Possibility of interrupting */
415 #endif
416 uint32_t pending_irqs;
417 uint32_t blocked_irqs;
418 int irq;
419 bool progress __diagused = false;
420
421 KASSERT(pic->pic_pending_ipls & ipl_mask);
422
423 irq_base = 0;
424 #if PIC_MAXSOURCES > 32
425 irq_count = 0;
426 #endif
427
428 for (;;) {
429 pending_irqs = pic_find_pending_irqs_by_ipl(pic, irq_base,
430 *ipending, ipl);
431 KASSERT((pending_irqs & *ipending) == pending_irqs);
432 KASSERT((pending_irqs & ~(*ipending)) == 0);
433 if (pending_irqs == 0) {
434 #if PIC_MAXSOURCES > 32
435 irq_count += 32;
436 if (__predict_true(irq_count >= pic->pic_maxsources)) {
437 if (!poi)
438 /*Interrupt at this level was handled.*/
439 break;
440 irq_base = 0;
441 irq_count = 0;
442 poi = 0;
443 ipending = pic->pic_pending_irqs;
444 iblocked = pic->pic_blocked_irqs;
445 } else {
446 irq_base += 32;
447 ipending++;
448 iblocked++;
449 KASSERT(irq_base <= pic->pic_maxsources);
450 }
451 continue;
452 #else
453 break;
454 #endif
455 }
456 progress = true;
457 blocked_irqs = 0;
458 do {
459 irq = ffs(pending_irqs) - 1;
460 KASSERT(irq >= 0);
461
462 atomic_and_32(ipending, ~__BIT(irq));
463 is = pic->pic_sources[irq_base + irq];
464 if (is != NULL) {
465 ENABLE_INTERRUPT();
466 pic_dispatch(is, frame);
467 DISABLE_INTERRUPT();
468 #if PIC_MAXSOURCES > 32
469 /*
470 * There is a possibility of interrupting
471 * from ENABLE_INTERRUPT() to
472 * DISABLE_INTERRUPT().
473 */
474 poi = 1;
475 #endif
476 blocked_irqs |= __BIT(irq);
477 } else {
478 KASSERT(0);
479 }
480 pending_irqs = pic_find_pending_irqs_by_ipl(pic,
481 irq_base, *ipending, ipl);
482 } while (pending_irqs);
483 if (blocked_irqs) {
484 atomic_or_32(iblocked, blocked_irqs);
485 atomic_or_32(&pend->blocked_pics, __BIT(pic->pic_id));
486 }
487 }
488
489 KASSERT(progress);
490 /*
491 * Since interrupts are disabled, we don't have to be too careful
492 * about these.
493 */
494 if (atomic_and_32_nv(&pic->pic_pending_ipls, ~ipl_mask) == 0)
495 atomic_and_32(&pend->pending_pics, ~__BIT(pic->pic_id));
496 }
497
498 static void
499 pic_list_unblock_irqs(struct pic_pending *pend)
500 {
501 uint32_t blocked_pics = pend->blocked_pics;
502
503 pend->blocked_pics = 0;
504
505 for (;;) {
506 struct pic_softc *pic;
507 #if PIC_MAXSOURCES > 32
508 volatile uint32_t *iblocked;
509 uint32_t blocked;
510 size_t irq_base;
511 #endif
512
513 int pic_id = ffs(blocked_pics);
514 if (pic_id-- == 0)
515 return;
516
517 pic = pic_list[pic_id];
518 KASSERT(pic != NULL);
519 #if PIC_MAXSOURCES > 32
520 for (irq_base = 0, iblocked = pic->pic_blocked_irqs;
521 irq_base < pic->pic_maxsources;
522 irq_base += 32, iblocked++) {
523 if ((blocked = *iblocked) != 0) {
524 (*pic->pic_ops->pic_unblock_irqs)(pic,
525 irq_base, blocked);
526 atomic_and_32(iblocked, ~blocked);
527 }
528 }
529 #else
530 KASSERT(pic->pic_blocked_irqs[0] != 0);
531 (*pic->pic_ops->pic_unblock_irqs)(pic,
532 0, pic->pic_blocked_irqs[0]);
533 pic->pic_blocked_irqs[0] = 0;
534 #endif
535 blocked_pics &= ~__BIT(pic_id);
536 }
537 }
538
539 struct pic_softc *
540 pic_list_find_pic_by_pending_ipl(struct pic_pending *pend, uint32_t ipl_mask)
541 {
542 uint32_t pending_pics = pend->pending_pics;
543 struct pic_softc *pic;
544
545 for (;;) {
546 int pic_id = ffs(pending_pics);
547 if (pic_id-- == 0)
548 return NULL;
549
550 pic = pic_list[pic_id];
551 KASSERT(pic != NULL);
552 if (pic->pic_pending_ipls & ipl_mask)
553 return pic;
554 pending_pics &= ~__BIT(pic_id);
555 }
556 }
557
558 void
559 pic_list_deliver_irqs(struct pic_pending *pend, register_t psw, int ipl,
560 void *frame)
561 {
562 const uint32_t ipl_mask = __BIT(ipl);
563 struct pic_softc *pic;
564
565 while ((pic = pic_list_find_pic_by_pending_ipl(pend, ipl_mask)) != NULL) {
566 pic_deliver_irqs(pend, pic, ipl, frame);
567 KASSERT((pic->pic_pending_ipls & ipl_mask) == 0);
568 }
569 atomic_and_32(&pend->pending_ipls, ~ipl_mask);
570 }
571 #endif /* __HAVE_PIC_PENDING_INTRS */
572
573 void
574 pic_do_pending_ints(register_t psw, int newipl, void *frame)
575 {
576 struct cpu_info * const ci = curcpu();
577 if (__predict_false(newipl == IPL_HIGH)) {
578 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl %d", ci->ci_cpl);
579 return;
580 }
581 #if defined(__HAVE_PIC_PENDING_INTRS)
582 struct pic_pending *pend = pic_pending_get();
583 while ((pend->pending_ipls & ~__BIT(newipl)) > __BIT(newipl)) {
584 KASSERT(pend->pending_ipls < __BIT(NIPL));
585 for (;;) {
586 int ipl = 31 - __builtin_clz(pend->pending_ipls);
587 KASSERT(ipl < NIPL);
588 if (ipl <= newipl)
589 break;
590
591 pic_set_priority_psw(ci, psw, ipl);
592 pic_list_deliver_irqs(pend, psw, ipl, frame);
593 pic_list_unblock_irqs(pend);
594 }
595 }
596 pic_pending_put(pend);
597 #endif /* __HAVE_PIC_PENDING_INTRS */
598 #ifdef __HAVE_PREEMPTION
599 if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
600 pic_set_priority_psw(ci, psw, IPL_SCHED);
601 kpreempt(0);
602 }
603 #endif
604 if (ci->ci_cpl != newipl)
605 pic_set_priority_psw(ci, psw, newipl);
606 }
607
608 static void
609 pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
610 {
611 struct pic_percpu * const pcpu = v0;
612 struct pic_softc * const pic = v1;
613
614 pcpu->pcpu_evs = kmem_zalloc(pic->pic_maxsources * sizeof(pcpu->pcpu_evs[0]),
615 KM_SLEEP);
616 KASSERT(pcpu->pcpu_evs != NULL);
617
618 #define PCPU_NAMELEN 32
619 #ifdef DIAGNOSTIC
620 const size_t namelen = strlen(pic->pic_name) + 4 + strlen(ci->ci_data.cpu_name);
621 #endif
622
623 KASSERT(namelen < PCPU_NAMELEN);
624 pcpu->pcpu_name = kmem_alloc(PCPU_NAMELEN, KM_SLEEP);
625 #ifdef MULTIPROCESSOR
626 snprintf(pcpu->pcpu_name, PCPU_NAMELEN,
627 "%s (%s)", pic->pic_name, ci->ci_data.cpu_name);
628 #else
629 strlcpy(pcpu->pcpu_name, pic->pic_name, PCPU_NAMELEN);
630 #endif
631 pcpu->pcpu_magic = PICPERCPU_MAGIC;
632 #if 0
633 printf("%s: %s %s: <%s>\n",
634 __func__, ci->ci_data.cpu_name, pic->pic_name,
635 pcpu->pcpu_name);
636 #endif
637 }
638
639 static int
640 pic_init(void)
641 {
642
643 mutex_init(&pic_lock, MUTEX_DEFAULT, IPL_HIGH);
644
645 return 0;
646 }
647
648 int
649 pic_add(struct pic_softc *pic, int irqbase)
650 {
651 int slot, maybe_slot = -1;
652 size_t sourcebase;
653 static ONCE_DECL(pic_once);
654
655 RUN_ONCE(&pic_once, pic_init);
656
657 KASSERT(strlen(pic->pic_name) > 0);
658
659 #if defined(__HAVE_PIC_PENDING_INTRS) && defined(MULTIPROCESSOR)
660 if (__predict_false(pic_pending_percpu == NULL))
661 pic_pending_percpu = percpu_alloc(sizeof(struct pic_pending));
662 #endif /* __HAVE_PIC_PENDING_INTRS && MULTIPROCESSOR */
663
664 mutex_enter(&pic_lock);
665 if (irqbase == PIC_IRQBASE_ALLOC) {
666 irqbase = pic_lastbase;
667 }
668 for (slot = 0; slot < PIC_MAXPICS; slot++) {
669 struct pic_softc * const xpic = pic_list[slot];
670 if (xpic == NULL) {
671 if (maybe_slot < 0)
672 maybe_slot = slot;
673 if (irqbase < 0)
674 break;
675 continue;
676 }
677 if (irqbase < 0 || xpic->pic_irqbase < 0)
678 continue;
679 if (irqbase >= xpic->pic_irqbase + xpic->pic_maxsources)
680 continue;
681 if (irqbase + pic->pic_maxsources <= xpic->pic_irqbase)
682 continue;
683 panic("pic_add: pic %s (%zu sources @ irq %u) conflicts"
684 " with pic %s (%zu sources @ irq %u)",
685 pic->pic_name, pic->pic_maxsources, irqbase,
686 xpic->pic_name, xpic->pic_maxsources, xpic->pic_irqbase);
687 }
688 slot = maybe_slot;
689 #if 0
690 printf("%s: pic_sourcebase=%zu pic_maxsources=%zu\n",
691 pic->pic_name, pic_sourcebase, pic->pic_maxsources);
692 #endif
693 KASSERTMSG(pic->pic_maxsources <= PIC_MAXSOURCES, "%zu",
694 pic->pic_maxsources);
695 KASSERT(pic_sourcebase + pic->pic_maxsources <= PIC_MAXMAXSOURCES);
696 sourcebase = pic_sourcebase;
697 pic_sourcebase += pic->pic_maxsources;
698 if (pic_lastbase < irqbase + pic->pic_maxsources)
699 pic_lastbase = irqbase + pic->pic_maxsources;
700 mutex_exit(&pic_lock);
701
702 /*
703 * Allocate a pointer to each cpu's evcnts and then, for each cpu,
704 * allocate its evcnts and then attach an evcnt for each pin.
705 * We can't allocate the evcnt structures directly since
706 * percpu will move the contents of percpu memory around and
707 * corrupt the pointers in the evcnts themselves. Remember, any
708 * problem can be solved with sufficient indirection.
709 */
710 pic->pic_percpu = percpu_create(sizeof(struct pic_percpu),
711 pic_percpu_allocate, NULL, pic);
712
713 pic->pic_sources = &pic_sources[sourcebase];
714 pic->pic_irqbase = irqbase;
715 pic->pic_id = slot;
716 #ifdef __HAVE_PIC_SET_PRIORITY
717 KASSERT((slot == 0) == (pic->pic_ops->pic_set_priority != NULL));
718 #endif
719 #ifdef MULTIPROCESSOR
720 KASSERT((pic->pic_cpus != NULL) == (pic->pic_ops->pic_ipi_send != NULL));
721 #endif
722 pic_list[slot] = pic;
723
724 return irqbase;
725 }
726
727 int
728 pic_alloc_irq(struct pic_softc *pic)
729 {
730 int irq;
731
732 for (irq = 0; irq < pic->pic_maxsources; irq++) {
733 if (pic->pic_sources[irq] == NULL)
734 return irq;
735 }
736
737 return -1;
738 }
739
740 static void
741 pic_percpu_evcnt_attach(void *v0, void *v1, struct cpu_info *ci)
742 {
743 struct pic_percpu * const pcpu = v0;
744 struct intrsource * const is = v1;
745
746 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
747 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
748 pcpu->pcpu_name, is->is_source);
749 }
750
751 void *
752 pic_establish_intr(struct pic_softc *pic, int irq, int ipl, int type,
753 int (*func)(void *), void *arg, const char *xname)
754 {
755 struct intrsource *is;
756 int off, nipl;
757
758 if (pic->pic_sources[irq]) {
759 printf("pic_establish_intr: pic %s irq %d already present\n",
760 pic->pic_name, irq);
761 return NULL;
762 }
763
764 is = kmem_zalloc(sizeof(*is), KM_SLEEP);
765 is->is_pic = pic;
766 is->is_irq = irq;
767 is->is_ipl = ipl;
768 is->is_type = type & 0xff;
769 is->is_func = func;
770 is->is_arg = arg;
771 #ifdef MULTIPROCESSOR
772 is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;
773 #endif
774
775 if (pic->pic_ops->pic_source_name)
776 (*pic->pic_ops->pic_source_name)(pic, irq, is->is_source,
777 sizeof(is->is_source));
778 else
779 snprintf(is->is_source, sizeof(is->is_source), "irq %d", irq);
780
781 /*
782 * Now attach the per-cpu evcnts.
783 */
784 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_attach, is);
785
786 pic->pic_sources[irq] = is;
787
788 /*
789 * First try to use an existing slot which is empty.
790 */
791 for (off = pic_ipl_offset[ipl]; off < pic_ipl_offset[ipl+1]; off++) {
792 if (pic__iplsources[off] == NULL) {
793 is->is_iplidx = off - pic_ipl_offset[ipl];
794 pic__iplsources[off] = is;
795 goto unblock;
796 }
797 }
798
799 /*
800 * Move up all the sources by one.
801 */
802 if (ipl < NIPL) {
803 off = pic_ipl_offset[ipl+1];
804 memmove(&pic__iplsources[off+1], &pic__iplsources[off],
805 sizeof(pic__iplsources[0]) * (pic_ipl_offset[NIPL] - off));
806 }
807
808 /*
809 * Advance the offset of all IPLs higher than this. Include an
810 * extra one as well. Thus the number of sources per ipl is
811 * pic_ipl_offset[ipl+1] - pic_ipl_offset[ipl].
812 */
813 for (nipl = ipl + 1; nipl <= NIPL; nipl++)
814 pic_ipl_offset[nipl]++;
815
816 /*
817 * Insert into the previously made position at the end of this IPL's
818 * sources.
819 */
820 off = pic_ipl_offset[ipl + 1] - 1;
821 is->is_iplidx = off - pic_ipl_offset[ipl];
822 pic__iplsources[off] = is;
823
824 (*pic->pic_ops->pic_establish_irq)(pic, is);
825
826 unblock:
827 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
828 __BIT(is->is_irq & 0x1f));
829
830 if (xname) {
831 if (is->is_xname == NULL)
832 is->is_xname = kmem_zalloc(INTRDEVNAMEBUF, KM_SLEEP);
833 if (is->is_xname[0] != '\0')
834 strlcat(is->is_xname, ", ", INTRDEVNAMEBUF);
835 strlcat(is->is_xname, xname, INTRDEVNAMEBUF);
836 }
837
838 /* We're done. */
839 return is;
840 }
841
842 static void
843 pic_percpu_evcnt_deattach(void *v0, void *v1, struct cpu_info *ci)
844 {
845 struct pic_percpu * const pcpu = v0;
846 struct intrsource * const is = v1;
847
848 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
849 evcnt_detach(&pcpu->pcpu_evs[is->is_irq]);
850 }
851
852 void
853 pic_disestablish_source(struct intrsource *is)
854 {
855 struct pic_softc * const pic = is->is_pic;
856 const int irq = is->is_irq;
857
858 KASSERT(is == pic->pic_sources[irq]);
859
860 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
861 pic->pic_sources[irq] = NULL;
862 pic__iplsources[pic_ipl_offset[is->is_ipl] + is->is_iplidx] = NULL;
863 if (is->is_xname != NULL) {
864 kmem_free(is->is_xname, INTRDEVNAMEBUF);
865 is->is_xname = NULL;
866 }
867 /*
868 * Now detach the per-cpu evcnts.
869 */
870 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_deattach, is);
871
872 kmem_free(is, sizeof(*is));
873 }
874
875 void *
876 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
877 {
878 return intr_establish_xname(irq, ipl, type, func, arg, NULL);
879 }
880
881 void *
882 intr_establish_xname(int irq, int ipl, int type, int (*func)(void *), void *arg,
883 const char *xname)
884 {
885 KASSERT(!cpu_intr_p());
886 KASSERT(!cpu_softintr_p());
887
888 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
889 struct pic_softc * const pic = pic_list[slot];
890 if (pic == NULL || pic->pic_irqbase < 0)
891 continue;
892 if (pic->pic_irqbase <= irq
893 && irq < pic->pic_irqbase + pic->pic_maxsources) {
894 return pic_establish_intr(pic, irq - pic->pic_irqbase,
895 ipl, type, func, arg, xname);
896 }
897 }
898
899 return NULL;
900 }
901
902 void
903 intr_disestablish(void *ih)
904 {
905 struct intrsource * const is = ih;
906
907 KASSERT(!cpu_intr_p());
908 KASSERT(!cpu_softintr_p());
909
910 pic_disestablish_source(is);
911 }
912
913 void
914 intr_mask(void *ih)
915 {
916 struct intrsource * const is = ih;
917 struct pic_softc * const pic = is->is_pic;
918 const int irq = is->is_irq;
919
920 if (atomic_inc_32_nv(&is->is_mask_count) == 1)
921 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
922 }
923
924 void
925 intr_unmask(void *ih)
926 {
927 struct intrsource * const is = ih;
928 struct pic_softc * const pic = is->is_pic;
929 const int irq = is->is_irq;
930
931 if (atomic_dec_32_nv(&is->is_mask_count) == 0)
932 (*pic->pic_ops->pic_unblock_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
933 }
934
935 const char *
936 intr_string(intr_handle_t irq, char *buf, size_t len)
937 {
938 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
939 struct pic_softc * const pic = pic_list[slot];
940 if (pic == NULL || pic->pic_irqbase < 0)
941 continue;
942 if (pic->pic_irqbase <= irq
943 && irq < pic->pic_irqbase + pic->pic_maxsources) {
944 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
945 snprintf(buf, len, "%s %s", pic->pic_name, is->is_source);
946 return buf;
947 }
948 }
949
950 return NULL;
951 }
952
953 static struct intrsource *
954 intr_get_source(const char *intrid)
955 {
956 struct intrsource *is;
957 intrid_t buf;
958 size_t slot;
959 int irq;
960
961 KASSERT(mutex_owned(&cpu_lock));
962
963 for (slot = 0; slot < PIC_MAXPICS; slot++) {
964 struct pic_softc * const pic = pic_list[slot];
965 if (pic == NULL || pic->pic_irqbase < 0)
966 continue;
967 for (irq = 0; irq < pic->pic_maxsources; irq++) {
968 is = pic->pic_sources[irq];
969 if (is == NULL || is->is_source[0] == '\0')
970 continue;
971
972 snprintf(buf, sizeof(buf), "%s %s", pic->pic_name, is->is_source);
973 if (strcmp(buf, intrid) == 0)
974 return is;
975 }
976 }
977
978 return NULL;
979 }
980
981 struct intrids_handler *
982 interrupt_construct_intrids(const kcpuset_t *cpuset)
983 {
984 struct intrids_handler *iih;
985 struct intrsource *is;
986 int count, irq, n;
987 size_t slot;
988
989 if (kcpuset_iszero(cpuset))
990 return NULL;
991
992 count = 0;
993 for (slot = 0; slot < PIC_MAXPICS; slot++) {
994 struct pic_softc * const pic = pic_list[slot];
995 if (pic != NULL && pic->pic_irqbase >= 0) {
996 for (irq = 0; irq < pic->pic_maxsources; irq++) {
997 is = pic->pic_sources[irq];
998 if (is && is->is_source[0] != '\0')
999 count++;
1000 }
1001 }
1002 }
1003
1004 iih = kmem_zalloc(sizeof(int) + sizeof(intrid_t) * count, KM_SLEEP);
1005 iih->iih_nids = count;
1006
1007 for (n = 0, slot = 0; n < count && slot < PIC_MAXPICS; slot++) {
1008 struct pic_softc * const pic = pic_list[slot];
1009 if (pic == NULL || pic->pic_irqbase < 0)
1010 continue;
1011 for (irq = 0; irq < pic->pic_maxsources; irq++) {
1012 is = pic->pic_sources[irq];
1013 if (is == NULL || is->is_source[0] == '\0')
1014 continue;
1015
1016 snprintf(iih->iih_intrids[n++], sizeof(intrid_t), "%s %s",
1017 pic->pic_name, is->is_source);
1018 }
1019 }
1020
1021 return iih;
1022 }
1023
1024 void
1025 interrupt_destruct_intrids(struct intrids_handler *iih)
1026 {
1027 if (iih == NULL)
1028 return;
1029
1030 kmem_free(iih, sizeof(int) + sizeof(intrid_t) * iih->iih_nids);
1031 }
1032
1033 void
1034 interrupt_get_available(kcpuset_t *cpuset)
1035 {
1036 CPU_INFO_ITERATOR cii;
1037 struct cpu_info *ci;
1038
1039 kcpuset_zero(cpuset);
1040
1041 mutex_enter(&cpu_lock);
1042 for (CPU_INFO_FOREACH(cii, ci)) {
1043 if ((ci->ci_schedstate.spc_flags & SPCF_NOINTR) == 0)
1044 kcpuset_set(cpuset, cpu_index(ci));
1045 }
1046 mutex_exit(&cpu_lock);
1047 }
1048
1049 void
1050 interrupt_get_devname(const char *intrid, char *buf, size_t len)
1051 {
1052 struct intrsource *is;
1053
1054 mutex_enter(&cpu_lock);
1055 is = intr_get_source(intrid);
1056 if (is == NULL || is->is_xname == NULL)
1057 buf[0] = '\0';
1058 else
1059 strlcpy(buf, is->is_xname, len);
1060 mutex_exit(&cpu_lock);
1061 }
1062
1063 struct interrupt_get_count_arg {
1064 struct intrsource *is;
1065 uint64_t count;
1066 u_int cpu_idx;
1067 };
1068
1069 static void
1070 interrupt_get_count_cb(void *v0, void *v1, struct cpu_info *ci)
1071 {
1072 struct pic_percpu * const pcpu = v0;
1073 struct interrupt_get_count_arg * const arg = v1;
1074
1075 if (arg->cpu_idx != cpu_index(ci))
1076 return;
1077
1078 arg->count = pcpu->pcpu_evs[arg->is->is_irq].ev_count;
1079 }
1080
1081 uint64_t
1082 interrupt_get_count(const char *intrid, u_int cpu_idx)
1083 {
1084 struct interrupt_get_count_arg arg;
1085 struct intrsource *is;
1086 uint64_t count;
1087
1088 count = 0;
1089
1090 mutex_enter(&cpu_lock);
1091 is = intr_get_source(intrid);
1092 if (is != NULL && is->is_pic != NULL) {
1093 arg.is = is;
1094 arg.count = 0;
1095 arg.cpu_idx = cpu_idx;
1096 percpu_foreach(is->is_pic->pic_percpu, interrupt_get_count_cb, &arg);
1097 count = arg.count;
1098 }
1099 mutex_exit(&cpu_lock);
1100
1101 return count;
1102 }
1103
1104 #ifdef MULTIPROCESSOR
1105 void
1106 interrupt_get_assigned(const char *intrid, kcpuset_t *cpuset)
1107 {
1108 struct intrsource *is;
1109 struct pic_softc *pic;
1110
1111 kcpuset_zero(cpuset);
1112
1113 mutex_enter(&cpu_lock);
1114 is = intr_get_source(intrid);
1115 if (is != NULL) {
1116 pic = is->is_pic;
1117 if (pic && pic->pic_ops->pic_get_affinity)
1118 pic->pic_ops->pic_get_affinity(pic, is->is_irq, cpuset);
1119 }
1120 mutex_exit(&cpu_lock);
1121 }
1122
1123 int
1124 interrupt_distribute_handler(const char *intrid, const kcpuset_t *newset,
1125 kcpuset_t *oldset)
1126 {
1127 struct intrsource *is;
1128 int error;
1129
1130 mutex_enter(&cpu_lock);
1131 is = intr_get_source(intrid);
1132 if (is == NULL) {
1133 error = ENOENT;
1134 } else {
1135 error = interrupt_distribute(is, newset, oldset);
1136 }
1137 mutex_exit(&cpu_lock);
1138
1139 return error;
1140 }
1141
1142 int
1143 interrupt_distribute(void *ih, const kcpuset_t *newset, kcpuset_t *oldset)
1144 {
1145 struct intrsource * const is = ih;
1146 struct pic_softc * const pic = is->is_pic;
1147
1148 if (pic == NULL)
1149 return EOPNOTSUPP;
1150 if (pic->pic_ops->pic_set_affinity == NULL ||
1151 pic->pic_ops->pic_get_affinity == NULL)
1152 return EOPNOTSUPP;
1153
1154 if (!is->is_mpsafe)
1155 return EINVAL;
1156
1157 if (oldset != NULL)
1158 pic->pic_ops->pic_get_affinity(pic, is->is_irq, oldset);
1159
1160 return pic->pic_ops->pic_set_affinity(pic, is->is_irq, newset);
1161 }
1162 #endif
1163