pic.c revision 1.66 1 /* $NetBSD: pic.c,v 1.66 2021/02/20 14:51:07 jmcneill Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #define _INTR_PRIVATE
32 #include "opt_ddb.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.66 2021/02/20 14:51:07 jmcneill Exp $");
37
38 #include <sys/param.h>
39 #include <sys/atomic.h>
40 #include <sys/cpu.h>
41 #include <sys/evcnt.h>
42 #include <sys/interrupt.h>
43 #include <sys/intr.h>
44 #include <sys/ipi.h>
45 #include <sys/kernel.h>
46 #include <sys/kmem.h>
47 #include <sys/mutex.h>
48 #include <sys/once.h>
49 #include <sys/xcall.h>
50
51 #include <arm/armreg.h>
52 #include <arm/cpufunc.h>
53 #include <arm/locore.h> /* for compat aarch64 */
54
55 #ifdef DDB
56 #include <arm/db_machdep.h>
57 #endif
58
59 #include <arm/pic/picvar.h>
60
61 #if defined(__HAVE_PIC_PENDING_INTRS)
62
63 bool pic_pending_used __read_mostly = false;
64
65 /*
66 * This implementation of pending interrupts on a MULTIPROCESSOR system makes
67 * the assumption that a PIC (pic_softc) shall only have all its interrupts
68 * come from the same CPU. In other words, interrupts from a single PIC will
69 * not be distributed among multiple CPUs.
70 */
71 static uint32_t
72 pic_find_pending_irqs_by_ipl(struct pic_softc *, size_t, uint32_t, int);
73 static struct pic_softc *
74 pic_list_find_pic_by_pending_ipl(struct cpu_info *, uint32_t);
75 static void
76 pic_deliver_irqs(struct cpu_info *, struct pic_softc *, int, void *);
77 static void
78 pic_list_deliver_irqs(struct cpu_info *, register_t, int, void *);
79
80 #endif /* __HAVE_PIC_PENDING_INTRS */
81
82 struct pic_softc *pic_list[PIC_MAXPICS];
83 #if PIC_MAXPICS > 32
84 #error PIC_MAXPICS > 32 not supported
85 #endif
86 struct intrsource *pic_sources[PIC_MAXMAXSOURCES];
87 struct intrsource *pic__iplsources[PIC_MAXMAXSOURCES];
88 struct intrsource **pic_iplsource[NIPL] = {
89 [0 ... NIPL-1] = pic__iplsources,
90 };
91 size_t pic_ipl_offset[NIPL+1];
92
93 static kmutex_t pic_lock;
94 static size_t pic_sourcebase;
95 static int pic_lastbase;
96 static struct evcnt pic_deferral_ev =
97 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "deferred", "intr");
98 EVCNT_ATTACH_STATIC(pic_deferral_ev);
99
100 static int pic_init(void);
101
102 #ifdef __HAVE_PIC_SET_PRIORITY
103 void
104 pic_set_priority(struct cpu_info *ci, int newipl)
105 {
106 register_t psw = cpsid(I32_bit);
107 if (pic_list[0] != NULL)
108 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
109 ci->ci_cpl = newipl;
110 if ((psw & I32_bit) == 0)
111 cpsie(I32_bit);
112 }
113
114 void
115 pic_set_priority_psw(struct cpu_info *ci, register_t psw, int newipl)
116 {
117 if ((psw & I32_bit) == 0) {
118 DISABLE_INTERRUPT();
119 }
120 if (pic_list[0] != NULL) {
121 (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
122 }
123 ci->ci_cpl = newipl;
124 if ((psw & I32_bit) == 0) {
125 ENABLE_INTERRUPT();
126 }
127 }
128 #endif
129
130 #ifdef MULTIPROCESSOR
131 int
132 pic_ipi_ast(void *arg)
133 {
134 setsoftast(curcpu());
135 return 1;
136 }
137
138 int
139 pic_ipi_nop(void *arg)
140 {
141 /* do nothing */
142 return 1;
143 }
144
145 int
146 pic_ipi_xcall(void *arg)
147 {
148 xc_ipi_handler();
149 return 1;
150 }
151
152 int
153 pic_ipi_generic(void *arg)
154 {
155 ipi_cpu_handler();
156 return 1;
157 }
158
159 #ifdef DDB
160 int
161 pic_ipi_ddb(void *arg)
162 {
163 // printf("%s: %s: tf=%p\n", __func__, curcpu()->ci_cpuname, arg);
164 kdb_trap(-1, arg);
165 return 1;
166 }
167 #endif /* DDB */
168
169 #ifdef __HAVE_PREEMPTION
170 int
171 pic_ipi_kpreempt(void *arg)
172 {
173 atomic_or_uint(&curcpu()->ci_astpending, __BIT(1));
174 return 1;
175 }
176 #endif /* __HAVE_PREEMPTION */
177
178 void
179 intr_cpu_init(struct cpu_info *ci)
180 {
181 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
182 struct pic_softc * const pic = pic_list[slot];
183 if (pic != NULL && pic->pic_ops->pic_cpu_init != NULL) {
184 (*pic->pic_ops->pic_cpu_init)(pic, ci);
185 }
186 }
187 }
188
189 typedef void (*pic_ipi_send_func_t)(struct pic_softc *, u_long);
190
191 void
192 intr_ipi_send(const kcpuset_t *kcp, u_long ipi)
193 {
194 struct cpu_info * const ci = curcpu();
195 KASSERT(ipi < NIPI);
196 KASSERT(kcp == NULL || kcpuset_countset(kcp) == 1);
197 bool __diagused sent_p = false;
198 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
199 struct pic_softc * const pic = pic_list[slot];
200 if (pic == NULL || pic->pic_cpus == NULL)
201 continue;
202 if (kcp == NULL || kcpuset_intersecting_p(kcp, pic->pic_cpus)) {
203 /*
204 * Never send to ourself.
205 *
206 * This test uses pointer comparison for systems
207 * that have a pic per cpu, e.g. RPI[23]. GIC sets
208 * pic_cpus to kcpuset_running and handles "not for
209 * self" internally.
210 */
211 if (pic->pic_cpus == ci->ci_kcpuset)
212 continue;
213
214 (*pic->pic_ops->pic_ipi_send)(pic, kcp, ipi);
215
216 /*
217 * If we were targeting a single CPU or this pic
218 * handles all cpus, we're done.
219 */
220 if (kcp != NULL || pic->pic_cpus == kcpuset_running)
221 return;
222 sent_p = true;
223 }
224 }
225 KASSERTMSG(cold || sent_p || ncpu <= 1, "cold %d sent_p %d ncpu %d",
226 cold, sent_p, ncpu);
227 }
228 #endif /* MULTIPROCESSOR */
229
230 #ifdef __HAVE_PIC_FAST_SOFTINTS
231 int
232 pic_handle_softint(void *arg)
233 {
234 void softint_switch(lwp_t *, int);
235 struct cpu_info * const ci = curcpu();
236 const size_t softint = (size_t) arg;
237 int s = splhigh();
238 ci->ci_intr_depth--; // don't count these as interrupts
239 softint_switch(ci->ci_softlwps[softint], s);
240 ci->ci_intr_depth++;
241 splx(s);
242 return 1;
243 }
244 #endif
245
246 int
247 pic_handle_intr(void *arg)
248 {
249 struct pic_softc * const pic = arg;
250 int rv;
251
252 rv = (*pic->pic_ops->pic_find_pending_irqs)(pic);
253
254 return rv > 0;
255 }
256
257 #if defined(__HAVE_PIC_PENDING_INTRS)
258 void
259 pic_mark_pending_source(struct pic_softc *pic, struct intrsource *is)
260 {
261 const uint32_t ipl_mask = __BIT(is->is_ipl);
262 struct cpu_info * const ci = curcpu();
263
264 if (!pic_pending_used)
265 pic_pending_used = true;
266
267 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
268 __BIT(is->is_irq & 0x1f));
269
270 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
271 atomic_or_32(&ci->ci_pending_ipls, ipl_mask);
272 atomic_or_32(&ci->ci_pending_pics, __BIT(pic->pic_id));
273 }
274
275 void
276 pic_mark_pending(struct pic_softc *pic, int irq)
277 {
278 struct intrsource * const is = pic->pic_sources[irq];
279
280 KASSERT(irq < pic->pic_maxsources);
281 KASSERT(is != NULL);
282
283 pic_mark_pending_source(pic, is);
284 }
285
286 uint32_t
287 pic_mark_pending_sources(struct pic_softc *pic, size_t irq_base,
288 uint32_t pending)
289 {
290 struct intrsource ** const isbase = &pic->pic_sources[irq_base];
291 struct intrsource *is;
292 volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
293 struct cpu_info * const ci = curcpu();
294 uint32_t ipl_mask = 0;
295
296 if (pending == 0)
297 return ipl_mask;
298
299 if (!pic_pending_used)
300 pic_pending_used = true;
301
302 KASSERT((irq_base & 31) == 0);
303
304 (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
305
306 atomic_or_32(ipending, pending);
307 while (pending != 0) {
308 int n = ffs(pending);
309 if (n-- == 0)
310 break;
311 is = isbase[n];
312 KASSERT(is != NULL);
313 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
314 pending &= ~__BIT(n);
315 ipl_mask |= __BIT(is->is_ipl);
316 }
317
318 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
319 atomic_or_32(&ci->ci_pending_ipls, ipl_mask);
320 atomic_or_32(&ci->ci_pending_pics, __BIT(pic->pic_id));
321 return ipl_mask;
322 }
323
324 uint32_t
325 pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
326 uint32_t pending, int ipl)
327 {
328 uint32_t ipl_irq_mask = 0;
329 uint32_t irq_mask;
330
331 for (;;) {
332 int irq = ffs(pending);
333 if (irq-- == 0)
334 return ipl_irq_mask;
335
336 irq_mask = __BIT(irq);
337 #if 1
338 KASSERTMSG(pic->pic_sources[irq_base + irq] != NULL,
339 "%s: irq_base %zu irq %d\n", __func__, irq_base, irq);
340 #else
341 if (pic->pic_sources[irq_base + irq] == NULL) {
342 aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
343 irq_base, irq);
344 } else
345 #endif
346 if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
347 ipl_irq_mask |= irq_mask;
348
349 pending &= ~irq_mask;
350 }
351 }
352 #endif /* __HAVE_PIC_PENDING_INTRS */
353
354 void
355 pic_dispatch(struct intrsource *is, void *frame)
356 {
357 int (*func)(void *) = is->is_func;
358 void *arg = is->is_arg;
359
360 if (__predict_false(arg == NULL)) {
361 if (__predict_false(frame == NULL)) {
362 pic_deferral_ev.ev_count++;
363 return;
364 }
365 arg = frame;
366 }
367
368 #ifdef MULTIPROCESSOR
369 if (!is->is_mpsafe) {
370 KERNEL_LOCK(1, NULL);
371 const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
372 const u_int l_blcnt __diagused = curlwp->l_blcnt;
373 (void)(*func)(arg);
374 KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
375 KASSERT(l_blcnt == curlwp->l_blcnt);
376 KERNEL_UNLOCK_ONE(NULL);
377 } else
378 #endif
379 (void)(*func)(arg);
380
381 struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
382 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
383 pcpu->pcpu_evs[is->is_irq].ev_count++;
384 percpu_putref(is->is_pic->pic_percpu);
385 }
386
387 #if defined(__HAVE_PIC_PENDING_INTRS)
388 void
389 pic_deliver_irqs(struct cpu_info *ci, struct pic_softc *pic, int ipl,
390 void *frame)
391 {
392 const uint32_t ipl_mask = __BIT(ipl);
393 struct intrsource *is;
394 volatile uint32_t *ipending = pic->pic_pending_irqs;
395 volatile uint32_t *iblocked = pic->pic_blocked_irqs;
396 size_t irq_base;
397 #if PIC_MAXSOURCES > 32
398 size_t irq_count;
399 int poi = 0; /* Possibility of interrupting */
400 #endif
401 uint32_t pending_irqs;
402 uint32_t blocked_irqs;
403 int irq;
404 bool progress __diagused = false;
405
406 KASSERT(pic->pic_pending_ipls & ipl_mask);
407
408 irq_base = 0;
409 #if PIC_MAXSOURCES > 32
410 irq_count = 0;
411 #endif
412
413 for (;;) {
414 pending_irqs = pic_find_pending_irqs_by_ipl(pic, irq_base,
415 *ipending, ipl);
416 KASSERT((pending_irqs & *ipending) == pending_irqs);
417 KASSERT((pending_irqs & ~(*ipending)) == 0);
418 if (pending_irqs == 0) {
419 #if PIC_MAXSOURCES > 32
420 irq_count += 32;
421 if (__predict_true(irq_count >= pic->pic_maxsources)) {
422 if (!poi)
423 /*Interrupt at this level was handled.*/
424 break;
425 irq_base = 0;
426 irq_count = 0;
427 poi = 0;
428 ipending = pic->pic_pending_irqs;
429 iblocked = pic->pic_blocked_irqs;
430 } else {
431 irq_base += 32;
432 ipending++;
433 iblocked++;
434 KASSERT(irq_base <= pic->pic_maxsources);
435 }
436 continue;
437 #else
438 break;
439 #endif
440 }
441 progress = true;
442 blocked_irqs = 0;
443 do {
444 irq = ffs(pending_irqs) - 1;
445 KASSERT(irq >= 0);
446
447 atomic_and_32(ipending, ~__BIT(irq));
448 is = pic->pic_sources[irq_base + irq];
449 if (is != NULL) {
450 ENABLE_INTERRUPT();
451 pic_dispatch(is, frame);
452 DISABLE_INTERRUPT();
453 #if PIC_MAXSOURCES > 32
454 /*
455 * There is a possibility of interrupting
456 * from ENABLE_INTERRUPT() to
457 * DISABLE_INTERRUPT().
458 */
459 poi = 1;
460 #endif
461 blocked_irqs |= __BIT(irq);
462 } else {
463 KASSERT(0);
464 }
465 pending_irqs = pic_find_pending_irqs_by_ipl(pic,
466 irq_base, *ipending, ipl);
467 } while (pending_irqs);
468 if (blocked_irqs) {
469 atomic_or_32(iblocked, blocked_irqs);
470 atomic_or_32(&ci->ci_blocked_pics, __BIT(pic->pic_id));
471 }
472 }
473
474 KASSERT(progress);
475 /*
476 * Since interrupts are disabled, we don't have to be too careful
477 * about these.
478 */
479 if (atomic_and_32_nv(&pic->pic_pending_ipls, ~ipl_mask) == 0)
480 atomic_and_32(&ci->ci_pending_pics, ~__BIT(pic->pic_id));
481 }
482
483 static void
484 pic_list_unblock_irqs(struct cpu_info *ci)
485 {
486 uint32_t blocked_pics = ci->ci_blocked_pics;
487
488 ci->ci_blocked_pics = 0;
489
490 for (;;) {
491 struct pic_softc *pic;
492 #if PIC_MAXSOURCES > 32
493 volatile uint32_t *iblocked;
494 uint32_t blocked;
495 size_t irq_base;
496 #endif
497
498 int pic_id = ffs(blocked_pics);
499 if (pic_id-- == 0)
500 return;
501
502 pic = pic_list[pic_id];
503 KASSERT(pic != NULL);
504 #if PIC_MAXSOURCES > 32
505 for (irq_base = 0, iblocked = pic->pic_blocked_irqs;
506 irq_base < pic->pic_maxsources;
507 irq_base += 32, iblocked++) {
508 if ((blocked = *iblocked) != 0) {
509 (*pic->pic_ops->pic_unblock_irqs)(pic,
510 irq_base, blocked);
511 atomic_and_32(iblocked, ~blocked);
512 }
513 }
514 #else
515 KASSERT(pic->pic_blocked_irqs[0] != 0);
516 (*pic->pic_ops->pic_unblock_irqs)(pic,
517 0, pic->pic_blocked_irqs[0]);
518 pic->pic_blocked_irqs[0] = 0;
519 #endif
520 blocked_pics &= ~__BIT(pic_id);
521 }
522 }
523
524 struct pic_softc *
525 pic_list_find_pic_by_pending_ipl(struct cpu_info *ci, uint32_t ipl_mask)
526 {
527 uint32_t pending_pics = ci->ci_pending_pics;
528 struct pic_softc *pic;
529
530 for (;;) {
531 int pic_id = ffs(pending_pics);
532 if (pic_id-- == 0)
533 return NULL;
534
535 pic = pic_list[pic_id];
536 KASSERT(pic != NULL);
537 if (pic->pic_pending_ipls & ipl_mask)
538 return pic;
539 pending_pics &= ~__BIT(pic_id);
540 }
541 }
542
543 void
544 pic_list_deliver_irqs(struct cpu_info *ci, register_t psw, int ipl,
545 void *frame)
546 {
547 const uint32_t ipl_mask = __BIT(ipl);
548 struct pic_softc *pic;
549
550 while ((pic = pic_list_find_pic_by_pending_ipl(ci, ipl_mask)) != NULL) {
551 pic_deliver_irqs(ci, pic, ipl, frame);
552 KASSERT((pic->pic_pending_ipls & ipl_mask) == 0);
553 }
554 atomic_and_32(&ci->ci_pending_ipls, ~ipl_mask);
555 }
556 #endif /* __HAVE_PIC_PENDING_INTRS */
557
558 void
559 pic_do_pending_ints(register_t psw, int newipl, void *frame)
560 {
561 struct cpu_info * const ci = curcpu();
562 if (__predict_false(newipl == IPL_HIGH)) {
563 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl %d", ci->ci_cpl);
564 return;
565 }
566 #if defined(__HAVE_PIC_PENDING_INTRS)
567 while ((ci->ci_pending_ipls & ~__BIT(newipl)) > __BIT(newipl)) {
568 KASSERT(ci->ci_pending_ipls < __BIT(NIPL));
569 for (;;) {
570 int ipl = 31 - __builtin_clz(ci->ci_pending_ipls);
571 KASSERT(ipl < NIPL);
572 if (ipl <= newipl)
573 break;
574
575 pic_set_priority_psw(ci, psw, ipl);
576 pic_list_deliver_irqs(ci, psw, ipl, frame);
577 pic_list_unblock_irqs(ci);
578 }
579 }
580 #endif /* __HAVE_PIC_PENDING_INTRS */
581 #ifdef __HAVE_PREEMPTION
582 if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
583 pic_set_priority_psw(ci, psw, IPL_SCHED);
584 kpreempt(0);
585 }
586 #endif
587 if (ci->ci_cpl != newipl)
588 pic_set_priority_psw(ci, psw, newipl);
589 }
590
591 static void
592 pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
593 {
594 struct pic_percpu * const pcpu = v0;
595 struct pic_softc * const pic = v1;
596
597 pcpu->pcpu_evs = kmem_zalloc(pic->pic_maxsources * sizeof(pcpu->pcpu_evs[0]),
598 KM_SLEEP);
599 KASSERT(pcpu->pcpu_evs != NULL);
600
601 #define PCPU_NAMELEN 32
602 #ifdef DIAGNOSTIC
603 const size_t namelen = strlen(pic->pic_name) + 4 + strlen(ci->ci_data.cpu_name);
604 #endif
605
606 KASSERT(namelen < PCPU_NAMELEN);
607 pcpu->pcpu_name = kmem_alloc(PCPU_NAMELEN, KM_SLEEP);
608 #ifdef MULTIPROCESSOR
609 snprintf(pcpu->pcpu_name, PCPU_NAMELEN,
610 "%s (%s)", pic->pic_name, ci->ci_data.cpu_name);
611 #else
612 strlcpy(pcpu->pcpu_name, pic->pic_name, PCPU_NAMELEN);
613 #endif
614 pcpu->pcpu_magic = PICPERCPU_MAGIC;
615 #if 0
616 printf("%s: %s %s: <%s>\n",
617 __func__, ci->ci_data.cpu_name, pic->pic_name,
618 pcpu->pcpu_name);
619 #endif
620 }
621
622 static int
623 pic_init(void)
624 {
625
626 mutex_init(&pic_lock, MUTEX_DEFAULT, IPL_HIGH);
627
628 return 0;
629 }
630
631 int
632 pic_add(struct pic_softc *pic, int irqbase)
633 {
634 int slot, maybe_slot = -1;
635 size_t sourcebase;
636 static ONCE_DECL(pic_once);
637
638 RUN_ONCE(&pic_once, pic_init);
639
640 KASSERT(strlen(pic->pic_name) > 0);
641
642 mutex_enter(&pic_lock);
643 if (irqbase == PIC_IRQBASE_ALLOC) {
644 irqbase = pic_lastbase;
645 }
646 for (slot = 0; slot < PIC_MAXPICS; slot++) {
647 struct pic_softc * const xpic = pic_list[slot];
648 if (xpic == NULL) {
649 if (maybe_slot < 0)
650 maybe_slot = slot;
651 if (irqbase < 0)
652 break;
653 continue;
654 }
655 if (irqbase < 0 || xpic->pic_irqbase < 0)
656 continue;
657 if (irqbase >= xpic->pic_irqbase + xpic->pic_maxsources)
658 continue;
659 if (irqbase + pic->pic_maxsources <= xpic->pic_irqbase)
660 continue;
661 panic("pic_add: pic %s (%zu sources @ irq %u) conflicts"
662 " with pic %s (%zu sources @ irq %u)",
663 pic->pic_name, pic->pic_maxsources, irqbase,
664 xpic->pic_name, xpic->pic_maxsources, xpic->pic_irqbase);
665 }
666 slot = maybe_slot;
667 #if 0
668 printf("%s: pic_sourcebase=%zu pic_maxsources=%zu\n",
669 pic->pic_name, pic_sourcebase, pic->pic_maxsources);
670 #endif
671 KASSERTMSG(pic->pic_maxsources <= PIC_MAXSOURCES, "%zu",
672 pic->pic_maxsources);
673 KASSERT(pic_sourcebase + pic->pic_maxsources <= PIC_MAXMAXSOURCES);
674 sourcebase = pic_sourcebase;
675 pic_sourcebase += pic->pic_maxsources;
676 if (pic_lastbase < irqbase + pic->pic_maxsources)
677 pic_lastbase = irqbase + pic->pic_maxsources;
678 mutex_exit(&pic_lock);
679
680 /*
681 * Allocate a pointer to each cpu's evcnts and then, for each cpu,
682 * allocate its evcnts and then attach an evcnt for each pin.
683 * We can't allocate the evcnt structures directly since
684 * percpu will move the contents of percpu memory around and
685 * corrupt the pointers in the evcnts themselves. Remember, any
686 * problem can be solved with sufficient indirection.
687 */
688 pic->pic_percpu = percpu_create(sizeof(struct pic_percpu),
689 pic_percpu_allocate, NULL, pic);
690
691 pic->pic_sources = &pic_sources[sourcebase];
692 pic->pic_irqbase = irqbase;
693 pic->pic_id = slot;
694 #ifdef __HAVE_PIC_SET_PRIORITY
695 KASSERT((slot == 0) == (pic->pic_ops->pic_set_priority != NULL));
696 #endif
697 #ifdef MULTIPROCESSOR
698 KASSERT((pic->pic_cpus != NULL) == (pic->pic_ops->pic_ipi_send != NULL));
699 #endif
700 pic_list[slot] = pic;
701
702 return irqbase;
703 }
704
705 int
706 pic_alloc_irq(struct pic_softc *pic)
707 {
708 int irq;
709
710 for (irq = 0; irq < pic->pic_maxsources; irq++) {
711 if (pic->pic_sources[irq] == NULL)
712 return irq;
713 }
714
715 return -1;
716 }
717
718 static void
719 pic_percpu_evcnt_attach(void *v0, void *v1, struct cpu_info *ci)
720 {
721 struct pic_percpu * const pcpu = v0;
722 struct intrsource * const is = v1;
723
724 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
725 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
726 pcpu->pcpu_name, is->is_source);
727 }
728
729 void *
730 pic_establish_intr(struct pic_softc *pic, int irq, int ipl, int type,
731 int (*func)(void *), void *arg, const char *xname)
732 {
733 struct intrsource *is;
734 int off, nipl;
735
736 if (pic->pic_sources[irq]) {
737 printf("pic_establish_intr: pic %s irq %d already present\n",
738 pic->pic_name, irq);
739 return NULL;
740 }
741
742 is = kmem_zalloc(sizeof(*is), KM_SLEEP);
743 is->is_pic = pic;
744 is->is_irq = irq;
745 is->is_ipl = ipl;
746 is->is_type = type & 0xff;
747 is->is_func = func;
748 is->is_arg = arg;
749 #ifdef MULTIPROCESSOR
750 is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;
751 #endif
752
753 if (pic->pic_ops->pic_source_name)
754 (*pic->pic_ops->pic_source_name)(pic, irq, is->is_source,
755 sizeof(is->is_source));
756 else
757 snprintf(is->is_source, sizeof(is->is_source), "irq %d", irq);
758
759 /*
760 * Now attach the per-cpu evcnts.
761 */
762 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_attach, is);
763
764 pic->pic_sources[irq] = is;
765
766 /*
767 * First try to use an existing slot which is empty.
768 */
769 for (off = pic_ipl_offset[ipl]; off < pic_ipl_offset[ipl+1]; off++) {
770 if (pic__iplsources[off] == NULL) {
771 is->is_iplidx = off - pic_ipl_offset[ipl];
772 pic__iplsources[off] = is;
773 goto unblock;
774 }
775 }
776
777 /*
778 * Move up all the sources by one.
779 */
780 if (ipl < NIPL) {
781 off = pic_ipl_offset[ipl+1];
782 memmove(&pic__iplsources[off+1], &pic__iplsources[off],
783 sizeof(pic__iplsources[0]) * (pic_ipl_offset[NIPL] - off));
784 }
785
786 /*
787 * Advance the offset of all IPLs higher than this. Include an
788 * extra one as well. Thus the number of sources per ipl is
789 * pic_ipl_offset[ipl+1] - pic_ipl_offset[ipl].
790 */
791 for (nipl = ipl + 1; nipl <= NIPL; nipl++)
792 pic_ipl_offset[nipl]++;
793
794 /*
795 * Insert into the previously made position at the end of this IPL's
796 * sources.
797 */
798 off = pic_ipl_offset[ipl + 1] - 1;
799 is->is_iplidx = off - pic_ipl_offset[ipl];
800 pic__iplsources[off] = is;
801
802 (*pic->pic_ops->pic_establish_irq)(pic, is);
803
804 unblock:
805 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
806 __BIT(is->is_irq & 0x1f));
807
808 if (xname) {
809 if (is->is_xname == NULL)
810 is->is_xname = kmem_zalloc(INTRDEVNAMEBUF, KM_SLEEP);
811 if (is->is_xname[0] != '\0')
812 strlcat(is->is_xname, ", ", INTRDEVNAMEBUF);
813 strlcat(is->is_xname, xname, INTRDEVNAMEBUF);
814 }
815
816 /* We're done. */
817 return is;
818 }
819
820 static void
821 pic_percpu_evcnt_deattach(void *v0, void *v1, struct cpu_info *ci)
822 {
823 struct pic_percpu * const pcpu = v0;
824 struct intrsource * const is = v1;
825
826 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
827 evcnt_detach(&pcpu->pcpu_evs[is->is_irq]);
828 }
829
830 void
831 pic_disestablish_source(struct intrsource *is)
832 {
833 struct pic_softc * const pic = is->is_pic;
834 const int irq = is->is_irq;
835
836 KASSERT(is == pic->pic_sources[irq]);
837
838 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
839 pic->pic_sources[irq] = NULL;
840 pic__iplsources[pic_ipl_offset[is->is_ipl] + is->is_iplidx] = NULL;
841 if (is->is_xname != NULL) {
842 kmem_free(is->is_xname, INTRDEVNAMEBUF);
843 is->is_xname = NULL;
844 }
845 /*
846 * Now detach the per-cpu evcnts.
847 */
848 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_deattach, is);
849
850 kmem_free(is, sizeof(*is));
851 }
852
853 void *
854 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
855 {
856 return intr_establish_xname(irq, ipl, type, func, arg, NULL);
857 }
858
859 void *
860 intr_establish_xname(int irq, int ipl, int type, int (*func)(void *), void *arg,
861 const char *xname)
862 {
863 KASSERT(!cpu_intr_p());
864 KASSERT(!cpu_softintr_p());
865
866 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
867 struct pic_softc * const pic = pic_list[slot];
868 if (pic == NULL || pic->pic_irqbase < 0)
869 continue;
870 if (pic->pic_irqbase <= irq
871 && irq < pic->pic_irqbase + pic->pic_maxsources) {
872 return pic_establish_intr(pic, irq - pic->pic_irqbase,
873 ipl, type, func, arg, xname);
874 }
875 }
876
877 return NULL;
878 }
879
880 void
881 intr_disestablish(void *ih)
882 {
883 struct intrsource * const is = ih;
884
885 KASSERT(!cpu_intr_p());
886 KASSERT(!cpu_softintr_p());
887
888 pic_disestablish_source(is);
889 }
890
891 void
892 intr_mask(void *ih)
893 {
894 struct intrsource * const is = ih;
895 struct pic_softc * const pic = is->is_pic;
896 const int irq = is->is_irq;
897
898 if (atomic_inc_32_nv(&is->is_mask_count) == 1)
899 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
900 }
901
902 void
903 intr_unmask(void *ih)
904 {
905 struct intrsource * const is = ih;
906 struct pic_softc * const pic = is->is_pic;
907 const int irq = is->is_irq;
908
909 if (atomic_dec_32_nv(&is->is_mask_count) == 0)
910 (*pic->pic_ops->pic_unblock_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
911 }
912
913 const char *
914 intr_string(intr_handle_t irq, char *buf, size_t len)
915 {
916 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
917 struct pic_softc * const pic = pic_list[slot];
918 if (pic == NULL || pic->pic_irqbase < 0)
919 continue;
920 if (pic->pic_irqbase <= irq
921 && irq < pic->pic_irqbase + pic->pic_maxsources) {
922 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
923 snprintf(buf, len, "%s %s", pic->pic_name, is->is_source);
924 return buf;
925 }
926 }
927
928 return NULL;
929 }
930
931 static struct intrsource *
932 intr_get_source(const char *intrid)
933 {
934 struct intrsource *is;
935 intrid_t buf;
936 size_t slot;
937 int irq;
938
939 KASSERT(mutex_owned(&cpu_lock));
940
941 for (slot = 0; slot < PIC_MAXPICS; slot++) {
942 struct pic_softc * const pic = pic_list[slot];
943 if (pic == NULL || pic->pic_irqbase < 0)
944 continue;
945 for (irq = 0; irq < pic->pic_maxsources; irq++) {
946 is = pic->pic_sources[irq];
947 if (is == NULL || is->is_source[0] == '\0')
948 continue;
949
950 snprintf(buf, sizeof(buf), "%s %s", pic->pic_name, is->is_source);
951 if (strcmp(buf, intrid) == 0)
952 return is;
953 }
954 }
955
956 return NULL;
957 }
958
959 struct intrids_handler *
960 interrupt_construct_intrids(const kcpuset_t *cpuset)
961 {
962 struct intrids_handler *iih;
963 struct intrsource *is;
964 int count, irq, n;
965 size_t slot;
966
967 if (kcpuset_iszero(cpuset))
968 return NULL;
969
970 count = 0;
971 for (slot = 0; slot < PIC_MAXPICS; slot++) {
972 struct pic_softc * const pic = pic_list[slot];
973 if (pic != NULL && pic->pic_irqbase >= 0) {
974 for (irq = 0; irq < pic->pic_maxsources; irq++) {
975 is = pic->pic_sources[irq];
976 if (is && is->is_source[0] != '\0')
977 count++;
978 }
979 }
980 }
981
982 iih = kmem_zalloc(sizeof(int) + sizeof(intrid_t) * count, KM_SLEEP);
983 iih->iih_nids = count;
984
985 for (n = 0, slot = 0; n < count && slot < PIC_MAXPICS; slot++) {
986 struct pic_softc * const pic = pic_list[slot];
987 if (pic == NULL || pic->pic_irqbase < 0)
988 continue;
989 for (irq = 0; irq < pic->pic_maxsources; irq++) {
990 is = pic->pic_sources[irq];
991 if (is == NULL || is->is_source[0] == '\0')
992 continue;
993
994 snprintf(iih->iih_intrids[n++], sizeof(intrid_t), "%s %s",
995 pic->pic_name, is->is_source);
996 }
997 }
998
999 return iih;
1000 }
1001
1002 void
1003 interrupt_destruct_intrids(struct intrids_handler *iih)
1004 {
1005 if (iih == NULL)
1006 return;
1007
1008 kmem_free(iih, sizeof(int) + sizeof(intrid_t) * iih->iih_nids);
1009 }
1010
1011 void
1012 interrupt_get_available(kcpuset_t *cpuset)
1013 {
1014 CPU_INFO_ITERATOR cii;
1015 struct cpu_info *ci;
1016
1017 kcpuset_zero(cpuset);
1018
1019 mutex_enter(&cpu_lock);
1020 for (CPU_INFO_FOREACH(cii, ci)) {
1021 if ((ci->ci_schedstate.spc_flags & SPCF_NOINTR) == 0)
1022 kcpuset_set(cpuset, cpu_index(ci));
1023 }
1024 mutex_exit(&cpu_lock);
1025 }
1026
1027 void
1028 interrupt_get_devname(const char *intrid, char *buf, size_t len)
1029 {
1030 struct intrsource *is;
1031
1032 mutex_enter(&cpu_lock);
1033 is = intr_get_source(intrid);
1034 if (is == NULL || is->is_xname == NULL)
1035 buf[0] = '\0';
1036 else
1037 strlcpy(buf, is->is_xname, len);
1038 mutex_exit(&cpu_lock);
1039 }
1040
1041 struct interrupt_get_count_arg {
1042 struct intrsource *is;
1043 uint64_t count;
1044 u_int cpu_idx;
1045 };
1046
1047 static void
1048 interrupt_get_count_cb(void *v0, void *v1, struct cpu_info *ci)
1049 {
1050 struct pic_percpu * const pcpu = v0;
1051 struct interrupt_get_count_arg * const arg = v1;
1052
1053 if (arg->cpu_idx != cpu_index(ci))
1054 return;
1055
1056 arg->count = pcpu->pcpu_evs[arg->is->is_irq].ev_count;
1057 }
1058
1059 uint64_t
1060 interrupt_get_count(const char *intrid, u_int cpu_idx)
1061 {
1062 struct interrupt_get_count_arg arg;
1063 struct intrsource *is;
1064 uint64_t count;
1065
1066 count = 0;
1067
1068 mutex_enter(&cpu_lock);
1069 is = intr_get_source(intrid);
1070 if (is != NULL && is->is_pic != NULL) {
1071 arg.is = is;
1072 arg.count = 0;
1073 arg.cpu_idx = cpu_idx;
1074 percpu_foreach(is->is_pic->pic_percpu, interrupt_get_count_cb, &arg);
1075 count = arg.count;
1076 }
1077 mutex_exit(&cpu_lock);
1078
1079 return count;
1080 }
1081
1082 #ifdef MULTIPROCESSOR
1083 void
1084 interrupt_get_assigned(const char *intrid, kcpuset_t *cpuset)
1085 {
1086 struct intrsource *is;
1087 struct pic_softc *pic;
1088
1089 kcpuset_zero(cpuset);
1090
1091 mutex_enter(&cpu_lock);
1092 is = intr_get_source(intrid);
1093 if (is != NULL) {
1094 pic = is->is_pic;
1095 if (pic && pic->pic_ops->pic_get_affinity)
1096 pic->pic_ops->pic_get_affinity(pic, is->is_irq, cpuset);
1097 }
1098 mutex_exit(&cpu_lock);
1099 }
1100
1101 int
1102 interrupt_distribute_handler(const char *intrid, const kcpuset_t *newset,
1103 kcpuset_t *oldset)
1104 {
1105 struct intrsource *is;
1106 int error;
1107
1108 mutex_enter(&cpu_lock);
1109 is = intr_get_source(intrid);
1110 if (is == NULL) {
1111 error = ENOENT;
1112 } else {
1113 error = interrupt_distribute(is, newset, oldset);
1114 }
1115 mutex_exit(&cpu_lock);
1116
1117 return error;
1118 }
1119
1120 int
1121 interrupt_distribute(void *ih, const kcpuset_t *newset, kcpuset_t *oldset)
1122 {
1123 struct intrsource * const is = ih;
1124 struct pic_softc * const pic = is->is_pic;
1125
1126 if (pic == NULL)
1127 return EOPNOTSUPP;
1128 if (pic->pic_ops->pic_set_affinity == NULL ||
1129 pic->pic_ops->pic_get_affinity == NULL)
1130 return EOPNOTSUPP;
1131
1132 if (!is->is_mpsafe)
1133 return EINVAL;
1134
1135 if (oldset != NULL)
1136 pic->pic_ops->pic_get_affinity(pic, is->is_irq, oldset);
1137
1138 return pic->pic_ops->pic_set_affinity(pic, is->is_irq, newset);
1139 }
1140 #endif
1141