pic.c revision 1.69 1 /* $NetBSD: pic.c,v 1.69 2021/02/21 17:07:45 jmcneill Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #define _INTR_PRIVATE
32 #include "opt_ddb.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.69 2021/02/21 17:07:45 jmcneill Exp $");
37
38 #include <sys/param.h>
39 #include <sys/atomic.h>
40 #include <sys/cpu.h>
41 #include <sys/evcnt.h>
42 #include <sys/interrupt.h>
43 #include <sys/intr.h>
44 #include <sys/ipi.h>
45 #include <sys/kernel.h>
46 #include <sys/kmem.h>
47 #include <sys/mutex.h>
48 #include <sys/once.h>
49 #include <sys/xcall.h>
50
51 #include <arm/armreg.h>
52 #include <arm/cpufunc.h>
53 #include <arm/locore.h> /* for compat aarch64 */
54
55 #ifdef DDB
56 #include <arm/db_machdep.h>
57 #endif
58
59 #include <arm/pic/picvar.h>
60
61 #if defined(__HAVE_PIC_PENDING_INTRS)
62
63 /*
64 * This implementation of pending interrupts on a MULTIPROCESSOR system makes
65 * the assumption that a PIC (pic_softc) shall only have all its interrupts
66 * come from the same CPU. In other words, interrupts from a single PIC will
67 * not be distributed among multiple CPUs.
68 */
69 static uint32_t
70 pic_find_pending_irqs_by_ipl(struct pic_softc *, size_t, uint32_t, int);
71 static struct pic_softc *
72 pic_list_find_pic_by_pending_ipl(struct cpu_info *, uint32_t);
73 static void
74 pic_deliver_irqs(struct cpu_info *, struct pic_softc *, int, void *);
75
76 #endif /* __HAVE_PIC_PENDING_INTRS */
77
78 struct pic_softc *pic_list[PIC_MAXPICS];
79 #if PIC_MAXPICS > 32
80 #error PIC_MAXPICS > 32 not supported
81 #endif
82 struct intrsource *pic_sources[PIC_MAXMAXSOURCES];
83 struct intrsource *pic__iplsources[PIC_MAXMAXSOURCES];
84 struct intrsource **pic_iplsource[NIPL] = {
85 [0 ... NIPL-1] = pic__iplsources,
86 };
87 size_t pic_ipl_offset[NIPL+1];
88
89 static kmutex_t pic_lock;
90 static size_t pic_sourcebase;
91 static int pic_lastbase;
92 static struct evcnt pic_deferral_ev =
93 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "deferred", "intr");
94 EVCNT_ATTACH_STATIC(pic_deferral_ev);
95
96 static int pic_init(void);
97
98 #ifdef MULTIPROCESSOR
99 int
100 pic_ipi_ast(void *arg)
101 {
102 setsoftast(curcpu());
103 return 1;
104 }
105
106 int
107 pic_ipi_nop(void *arg)
108 {
109 /* do nothing */
110 return 1;
111 }
112
113 int
114 pic_ipi_xcall(void *arg)
115 {
116 xc_ipi_handler();
117 return 1;
118 }
119
120 int
121 pic_ipi_generic(void *arg)
122 {
123 ipi_cpu_handler();
124 return 1;
125 }
126
127 #ifdef DDB
128 int
129 pic_ipi_ddb(void *arg)
130 {
131 // printf("%s: %s: tf=%p\n", __func__, curcpu()->ci_cpuname, arg);
132 kdb_trap(-1, arg);
133 return 1;
134 }
135 #endif /* DDB */
136
137 #ifdef __HAVE_PREEMPTION
138 int
139 pic_ipi_kpreempt(void *arg)
140 {
141 struct lwp *l = curlwp;
142
143 l->l_md.md_astpending |= __BIT(1);
144 return 1;
145 }
146 #endif /* __HAVE_PREEMPTION */
147
148 void
149 intr_cpu_init(struct cpu_info *ci)
150 {
151 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
152 struct pic_softc * const pic = pic_list[slot];
153 if (pic != NULL && pic->pic_ops->pic_cpu_init != NULL) {
154 (*pic->pic_ops->pic_cpu_init)(pic, ci);
155 }
156 }
157 }
158
159 typedef void (*pic_ipi_send_func_t)(struct pic_softc *, u_long);
160
161 void
162 intr_ipi_send(const kcpuset_t *kcp, u_long ipi)
163 {
164 struct cpu_info * const ci = curcpu();
165 KASSERT(ipi < NIPI);
166 KASSERT(kcp == NULL || kcpuset_countset(kcp) == 1);
167 bool __diagused sent_p = false;
168 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
169 struct pic_softc * const pic = pic_list[slot];
170 if (pic == NULL || pic->pic_cpus == NULL)
171 continue;
172 if (kcp == NULL || kcpuset_intersecting_p(kcp, pic->pic_cpus)) {
173 /*
174 * Never send to ourself.
175 *
176 * This test uses pointer comparison for systems
177 * that have a pic per cpu, e.g. RPI[23]. GIC sets
178 * pic_cpus to kcpuset_running and handles "not for
179 * self" internally.
180 */
181 if (pic->pic_cpus == ci->ci_kcpuset)
182 continue;
183
184 (*pic->pic_ops->pic_ipi_send)(pic, kcp, ipi);
185
186 /*
187 * If we were targeting a single CPU or this pic
188 * handles all cpus, we're done.
189 */
190 if (kcp != NULL || pic->pic_cpus == kcpuset_running)
191 return;
192 sent_p = true;
193 }
194 }
195 KASSERTMSG(cold || sent_p || ncpu <= 1, "cold %d sent_p %d ncpu %d",
196 cold, sent_p, ncpu);
197 }
198 #endif /* MULTIPROCESSOR */
199
200 #ifdef __HAVE_PIC_FAST_SOFTINTS
201 int
202 pic_handle_softint(void *arg)
203 {
204 void softint_switch(lwp_t *, int);
205 struct cpu_info * const ci = curcpu();
206 const size_t softint = (size_t) arg;
207 int s = splhigh();
208 ci->ci_intr_depth--; // don't count these as interrupts
209 softint_switch(ci->ci_softlwps[softint], s);
210 ci->ci_intr_depth++;
211 splx(s);
212 return 1;
213 }
214 #endif
215
216 int
217 pic_handle_intr(void *arg)
218 {
219 struct pic_softc * const pic = arg;
220 int rv;
221
222 rv = (*pic->pic_ops->pic_find_pending_irqs)(pic);
223
224 return rv > 0;
225 }
226
227 #if defined(__HAVE_PIC_PENDING_INTRS)
228 void
229 pic_mark_pending_source(struct pic_softc *pic, struct intrsource *is)
230 {
231 const uint32_t ipl_mask = __BIT(is->is_ipl);
232 struct cpu_info * const ci = curcpu();
233
234 atomic_or_32(&pic->pic_pending_irqs[is->is_irq >> 5],
235 __BIT(is->is_irq & 0x1f));
236
237 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
238 atomic_or_32(&ci->ci_pending_ipls, ipl_mask);
239 atomic_or_32(&ci->ci_pending_pics, __BIT(pic->pic_id));
240 }
241
242 void
243 pic_mark_pending(struct pic_softc *pic, int irq)
244 {
245 struct intrsource * const is = pic->pic_sources[irq];
246
247 KASSERT(irq < pic->pic_maxsources);
248 KASSERT(is != NULL);
249
250 pic_mark_pending_source(pic, is);
251 }
252
253 uint32_t
254 pic_mark_pending_sources(struct pic_softc *pic, size_t irq_base,
255 uint32_t pending)
256 {
257 struct intrsource ** const isbase = &pic->pic_sources[irq_base];
258 struct intrsource *is;
259 volatile uint32_t *ipending = &pic->pic_pending_irqs[irq_base >> 5];
260 struct cpu_info * const ci = curcpu();
261 uint32_t ipl_mask = 0;
262
263 if (pending == 0)
264 return ipl_mask;
265
266 KASSERT((irq_base & 31) == 0);
267
268 (*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
269
270 atomic_or_32(ipending, pending);
271 while (pending != 0) {
272 int n = ffs(pending);
273 if (n-- == 0)
274 break;
275 is = isbase[n];
276 KASSERT(is != NULL);
277 KASSERT(irq_base <= is->is_irq && is->is_irq < irq_base + 32);
278 pending &= ~__BIT(n);
279 ipl_mask |= __BIT(is->is_ipl);
280 }
281
282 atomic_or_32(&pic->pic_pending_ipls, ipl_mask);
283 atomic_or_32(&ci->ci_pending_ipls, ipl_mask);
284 atomic_or_32(&ci->ci_pending_pics, __BIT(pic->pic_id));
285 return ipl_mask;
286 }
287
288 uint32_t
289 pic_find_pending_irqs_by_ipl(struct pic_softc *pic, size_t irq_base,
290 uint32_t pending, int ipl)
291 {
292 uint32_t ipl_irq_mask = 0;
293 uint32_t irq_mask;
294
295 for (;;) {
296 int irq = ffs(pending);
297 if (irq-- == 0)
298 return ipl_irq_mask;
299
300 irq_mask = __BIT(irq);
301 #if 1
302 KASSERTMSG(pic->pic_sources[irq_base + irq] != NULL,
303 "%s: irq_base %zu irq %d\n", __func__, irq_base, irq);
304 #else
305 if (pic->pic_sources[irq_base + irq] == NULL) {
306 aprint_error("stray interrupt? irq_base=%zu irq=%d\n",
307 irq_base, irq);
308 } else
309 #endif
310 if (pic->pic_sources[irq_base + irq]->is_ipl == ipl)
311 ipl_irq_mask |= irq_mask;
312
313 pending &= ~irq_mask;
314 }
315 }
316 #endif /* __HAVE_PIC_PENDING_INTRS */
317
318 void
319 pic_dispatch(struct intrsource *is, void *frame)
320 {
321 int (*func)(void *) = is->is_func;
322 void *arg = is->is_arg;
323
324 if (__predict_false(arg == NULL)) {
325 if (__predict_false(frame == NULL)) {
326 pic_deferral_ev.ev_count++;
327 return;
328 }
329 arg = frame;
330 }
331
332 #ifdef MULTIPROCESSOR
333 if (!is->is_mpsafe) {
334 KERNEL_LOCK(1, NULL);
335 const u_int ci_blcnt __diagused = curcpu()->ci_biglock_count;
336 const u_int l_blcnt __diagused = curlwp->l_blcnt;
337 (void)(*func)(arg);
338 KASSERT(ci_blcnt == curcpu()->ci_biglock_count);
339 KASSERT(l_blcnt == curlwp->l_blcnt);
340 KERNEL_UNLOCK_ONE(NULL);
341 } else
342 #endif
343 (void)(*func)(arg);
344
345 struct pic_percpu * const pcpu = percpu_getref(is->is_pic->pic_percpu);
346 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
347 pcpu->pcpu_evs[is->is_irq].ev_count++;
348 percpu_putref(is->is_pic->pic_percpu);
349 }
350
351 #if defined(__HAVE_PIC_PENDING_INTRS)
352 void
353 pic_deliver_irqs(struct cpu_info *ci, struct pic_softc *pic, int ipl,
354 void *frame)
355 {
356 const uint32_t ipl_mask = __BIT(ipl);
357 struct intrsource *is;
358 volatile uint32_t *ipending = pic->pic_pending_irqs;
359 volatile uint32_t *iblocked = pic->pic_blocked_irqs;
360 size_t irq_base;
361 #if PIC_MAXSOURCES > 32
362 size_t irq_count;
363 int poi = 0; /* Possibility of interrupting */
364 #endif
365 uint32_t pending_irqs;
366 uint32_t blocked_irqs;
367 int irq;
368 bool progress __diagused = false;
369
370 KASSERT(pic->pic_pending_ipls & ipl_mask);
371
372 irq_base = 0;
373 #if PIC_MAXSOURCES > 32
374 irq_count = 0;
375 #endif
376
377 for (;;) {
378 pending_irqs = pic_find_pending_irqs_by_ipl(pic, irq_base,
379 *ipending, ipl);
380 KASSERT((pending_irqs & *ipending) == pending_irqs);
381 KASSERT((pending_irqs & ~(*ipending)) == 0);
382 if (pending_irqs == 0) {
383 #if PIC_MAXSOURCES > 32
384 irq_count += 32;
385 if (__predict_true(irq_count >= pic->pic_maxsources)) {
386 if (!poi)
387 /*Interrupt at this level was handled.*/
388 break;
389 irq_base = 0;
390 irq_count = 0;
391 poi = 0;
392 ipending = pic->pic_pending_irqs;
393 iblocked = pic->pic_blocked_irqs;
394 } else {
395 irq_base += 32;
396 ipending++;
397 iblocked++;
398 KASSERT(irq_base <= pic->pic_maxsources);
399 }
400 continue;
401 #else
402 break;
403 #endif
404 }
405 progress = true;
406 blocked_irqs = 0;
407 do {
408 irq = ffs(pending_irqs) - 1;
409 KASSERT(irq >= 0);
410
411 atomic_and_32(ipending, ~__BIT(irq));
412 is = pic->pic_sources[irq_base + irq];
413 if (is != NULL) {
414 ENABLE_INTERRUPT();
415 pic_dispatch(is, frame);
416 DISABLE_INTERRUPT();
417 #if PIC_MAXSOURCES > 32
418 /*
419 * There is a possibility of interrupting
420 * from ENABLE_INTERRUPT() to
421 * DISABLE_INTERRUPT().
422 */
423 poi = 1;
424 #endif
425 blocked_irqs |= __BIT(irq);
426 } else {
427 KASSERT(0);
428 }
429 pending_irqs = pic_find_pending_irqs_by_ipl(pic,
430 irq_base, *ipending, ipl);
431 } while (pending_irqs);
432 if (blocked_irqs) {
433 atomic_or_32(iblocked, blocked_irqs);
434 atomic_or_32(&ci->ci_blocked_pics, __BIT(pic->pic_id));
435 }
436 }
437
438 KASSERT(progress);
439 /*
440 * Since interrupts are disabled, we don't have to be too careful
441 * about these.
442 */
443 if (atomic_and_32_nv(&pic->pic_pending_ipls, ~ipl_mask) == 0)
444 atomic_and_32(&ci->ci_pending_pics, ~__BIT(pic->pic_id));
445 }
446
447 void
448 pic_list_unblock_irqs(struct cpu_info *ci)
449 {
450 uint32_t blocked_pics = ci->ci_blocked_pics;
451
452 ci->ci_blocked_pics = 0;
453
454 for (;;) {
455 struct pic_softc *pic;
456 #if PIC_MAXSOURCES > 32
457 volatile uint32_t *iblocked;
458 uint32_t blocked;
459 size_t irq_base;
460 #endif
461
462 int pic_id = ffs(blocked_pics);
463 if (pic_id-- == 0)
464 return;
465
466 pic = pic_list[pic_id];
467 KASSERT(pic != NULL);
468 #if PIC_MAXSOURCES > 32
469 for (irq_base = 0, iblocked = pic->pic_blocked_irqs;
470 irq_base < pic->pic_maxsources;
471 irq_base += 32, iblocked++) {
472 if ((blocked = *iblocked) != 0) {
473 (*pic->pic_ops->pic_unblock_irqs)(pic,
474 irq_base, blocked);
475 atomic_and_32(iblocked, ~blocked);
476 }
477 }
478 #else
479 KASSERT(pic->pic_blocked_irqs[0] != 0);
480 (*pic->pic_ops->pic_unblock_irqs)(pic,
481 0, pic->pic_blocked_irqs[0]);
482 pic->pic_blocked_irqs[0] = 0;
483 #endif
484 blocked_pics &= ~__BIT(pic_id);
485 }
486 }
487
488 struct pic_softc *
489 pic_list_find_pic_by_pending_ipl(struct cpu_info *ci, uint32_t ipl_mask)
490 {
491 uint32_t pending_pics = ci->ci_pending_pics;
492 struct pic_softc *pic;
493
494 for (;;) {
495 int pic_id = ffs(pending_pics);
496 if (pic_id-- == 0)
497 return NULL;
498
499 pic = pic_list[pic_id];
500 KASSERT(pic != NULL);
501 if (pic->pic_pending_ipls & ipl_mask)
502 return pic;
503 pending_pics &= ~__BIT(pic_id);
504 }
505 }
506
507 void
508 pic_list_deliver_irqs(struct cpu_info *ci, register_t psw, int ipl,
509 void *frame)
510 {
511 const uint32_t ipl_mask = __BIT(ipl);
512 struct pic_softc *pic;
513
514 while ((pic = pic_list_find_pic_by_pending_ipl(ci, ipl_mask)) != NULL) {
515 pic_deliver_irqs(ci, pic, ipl, frame);
516 KASSERT((pic->pic_pending_ipls & ipl_mask) == 0);
517 }
518 atomic_and_32(&ci->ci_pending_ipls, ~ipl_mask);
519 }
520 #endif /* __HAVE_PIC_PENDING_INTRS */
521
522 void
523 pic_do_pending_ints(register_t psw, int newipl, void *frame)
524 {
525 struct cpu_info * const ci = curcpu();
526 if (__predict_false(newipl == IPL_HIGH)) {
527 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl %d", ci->ci_cpl);
528 return;
529 }
530 #if defined(__HAVE_PIC_PENDING_INTRS)
531 while ((ci->ci_pending_ipls & ~__BIT(newipl)) > __BIT(newipl)) {
532 KASSERT(ci->ci_pending_ipls < __BIT(NIPL));
533 for (;;) {
534 int ipl = 31 - __builtin_clz(ci->ci_pending_ipls);
535 KASSERT(ipl < NIPL);
536 if (ipl <= newipl)
537 break;
538
539 pic_set_priority(ci, ipl);
540 pic_list_deliver_irqs(ci, psw, ipl, frame);
541 pic_list_unblock_irqs(ci);
542 }
543 }
544 #endif /* __HAVE_PIC_PENDING_INTRS */
545 #ifdef __HAVE_PREEMPTION
546 struct lwp *l = curlwp;
547 if (newipl == IPL_NONE && (l->l_md.md_astpending & __BIT(1))) {
548 pic_set_priority(ci, IPL_SCHED);
549 kpreempt(0);
550 }
551 #endif
552 if (ci->ci_cpl != newipl)
553 pic_set_priority(ci, newipl);
554 }
555
556 static void
557 pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
558 {
559 struct pic_percpu * const pcpu = v0;
560 struct pic_softc * const pic = v1;
561
562 pcpu->pcpu_evs = kmem_zalloc(pic->pic_maxsources * sizeof(pcpu->pcpu_evs[0]),
563 KM_SLEEP);
564 KASSERT(pcpu->pcpu_evs != NULL);
565
566 #define PCPU_NAMELEN 32
567 #ifdef DIAGNOSTIC
568 const size_t namelen = strlen(pic->pic_name) + 4 + strlen(ci->ci_data.cpu_name);
569 #endif
570
571 KASSERT(namelen < PCPU_NAMELEN);
572 pcpu->pcpu_name = kmem_alloc(PCPU_NAMELEN, KM_SLEEP);
573 #ifdef MULTIPROCESSOR
574 snprintf(pcpu->pcpu_name, PCPU_NAMELEN,
575 "%s (%s)", pic->pic_name, ci->ci_data.cpu_name);
576 #else
577 strlcpy(pcpu->pcpu_name, pic->pic_name, PCPU_NAMELEN);
578 #endif
579 pcpu->pcpu_magic = PICPERCPU_MAGIC;
580 #if 0
581 printf("%s: %s %s: <%s>\n",
582 __func__, ci->ci_data.cpu_name, pic->pic_name,
583 pcpu->pcpu_name);
584 #endif
585 }
586
587 static int
588 pic_init(void)
589 {
590
591 mutex_init(&pic_lock, MUTEX_DEFAULT, IPL_HIGH);
592
593 return 0;
594 }
595
596 int
597 pic_add(struct pic_softc *pic, int irqbase)
598 {
599 int slot, maybe_slot = -1;
600 size_t sourcebase;
601 static ONCE_DECL(pic_once);
602
603 RUN_ONCE(&pic_once, pic_init);
604
605 KASSERT(strlen(pic->pic_name) > 0);
606
607 mutex_enter(&pic_lock);
608 if (irqbase == PIC_IRQBASE_ALLOC) {
609 irqbase = pic_lastbase;
610 }
611 for (slot = 0; slot < PIC_MAXPICS; slot++) {
612 struct pic_softc * const xpic = pic_list[slot];
613 if (xpic == NULL) {
614 if (maybe_slot < 0)
615 maybe_slot = slot;
616 if (irqbase < 0)
617 break;
618 continue;
619 }
620 if (irqbase < 0 || xpic->pic_irqbase < 0)
621 continue;
622 if (irqbase >= xpic->pic_irqbase + xpic->pic_maxsources)
623 continue;
624 if (irqbase + pic->pic_maxsources <= xpic->pic_irqbase)
625 continue;
626 panic("pic_add: pic %s (%zu sources @ irq %u) conflicts"
627 " with pic %s (%zu sources @ irq %u)",
628 pic->pic_name, pic->pic_maxsources, irqbase,
629 xpic->pic_name, xpic->pic_maxsources, xpic->pic_irqbase);
630 }
631 slot = maybe_slot;
632 #if 0
633 printf("%s: pic_sourcebase=%zu pic_maxsources=%zu\n",
634 pic->pic_name, pic_sourcebase, pic->pic_maxsources);
635 #endif
636 KASSERTMSG(pic->pic_maxsources <= PIC_MAXSOURCES, "%zu",
637 pic->pic_maxsources);
638 KASSERT(pic_sourcebase + pic->pic_maxsources <= PIC_MAXMAXSOURCES);
639 sourcebase = pic_sourcebase;
640 pic_sourcebase += pic->pic_maxsources;
641 if (pic_lastbase < irqbase + pic->pic_maxsources)
642 pic_lastbase = irqbase + pic->pic_maxsources;
643 mutex_exit(&pic_lock);
644
645 /*
646 * Allocate a pointer to each cpu's evcnts and then, for each cpu,
647 * allocate its evcnts and then attach an evcnt for each pin.
648 * We can't allocate the evcnt structures directly since
649 * percpu will move the contents of percpu memory around and
650 * corrupt the pointers in the evcnts themselves. Remember, any
651 * problem can be solved with sufficient indirection.
652 */
653 pic->pic_percpu = percpu_create(sizeof(struct pic_percpu),
654 pic_percpu_allocate, NULL, pic);
655
656 pic->pic_sources = &pic_sources[sourcebase];
657 pic->pic_irqbase = irqbase;
658 pic->pic_id = slot;
659 #ifdef __HAVE_PIC_SET_PRIORITY
660 KASSERT((slot == 0) == (pic->pic_ops->pic_set_priority != NULL));
661 #endif
662 #ifdef MULTIPROCESSOR
663 KASSERT((pic->pic_cpus != NULL) == (pic->pic_ops->pic_ipi_send != NULL));
664 #endif
665 pic_list[slot] = pic;
666
667 return irqbase;
668 }
669
670 int
671 pic_alloc_irq(struct pic_softc *pic)
672 {
673 int irq;
674
675 for (irq = 0; irq < pic->pic_maxsources; irq++) {
676 if (pic->pic_sources[irq] == NULL)
677 return irq;
678 }
679
680 return -1;
681 }
682
683 static void
684 pic_percpu_evcnt_attach(void *v0, void *v1, struct cpu_info *ci)
685 {
686 struct pic_percpu * const pcpu = v0;
687 struct intrsource * const is = v1;
688
689 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
690 evcnt_attach_dynamic(&pcpu->pcpu_evs[is->is_irq], EVCNT_TYPE_INTR, NULL,
691 pcpu->pcpu_name, is->is_source);
692 }
693
694 void *
695 pic_establish_intr(struct pic_softc *pic, int irq, int ipl, int type,
696 int (*func)(void *), void *arg, const char *xname)
697 {
698 struct intrsource *is;
699 int off, nipl;
700
701 if (pic->pic_sources[irq]) {
702 printf("pic_establish_intr: pic %s irq %d already present\n",
703 pic->pic_name, irq);
704 return NULL;
705 }
706
707 is = kmem_zalloc(sizeof(*is), KM_SLEEP);
708 is->is_pic = pic;
709 is->is_irq = irq;
710 is->is_ipl = ipl;
711 is->is_type = type & 0xff;
712 is->is_func = func;
713 is->is_arg = arg;
714 #ifdef MULTIPROCESSOR
715 is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;
716 #endif
717
718 if (pic->pic_ops->pic_source_name)
719 (*pic->pic_ops->pic_source_name)(pic, irq, is->is_source,
720 sizeof(is->is_source));
721 else
722 snprintf(is->is_source, sizeof(is->is_source), "irq %d", irq);
723
724 /*
725 * Now attach the per-cpu evcnts.
726 */
727 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_attach, is);
728
729 pic->pic_sources[irq] = is;
730
731 /*
732 * First try to use an existing slot which is empty.
733 */
734 for (off = pic_ipl_offset[ipl]; off < pic_ipl_offset[ipl+1]; off++) {
735 if (pic__iplsources[off] == NULL) {
736 is->is_iplidx = off - pic_ipl_offset[ipl];
737 pic__iplsources[off] = is;
738 goto unblock;
739 }
740 }
741
742 /*
743 * Move up all the sources by one.
744 */
745 if (ipl < NIPL) {
746 off = pic_ipl_offset[ipl+1];
747 memmove(&pic__iplsources[off+1], &pic__iplsources[off],
748 sizeof(pic__iplsources[0]) * (pic_ipl_offset[NIPL] - off));
749 }
750
751 /*
752 * Advance the offset of all IPLs higher than this. Include an
753 * extra one as well. Thus the number of sources per ipl is
754 * pic_ipl_offset[ipl+1] - pic_ipl_offset[ipl].
755 */
756 for (nipl = ipl + 1; nipl <= NIPL; nipl++)
757 pic_ipl_offset[nipl]++;
758
759 /*
760 * Insert into the previously made position at the end of this IPL's
761 * sources.
762 */
763 off = pic_ipl_offset[ipl + 1] - 1;
764 is->is_iplidx = off - pic_ipl_offset[ipl];
765 pic__iplsources[off] = is;
766
767 (*pic->pic_ops->pic_establish_irq)(pic, is);
768
769 unblock:
770 (*pic->pic_ops->pic_unblock_irqs)(pic, is->is_irq & ~0x1f,
771 __BIT(is->is_irq & 0x1f));
772
773 if (xname) {
774 if (is->is_xname == NULL)
775 is->is_xname = kmem_zalloc(INTRDEVNAMEBUF, KM_SLEEP);
776 if (is->is_xname[0] != '\0')
777 strlcat(is->is_xname, ", ", INTRDEVNAMEBUF);
778 strlcat(is->is_xname, xname, INTRDEVNAMEBUF);
779 }
780
781 /* We're done. */
782 return is;
783 }
784
785 static void
786 pic_percpu_evcnt_deattach(void *v0, void *v1, struct cpu_info *ci)
787 {
788 struct pic_percpu * const pcpu = v0;
789 struct intrsource * const is = v1;
790
791 KASSERT(pcpu->pcpu_magic == PICPERCPU_MAGIC);
792 evcnt_detach(&pcpu->pcpu_evs[is->is_irq]);
793 }
794
795 void
796 pic_disestablish_source(struct intrsource *is)
797 {
798 struct pic_softc * const pic = is->is_pic;
799 const int irq = is->is_irq;
800
801 KASSERT(is == pic->pic_sources[irq]);
802
803 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
804 pic->pic_sources[irq] = NULL;
805 pic__iplsources[pic_ipl_offset[is->is_ipl] + is->is_iplidx] = NULL;
806 if (is->is_xname != NULL) {
807 kmem_free(is->is_xname, INTRDEVNAMEBUF);
808 is->is_xname = NULL;
809 }
810 /*
811 * Now detach the per-cpu evcnts.
812 */
813 percpu_foreach(pic->pic_percpu, pic_percpu_evcnt_deattach, is);
814
815 kmem_free(is, sizeof(*is));
816 }
817
818 void *
819 intr_establish(int irq, int ipl, int type, int (*func)(void *), void *arg)
820 {
821 return intr_establish_xname(irq, ipl, type, func, arg, NULL);
822 }
823
824 void *
825 intr_establish_xname(int irq, int ipl, int type, int (*func)(void *), void *arg,
826 const char *xname)
827 {
828 KASSERT(!cpu_intr_p());
829 KASSERT(!cpu_softintr_p());
830
831 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
832 struct pic_softc * const pic = pic_list[slot];
833 if (pic == NULL || pic->pic_irqbase < 0)
834 continue;
835 if (pic->pic_irqbase <= irq
836 && irq < pic->pic_irqbase + pic->pic_maxsources) {
837 return pic_establish_intr(pic, irq - pic->pic_irqbase,
838 ipl, type, func, arg, xname);
839 }
840 }
841
842 return NULL;
843 }
844
845 void
846 intr_disestablish(void *ih)
847 {
848 struct intrsource * const is = ih;
849
850 KASSERT(!cpu_intr_p());
851 KASSERT(!cpu_softintr_p());
852
853 pic_disestablish_source(is);
854 }
855
856 void
857 intr_mask(void *ih)
858 {
859 struct intrsource * const is = ih;
860 struct pic_softc * const pic = is->is_pic;
861 const int irq = is->is_irq;
862
863 if (atomic_inc_32_nv(&is->is_mask_count) == 1)
864 (*pic->pic_ops->pic_block_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
865 }
866
867 void
868 intr_unmask(void *ih)
869 {
870 struct intrsource * const is = ih;
871 struct pic_softc * const pic = is->is_pic;
872 const int irq = is->is_irq;
873
874 if (atomic_dec_32_nv(&is->is_mask_count) == 0)
875 (*pic->pic_ops->pic_unblock_irqs)(pic, irq & ~0x1f, __BIT(irq & 0x1f));
876 }
877
878 const char *
879 intr_string(intr_handle_t irq, char *buf, size_t len)
880 {
881 for (size_t slot = 0; slot < PIC_MAXPICS; slot++) {
882 struct pic_softc * const pic = pic_list[slot];
883 if (pic == NULL || pic->pic_irqbase < 0)
884 continue;
885 if (pic->pic_irqbase <= irq
886 && irq < pic->pic_irqbase + pic->pic_maxsources) {
887 struct intrsource * const is = pic->pic_sources[irq - pic->pic_irqbase];
888 snprintf(buf, len, "%s %s", pic->pic_name, is->is_source);
889 return buf;
890 }
891 }
892
893 return NULL;
894 }
895
896 static struct intrsource *
897 intr_get_source(const char *intrid)
898 {
899 struct intrsource *is;
900 intrid_t buf;
901 size_t slot;
902 int irq;
903
904 KASSERT(mutex_owned(&cpu_lock));
905
906 for (slot = 0; slot < PIC_MAXPICS; slot++) {
907 struct pic_softc * const pic = pic_list[slot];
908 if (pic == NULL || pic->pic_irqbase < 0)
909 continue;
910 for (irq = 0; irq < pic->pic_maxsources; irq++) {
911 is = pic->pic_sources[irq];
912 if (is == NULL || is->is_source[0] == '\0')
913 continue;
914
915 snprintf(buf, sizeof(buf), "%s %s", pic->pic_name, is->is_source);
916 if (strcmp(buf, intrid) == 0)
917 return is;
918 }
919 }
920
921 return NULL;
922 }
923
924 struct intrids_handler *
925 interrupt_construct_intrids(const kcpuset_t *cpuset)
926 {
927 struct intrids_handler *iih;
928 struct intrsource *is;
929 int count, irq, n;
930 size_t slot;
931
932 if (kcpuset_iszero(cpuset))
933 return NULL;
934
935 count = 0;
936 for (slot = 0; slot < PIC_MAXPICS; slot++) {
937 struct pic_softc * const pic = pic_list[slot];
938 if (pic != NULL && pic->pic_irqbase >= 0) {
939 for (irq = 0; irq < pic->pic_maxsources; irq++) {
940 is = pic->pic_sources[irq];
941 if (is && is->is_source[0] != '\0')
942 count++;
943 }
944 }
945 }
946
947 iih = kmem_zalloc(sizeof(int) + sizeof(intrid_t) * count, KM_SLEEP);
948 iih->iih_nids = count;
949
950 for (n = 0, slot = 0; n < count && slot < PIC_MAXPICS; slot++) {
951 struct pic_softc * const pic = pic_list[slot];
952 if (pic == NULL || pic->pic_irqbase < 0)
953 continue;
954 for (irq = 0; irq < pic->pic_maxsources; irq++) {
955 is = pic->pic_sources[irq];
956 if (is == NULL || is->is_source[0] == '\0')
957 continue;
958
959 snprintf(iih->iih_intrids[n++], sizeof(intrid_t), "%s %s",
960 pic->pic_name, is->is_source);
961 }
962 }
963
964 return iih;
965 }
966
967 void
968 interrupt_destruct_intrids(struct intrids_handler *iih)
969 {
970 if (iih == NULL)
971 return;
972
973 kmem_free(iih, sizeof(int) + sizeof(intrid_t) * iih->iih_nids);
974 }
975
976 void
977 interrupt_get_available(kcpuset_t *cpuset)
978 {
979 CPU_INFO_ITERATOR cii;
980 struct cpu_info *ci;
981
982 kcpuset_zero(cpuset);
983
984 mutex_enter(&cpu_lock);
985 for (CPU_INFO_FOREACH(cii, ci)) {
986 if ((ci->ci_schedstate.spc_flags & SPCF_NOINTR) == 0)
987 kcpuset_set(cpuset, cpu_index(ci));
988 }
989 mutex_exit(&cpu_lock);
990 }
991
992 void
993 interrupt_get_devname(const char *intrid, char *buf, size_t len)
994 {
995 struct intrsource *is;
996
997 mutex_enter(&cpu_lock);
998 is = intr_get_source(intrid);
999 if (is == NULL || is->is_xname == NULL)
1000 buf[0] = '\0';
1001 else
1002 strlcpy(buf, is->is_xname, len);
1003 mutex_exit(&cpu_lock);
1004 }
1005
1006 struct interrupt_get_count_arg {
1007 struct intrsource *is;
1008 uint64_t count;
1009 u_int cpu_idx;
1010 };
1011
1012 static void
1013 interrupt_get_count_cb(void *v0, void *v1, struct cpu_info *ci)
1014 {
1015 struct pic_percpu * const pcpu = v0;
1016 struct interrupt_get_count_arg * const arg = v1;
1017
1018 if (arg->cpu_idx != cpu_index(ci))
1019 return;
1020
1021 arg->count = pcpu->pcpu_evs[arg->is->is_irq].ev_count;
1022 }
1023
1024 uint64_t
1025 interrupt_get_count(const char *intrid, u_int cpu_idx)
1026 {
1027 struct interrupt_get_count_arg arg;
1028 struct intrsource *is;
1029 uint64_t count;
1030
1031 count = 0;
1032
1033 mutex_enter(&cpu_lock);
1034 is = intr_get_source(intrid);
1035 if (is != NULL && is->is_pic != NULL) {
1036 arg.is = is;
1037 arg.count = 0;
1038 arg.cpu_idx = cpu_idx;
1039 percpu_foreach(is->is_pic->pic_percpu, interrupt_get_count_cb, &arg);
1040 count = arg.count;
1041 }
1042 mutex_exit(&cpu_lock);
1043
1044 return count;
1045 }
1046
1047 #ifdef MULTIPROCESSOR
1048 void
1049 interrupt_get_assigned(const char *intrid, kcpuset_t *cpuset)
1050 {
1051 struct intrsource *is;
1052 struct pic_softc *pic;
1053
1054 kcpuset_zero(cpuset);
1055
1056 mutex_enter(&cpu_lock);
1057 is = intr_get_source(intrid);
1058 if (is != NULL) {
1059 pic = is->is_pic;
1060 if (pic && pic->pic_ops->pic_get_affinity)
1061 pic->pic_ops->pic_get_affinity(pic, is->is_irq, cpuset);
1062 }
1063 mutex_exit(&cpu_lock);
1064 }
1065
1066 int
1067 interrupt_distribute_handler(const char *intrid, const kcpuset_t *newset,
1068 kcpuset_t *oldset)
1069 {
1070 struct intrsource *is;
1071 int error;
1072
1073 mutex_enter(&cpu_lock);
1074 is = intr_get_source(intrid);
1075 if (is == NULL) {
1076 error = ENOENT;
1077 } else {
1078 error = interrupt_distribute(is, newset, oldset);
1079 }
1080 mutex_exit(&cpu_lock);
1081
1082 return error;
1083 }
1084
1085 int
1086 interrupt_distribute(void *ih, const kcpuset_t *newset, kcpuset_t *oldset)
1087 {
1088 struct intrsource * const is = ih;
1089 struct pic_softc * const pic = is->is_pic;
1090
1091 if (pic == NULL)
1092 return EOPNOTSUPP;
1093 if (pic->pic_ops->pic_set_affinity == NULL ||
1094 pic->pic_ops->pic_get_affinity == NULL)
1095 return EOPNOTSUPP;
1096
1097 if (!is->is_mpsafe)
1098 return EINVAL;
1099
1100 if (oldset != NULL)
1101 pic->pic_ops->pic_get_affinity(pic, is->is_irq, oldset);
1102
1103 return pic->pic_ops->pic_set_affinity(pic, is->is_irq, newset);
1104 }
1105 #endif
1106