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rk_platform.c revision 1.13
      1 /* $NetBSD: rk_platform.c,v 1.13 2021/06/23 00:56:41 mrg Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_soc.h"
     30 #include "opt_multiprocessor.h"
     31 #include "opt_console.h"
     32 
     33 #include <sys/cdefs.h>
     34 __KERNEL_RCSID(0, "$NetBSD: rk_platform.c,v 1.13 2021/06/23 00:56:41 mrg Exp $");
     35 
     36 #include <sys/param.h>
     37 #include <sys/bus.h>
     38 #include <sys/cpu.h>
     39 #include <sys/device.h>
     40 #include <sys/termios.h>
     41 
     42 #include <prop/proplib.h>
     43 
     44 #include <dev/fdt/fdtvar.h>
     45 #include <arm/fdt/arm_fdtvar.h>
     46 
     47 #include <uvm/uvm_extern.h>
     48 
     49 #include <machine/bootconfig.h>
     50 #include <arm/cpufunc.h>
     51 
     52 #include <arm/cortex/gtmr_var.h>
     53 
     54 #include <dev/ic/ns16550reg.h>
     55 #include <dev/ic/comreg.h>
     56 
     57 #include <arm/arm/psci.h>
     58 #include <arm/fdt/psci_fdtvar.h>
     59 
     60 #include <libfdt.h>
     61 
     62 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
     63 extern struct bus_space arm_generic_bs_tag;
     64 
     65 static void
     66 rk_platform_init_attach_args(struct fdt_attach_args *faa)
     67 {
     68 	faa->faa_bst = &arm_generic_bs_tag;
     69 	faa->faa_dmat = &arm_generic_dma_tag;
     70 }
     71 
     72 static void
     73 rk_platform_device_register(device_t self, void *aux)
     74 {
     75 	prop_dictionary_t dict = device_properties(self);
     76 
     77 	if (device_is_a(self, "ahcisata")) {
     78 		/*
     79 		 * Marvel 9230 AHCI SATA controllers take between 1213 and 1216
     80 		 * milliseconds to reset, exceeding the AHCI spec of 1000.
     81 		 */
     82 		if (!prop_dictionary_set_uint32(dict, "ahci-reset-ms", 2000))
     83 			printf("%s: Failed to set \"ahci-reset-ms\" property"
     84 			       " on ahcisata\n", __func__);
     85 	}
     86 }
     87 
     88 static void
     89 rk_platform_bootstrap(void)
     90 {
     91 	void *fdt_data = __UNCONST(fdtbus_get_data());
     92 
     93 	arm_fdt_cpu_bootstrap();
     94 
     95 	const int chosen_off = fdt_path_offset(fdt_data, "/chosen");
     96 	if (chosen_off < 0)
     97 		return;
     98 
     99 	if (match_bootconf_option(boot_args, "console", "fb")) {
    100 		const int framebuffer_off =
    101 		    fdt_path_offset(fdt_data, "/chosen/framebuffer");
    102 		if (framebuffer_off >= 0) {
    103 			const char *status = fdt_getprop(fdt_data,
    104 			    framebuffer_off, "status", NULL);
    105 			if (status == NULL || strncmp(status, "ok", 2) == 0) {
    106 				fdt_setprop_string(fdt_data, chosen_off,
    107 				    "stdout-path", "/chosen/framebuffer");
    108 			}
    109 		}
    110 	} else if (match_bootconf_option(boot_args, "console", "serial")) {
    111 		fdt_setprop_string(fdt_data, chosen_off,
    112 		    "stdout-path", "serial0:115200n8");
    113 	}
    114 }
    115 
    116 #ifdef SOC_RK3328
    117 
    118 #include <arm/rockchip/rk3328_platform.h>
    119 
    120 static const struct pmap_devmap *
    121 rk3328_platform_devmap(void)
    122 {
    123 	static const struct pmap_devmap devmap[] = {
    124 		DEVMAP_ENTRY(RK3328_CORE_VBASE,
    125 			     RK3328_CORE_PBASE,
    126 			     RK3328_CORE_SIZE),
    127 		DEVMAP_ENTRY_END
    128 	};
    129 
    130 	return devmap;
    131 }
    132 
    133 void rk3328_platform_early_putchar(char);
    134 
    135 void __noasan
    136 rk3328_platform_early_putchar(char c)
    137 {
    138 #ifdef CONSADDR
    139 #define CONSADDR_VA	((CONSADDR - RK3328_CORE_PBASE) + RK3328_CORE_VBASE)
    140 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    141 	    (volatile uint32_t *)CONSADDR_VA :
    142 	    (volatile uint32_t *)CONSADDR;
    143 
    144 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
    145 		;
    146 
    147 	uartaddr[com_data] = htole32(c);
    148 #undef CONSADDR_VA
    149 #endif
    150 }
    151 
    152 static u_int
    153 rk3328_platform_uart_freq(void)
    154 {
    155 	return RK3328_UART_FREQ;
    156 }
    157 
    158 static const struct arm_platform rk3328_platform = {
    159 	.ap_devmap = rk3328_platform_devmap,
    160 	.ap_bootstrap = rk_platform_bootstrap,
    161 	.ap_init_attach_args = rk_platform_init_attach_args,
    162 	.ap_device_register = rk_platform_device_register,
    163 	.ap_reset = psci_fdt_reset,
    164 	.ap_delay = gtmr_delay,
    165 	.ap_uart_freq = rk3328_platform_uart_freq,
    166 	.ap_mpstart = arm_fdt_cpu_mpstart,
    167 };
    168 
    169 ARM_PLATFORM(rk3328, "rockchip,rk3328", &rk3328_platform);
    170 
    171 #endif /* SOC_RK3328 */
    172 
    173 
    174 #ifdef SOC_RK3399
    175 
    176 #include <arm/rockchip/rk3399_platform.h>
    177 
    178 static const struct pmap_devmap *
    179 rk3399_platform_devmap(void)
    180 {
    181 	static const struct pmap_devmap devmap[] = {
    182 		DEVMAP_ENTRY(RK3399_CORE_VBASE,
    183 			     RK3399_CORE_PBASE,
    184 			     RK3399_CORE_SIZE),
    185 		DEVMAP_ENTRY_END
    186 	};
    187 
    188 	return devmap;
    189 }
    190 
    191 void rk3399_platform_early_putchar(char);
    192 
    193 void
    194 rk3399_platform_early_putchar(char c)
    195 {
    196 #ifdef CONSADDR
    197 #define CONSADDR_VA	((CONSADDR - RK3399_CORE_PBASE) + RK3399_CORE_VBASE)
    198 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    199 	    (volatile uint32_t *)CONSADDR_VA :
    200 	    (volatile uint32_t *)CONSADDR;
    201 
    202 	while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0)
    203 		;
    204 
    205 	uartaddr[com_data] = htole32(c);
    206 #undef CONSADDR_VA
    207 #endif
    208 }
    209 
    210 static u_int
    211 rk3399_platform_uart_freq(void)
    212 {
    213 	return RK3399_UART_FREQ;
    214 }
    215 
    216 static const struct arm_platform rk3399_platform = {
    217 	.ap_devmap = rk3399_platform_devmap,
    218 	.ap_bootstrap = rk_platform_bootstrap,
    219 	.ap_init_attach_args = rk_platform_init_attach_args,
    220 	.ap_device_register = rk_platform_device_register,
    221 	.ap_reset = psci_fdt_reset,
    222 	.ap_delay = gtmr_delay,
    223 	.ap_uart_freq = rk3399_platform_uart_freq,
    224 	.ap_mpstart = arm_fdt_cpu_mpstart,
    225 };
    226 
    227 ARM_PLATFORM(rk3399, "rockchip,rk3399", &rk3399_platform);
    228 
    229 #endif /* SOC_RK3399 */
    230