1 /* $NetBSD: s3c2410_spi.c,v 1.10 2025/02/21 20:31:16 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Support S3C2410's SPI driver. 34 * Real works are done by drivers attached to SPI ports. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: s3c2410_spi.c,v 1.10 2025/02/21 20:31:16 andvar Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/conf.h> 43 44 #include <sys/bus.h> 45 #include <machine/cpu.h> 46 47 #include <arm/s3c2xx0/s3c24x0var.h> 48 #include <arm/s3c2xx0/s3c24x0reg.h> 49 #include <arm/s3c2xx0/s3c2410reg.h> 50 51 #include <arm/s3c2xx0/s3c24x0_spi.h> 52 53 #include "locators.h" 54 55 struct ssspi_softc { 56 bus_space_tag_t iot; 57 bus_space_handle_t ioh; 58 short index; 59 }; 60 61 62 /* prototypes */ 63 static int ssspi_match(device_t, cfdata_t, void *); 64 static void ssspi_attach(device_t, device_t, void *); 65 static int ssspi_search(device_t, cfdata_t, const int *, void *); 66 static int ssspi_print(void *, const char *); 67 68 /* attach structures */ 69 CFATTACH_DECL_NEW(ssspi, sizeof(struct ssspi_softc), ssspi_match, ssspi_attach, 70 NULL, NULL); 71 72 73 static int 74 ssspi_print(void *aux, const char *name) 75 { 76 struct ssspi_attach_args *spia = aux; 77 78 if (spia->spia_aux_intr != SSSPICF_INTR_DEFAULT) 79 printf(" intr %d", spia->spia_aux_intr); 80 return (UNCONF); 81 } 82 83 int 84 ssspi_match(device_t parent, cfdata_t match, void *aux) 85 { 86 struct s3c2xx0_attach_args *sa = aux; 87 88 /* S3C2410 have only two SPIs */ 89 switch (sa->sa_index) { 90 case 0: 91 case 1: 92 break; 93 default: 94 return 0; 95 } 96 97 return 1; 98 } 99 100 void 101 ssspi_attach(device_t parent, device_t self, void *aux) 102 { 103 struct ssspi_softc *sc = device_private(self); 104 struct s3c2xx0_attach_args *sa = aux; 105 bus_space_tag_t iot = sa->sa_iot; 106 107 static bus_space_handle_t spi_ioh = 0; 108 109 /* we map all registers for SPI0 and SPI1 at once, then 110 use subregions */ 111 if (spi_ioh == 0) { 112 if (bus_space_map(iot, S3C2410_SPI0_BASE, 113 2 * S3C24X0_SPI_SIZE, 114 0, &spi_ioh)) { 115 aprint_error(": can't map registers\n"); 116 return; 117 } 118 } 119 120 aprint_normal("\n"); 121 122 sc->index = sa->sa_index; 123 sc->iot = iot; 124 125 bus_space_subregion(iot, spi_ioh, sc->index == 0 ? 0 : S3C24X0_SPI_SIZE, 126 S3C24X0_SPI_SIZE, &sc->ioh); 127 128 /* 129 * Attach child devices 130 */ 131 config_search(self, NULL, 132 CFARGS(.search = ssspi_search)); 133 } 134 135 int 136 ssspi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 137 { 138 struct ssspi_softc *sc = device_private(parent); 139 struct ssspi_attach_args spia; 140 static const unsigned char intr[] = { S3C24X0_INT_SPI0, 141 S3C2410_INT_SPI1 }; 142 143 KASSERT(sc->index == 0 || sc->index == 1); 144 145 spia.spia_iot = sc->iot; 146 spia.spia_ioh = sc->ioh; 147 spia.spia_gpioh = s3c2xx0_softc->sc_gpio_ioh; 148 spia.spia_index = sc->index; 149 spia.spia_intr = intr[sc->index]; 150 spia.spia_aux_intr = cf->cf_loc[SSSPICF_INTR]; 151 spia.spia_dmat = s3c2xx0_softc->sc_dmat; 152 153 if (config_probe(parent, cf, &spia)) 154 config_attach(parent, cf, &spia, ssspi_print, CFARGS_NONE); 155 156 return 0; 157 } 158 159 /* 160 * Intiialze SPI port. called by child devices. 161 */ 162 int 163 s3c24x0_spi_setup(struct ssspi_softc *sc, uint32_t mode, int bps, int use_ss) 164 { 165 int pclk = s3c2xx0_softc->sc_pclk; 166 int prescaler; 167 uint32_t pgcon, pecon; 168 bus_space_handle_t gpioh = s3c2xx0_softc->sc_gpio_ioh; 169 bus_space_tag_t iot = sc->iot; 170 171 if (bps > 1) { 172 prescaler = pclk / 2 / bps - 1; 173 174 if (prescaler <= 0 || 0xff < prescaler) 175 return -1; 176 bus_space_write_1(sc->iot, sc->ioh, SPI_SPPRE, prescaler); 177 } 178 179 180 if (sc->index == 0) { 181 pecon = bus_space_read_4(iot, gpioh, GPIO_PECON); 182 183 if (use_ss) { 184 pgcon = bus_space_read_4(iot, gpioh, GPIO_PGCON); 185 pgcon = GPIO_SET_FUNC(pgcon, 2, PCON_ALTFUN2); 186 bus_space_write_4(iot, gpioh, GPIO_PGCON, pgcon); 187 } 188 189 pecon = GPIO_SET_FUNC(pecon, 11, PCON_ALTFUN2); /* SPIMISO0 */ 190 pecon = GPIO_SET_FUNC(pecon, 12, PCON_ALTFUN2); /* SPIMOSI0 */ 191 pecon = GPIO_SET_FUNC(pecon, 13, PCON_ALTFUN2); /* SPICL0 */ 192 193 bus_space_write_4(iot, gpioh, GPIO_PECON, pecon); 194 } 195 else { 196 pgcon = bus_space_read_4(iot, gpioh, GPIO_PGCON); 197 198 if (use_ss) 199 pgcon = GPIO_SET_FUNC(pgcon, 3, PCON_ALTFUN2); 200 201 pgcon = GPIO_SET_FUNC(pgcon, 5, PCON_ALTFUN2); /* SPIMISO1 */ 202 pgcon = GPIO_SET_FUNC(pgcon, 6, PCON_ALTFUN2); /* SPIMOSI1 */ 203 pgcon = GPIO_SET_FUNC(pgcon, 7, PCON_ALTFUN2); /* SPICLK1 */ 204 205 bus_space_write_4(iot, gpioh, GPIO_PGCON, pgcon); 206 } 207 208 bus_space_write_4(iot, sc->ioh, SPI_SPCON, mode); 209 210 return 0; 211 } 212
Indexes created Sat Sep 20 22:09:52 GMT 2025