s3c2800_intr.c revision 1.1.2.3
1 1.1.2.3 thorpej /* $NetBSD: s3c2800_intr.c,v 1.1.2.3 2003/01/03 16:41:10 thorpej Exp $ */ 2 1.1.2.2 thorpej 3 1.1.2.2 thorpej /* 4 1.1.2.2 thorpej * Copyright (c) 2002 Fujitsu Component Limited 5 1.1.2.2 thorpej * Copyright (c) 2002 Genetec Corporation 6 1.1.2.2 thorpej * All rights reserved. 7 1.1.2.2 thorpej * 8 1.1.2.2 thorpej * Redistribution and use in source and binary forms, with or without 9 1.1.2.2 thorpej * modification, are permitted provided that the following conditions 10 1.1.2.2 thorpej * are met: 11 1.1.2.2 thorpej * 1. Redistributions of source code must retain the above copyright 12 1.1.2.2 thorpej * notice, this list of conditions and the following disclaimer. 13 1.1.2.2 thorpej * 2. Redistributions in binary form must reproduce the above copyright 14 1.1.2.2 thorpej * notice, this list of conditions and the following disclaimer in the 15 1.1.2.2 thorpej * documentation and/or other materials provided with the distribution. 16 1.1.2.2 thorpej * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 1.1.2.2 thorpej * Genetec corporation may not be used to endorse or promote products 18 1.1.2.2 thorpej * derived from this software without specific prior written permission. 19 1.1.2.2 thorpej * 20 1.1.2.2 thorpej * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 1.1.2.2 thorpej * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 1.1.2.2 thorpej * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 1.1.2.2 thorpej * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 1.1.2.2 thorpej * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 1.1.2.2 thorpej * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 1.1.2.2 thorpej * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 1.1.2.2 thorpej * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 1.1.2.2 thorpej * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 1.1.2.2 thorpej * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 1.1.2.2 thorpej * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 1.1.2.2 thorpej * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 1.1.2.2 thorpej * SUCH DAMAGE. 33 1.1.2.2 thorpej */ 34 1.1.2.2 thorpej 35 1.1.2.2 thorpej /* 36 1.1.2.2 thorpej * IRQ handler for Samsung S3C2800 processor. 37 1.1.2.2 thorpej * It has integrated interrupt controller. 38 1.1.2.2 thorpej */ 39 1.1.2.2 thorpej #include <sys/param.h> 40 1.1.2.2 thorpej #include <sys/systm.h> 41 1.1.2.2 thorpej #include <sys/malloc.h> 42 1.1.2.2 thorpej #include <uvm/uvm_extern.h> 43 1.1.2.2 thorpej #include <machine/bus.h> 44 1.1.2.2 thorpej #include <machine/intr.h> 45 1.1.2.2 thorpej #include <arm/cpufunc.h> 46 1.1.2.2 thorpej 47 1.1.2.2 thorpej #include <arm/s3c2xx0/s3c2800reg.h> 48 1.1.2.2 thorpej #include <arm/s3c2xx0/s3c2800var.h> 49 1.1.2.2 thorpej 50 1.1.2.2 thorpej /* 51 1.1.2.2 thorpej * interrupt dispatch table. 52 1.1.2.2 thorpej */ 53 1.1.2.2 thorpej 54 1.1.2.2 thorpej struct s3c2xx0_intr_dispatch handler[ICU_LEN]; 55 1.1.2.2 thorpej 56 1.1.2.2 thorpej __volatile int softint_pending; 57 1.1.2.2 thorpej 58 1.1.2.2 thorpej __volatile int current_spl_level; 59 1.1.2.2 thorpej __volatile int intr_mask; 60 1.1.2.2 thorpej 61 1.1.2.2 thorpej /* interrupt masks for each level */ 62 1.1.2.2 thorpej int s3c2xx0_imask[NIPL]; 63 1.1.2.2 thorpej int s3c2xx0_ilevel[ICU_LEN]; 64 1.1.2.2 thorpej 65 1.1.2.2 thorpej vaddr_t intctl_base; /* interrupt controller registers */ 66 1.1.2.2 thorpej #define icreg(offset) \ 67 1.1.2.2 thorpej (*(volatile uint32_t *)(intctl_base+(offset))) 68 1.1.2.2 thorpej 69 1.1.2.2 thorpej /* 70 1.1.2.2 thorpej * Map a software interrupt queue to an interrupt priority level. 71 1.1.2.2 thorpej */ 72 1.1.2.2 thorpej static const int si_to_ipl[SI_NQUEUES] = { 73 1.1.2.2 thorpej IPL_SOFT, /* SI_SOFT */ 74 1.1.2.2 thorpej IPL_SOFTCLOCK, /* SI_SOFTCLOCK */ 75 1.1.2.2 thorpej IPL_SOFTNET, /* SI_SOFTNET */ 76 1.1.2.2 thorpej IPL_SOFTSERIAL, /* SI_SOFTSERIAL */ 77 1.1.2.2 thorpej }; 78 1.1.2.2 thorpej /* 79 1.1.2.2 thorpej * called from irq_entry. 80 1.1.2.2 thorpej */ 81 1.1.2.2 thorpej void s3c2800_irq_handler(struct clockframe *); 82 1.1.2.2 thorpej void 83 1.1.2.2 thorpej s3c2800_irq_handler(struct clockframe *frame) 84 1.1.2.2 thorpej { 85 1.1.2.2 thorpej uint32_t irqbits; 86 1.1.2.2 thorpej int irqno; 87 1.1.2.2 thorpej int saved_spl_level; 88 1.1.2.2 thorpej 89 1.1.2.2 thorpej saved_spl_level = current_spl_level; 90 1.1.2.2 thorpej 91 1.1.2.2 thorpej /* get pending IRQs */ 92 1.1.2.2 thorpej irqbits = icreg(INTCTL_IRQPND) & ICU_INT_HWMASK; 93 1.1.2.2 thorpej 94 1.1.2.2 thorpej for (irqno = 0; irqbits; ++irqno) { 95 1.1.2.2 thorpej if ((irqbits & (1 << irqno)) == 0) 96 1.1.2.2 thorpej continue; 97 1.1.2.2 thorpej /* raise spl to stop interrupts of lower priorities */ 98 1.1.2.2 thorpej if (saved_spl_level < handler[irqno].level) 99 1.1.2.2 thorpej s3c2xx0_setipl(handler[irqno].level); 100 1.1.2.2 thorpej 101 1.1.2.2 thorpej /* clear pending bit */ 102 1.1.2.2 thorpej icreg(INTCTL_SRCPND) = 1 << irqno; 103 1.1.2.2 thorpej #ifdef notyet 104 1.1.2.2 thorpej /* Enable interrupt */ 105 1.1.2.2 thorpej #endif 106 1.1.2.2 thorpej (*handler[irqno].func) ( 107 1.1.2.2 thorpej handler[irqno].cookie == 0 108 1.1.2.2 thorpej ? frame : handler[irqno].cookie); 109 1.1.2.2 thorpej #ifdef notyet 110 1.1.2.2 thorpej /* Disable interrupt */ 111 1.1.2.2 thorpej #endif 112 1.1.2.2 thorpej 113 1.1.2.2 thorpej irqbits &= ~(1 << irqno); 114 1.1.2.2 thorpej } 115 1.1.2.2 thorpej 116 1.1.2.2 thorpej /* restore spl to that was when this interrupt happen */ 117 1.1.2.2 thorpej s3c2xx0_setipl(saved_spl_level); 118 1.1.2.2 thorpej 119 1.1.2.2 thorpej if (softint_pending & intr_mask) 120 1.1.2.2 thorpej s3c2xx0_do_pending(); 121 1.1.2.2 thorpej } 122 1.1.2.2 thorpej 123 1.1.2.2 thorpej 124 1.1.2.2 thorpej void * 125 1.1.2.2 thorpej s3c2800_intr_establish(int irqno, int level, 126 1.1.2.2 thorpej int (* func) (void *), void *cookie) 127 1.1.2.2 thorpej { 128 1.1.2.2 thorpej int save; 129 1.1.2.2 thorpej 130 1.1.2.2 thorpej if (irqno < 0 || irqno >= ICU_LEN) 131 1.1.2.2 thorpej panic("intr_establish: bogus irq or type"); 132 1.1.2.2 thorpej 133 1.1.2.2 thorpej save = disable_interrupts(I32_bit); 134 1.1.2.2 thorpej 135 1.1.2.2 thorpej handler[irqno].cookie = cookie; 136 1.1.2.2 thorpej handler[irqno].func = func; 137 1.1.2.2 thorpej handler[irqno].level = level; 138 1.1.2.2 thorpej 139 1.1.2.2 thorpej s3c2xx0_update_intr_masks(irqno, level); 140 1.1.2.2 thorpej 141 1.1.2.2 thorpej intr_mask = s3c2xx0_imask[current_spl_level]; 142 1.1.2.2 thorpej *s3c2xx0_intr_mask_reg = intr_mask; 143 1.1.2.2 thorpej 144 1.1.2.2 thorpej restore_interrupts(save); 145 1.1.2.2 thorpej 146 1.1.2.2 thorpej return (&handler[irqno]); 147 1.1.2.2 thorpej } 148 1.1.2.2 thorpej 149 1.1.2.2 thorpej 150 1.1.2.2 thorpej void 151 1.1.2.2 thorpej s3c2800_intr_init(struct s3c2800_softc *sc) 152 1.1.2.2 thorpej { 153 1.1.2.2 thorpej intctl_base = (vaddr_t) bus_space_vaddr(sc->sc_sx.sc_iot, 154 1.1.2.2 thorpej sc->sc_sx.sc_intctl_ioh); 155 1.1.2.2 thorpej 156 1.1.2.2 thorpej s3c2xx0_intr_mask_reg = (uint32_t *)(intctl_base + INTCTL_INTMSK); 157 1.1.2.2 thorpej 158 1.1.2.2 thorpej /* clear all pending interrupt */ 159 1.1.2.2 thorpej icreg(INTCTL_SRCPND) = 0xffffffff; 160 1.1.2.2 thorpej 161 1.1.2.2 thorpej s3c2xx0_intr_init(handler, ICU_LEN); 162 1.1.2.2 thorpej } 163
Indexes created Tue Oct 21 12:09:54 GMT 2025