1 1.28 thorpej /* $NetBSD: sa1111.c,v 1.28 2021/08/07 16:18:45 thorpej Exp $ */ 2 1.1 rjs 3 1.1 rjs /*- 4 1.1 rjs * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.1 rjs * All rights reserved. 6 1.1 rjs * 7 1.1 rjs * This code is derived from software contributed to The NetBSD Foundation 8 1.1 rjs * by IWAMOTO Toshihiro. 9 1.1 rjs * 10 1.1 rjs * Redistribution and use in source and binary forms, with or without 11 1.1 rjs * modification, are permitted provided that the following conditions 12 1.1 rjs * are met: 13 1.1 rjs * 1. Redistributions of source code must retain the above copyright 14 1.1 rjs * notice, this list of conditions and the following disclaimer. 15 1.1 rjs * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 rjs * notice, this list of conditions and the following disclaimer in the 17 1.1 rjs * documentation and/or other materials provided with the distribution. 18 1.1 rjs * 19 1.1 rjs * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 rjs * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 rjs * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 rjs * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 rjs * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 rjs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 rjs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 rjs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 rjs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 rjs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 rjs * POSSIBILITY OF SUCH DAMAGE. 30 1.1 rjs */ 31 1.1 rjs 32 1.1 rjs /* 33 1.1 rjs * TODO: 34 1.18 peter * - introduce bus abstraction to support SA-1101 35 1.1 rjs */ 36 1.10 lukem 37 1.10 lukem #include <sys/cdefs.h> 38 1.28 thorpej __KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.28 2021/08/07 16:18:45 thorpej Exp $"); 39 1.1 rjs 40 1.1 rjs #include <sys/param.h> 41 1.1 rjs #include <sys/systm.h> 42 1.1 rjs #include <sys/types.h> 43 1.1 rjs #include <sys/conf.h> 44 1.1 rjs #include <sys/device.h> 45 1.1 rjs #include <sys/kernel.h> 46 1.26 thorpej #include <sys/kmem.h> 47 1.1 rjs #include <sys/uio.h> 48 1.1 rjs 49 1.24 dyoung #include <sys/bus.h> 50 1.19 ad #include <machine/intr.h> 51 1.1 rjs 52 1.1 rjs #include <arm/sa11x0/sa11x0_reg.h> 53 1.1 rjs #include <arm/sa11x0/sa11x0_var.h> 54 1.1 rjs #include <arm/sa11x0/sa11x0_gpioreg.h> 55 1.1 rjs #include <arm/sa11x0/sa1111_reg.h> 56 1.1 rjs #include <arm/sa11x0/sa1111_var.h> 57 1.1 rjs 58 1.11 bsh #include "locators.h" 59 1.11 bsh 60 1.18 peter static int sa1111_print(void *, const char *); 61 1.1 rjs 62 1.1 rjs static void sacc_intr_calculatemasks(struct sacc_softc *); 63 1.1 rjs static void sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int); 64 1.1 rjs 65 1.1 rjs #ifdef INTR_DEBUG 66 1.1 rjs #define DPRINTF(arg) printf arg 67 1.1 rjs #else 68 1.1 rjs #define DPRINTF(arg) 69 1.1 rjs #endif 70 1.1 rjs 71 1.11 bsh int 72 1.23 rjs sacc_probe(device_t parent, cfdata_t match, void *aux) 73 1.1 rjs { 74 1.2 rjs struct sa11x0_attach_args *sa = aux; 75 1.2 rjs bus_space_handle_t ioh; 76 1.17 peter uint32_t skid; 77 1.2 rjs 78 1.2 rjs if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh)) 79 1.18 peter return 0; 80 1.2 rjs 81 1.2 rjs skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID); 82 1.2 rjs bus_space_unmap(sa->sa_iot, ioh, sa->sa_size); 83 1.2 rjs 84 1.2 rjs if ((skid & 0xffffff00) != 0x690cc200) 85 1.18 peter return 0; 86 1.2 rjs 87 1.18 peter return 1; 88 1.1 rjs } 89 1.1 rjs 90 1.11 bsh 91 1.11 bsh int 92 1.23 rjs sa1111_search(device_t parent, cfdata_t cf, const int *ldesc, 93 1.16 peter void *aux) 94 1.1 rjs { 95 1.11 bsh struct sa1111_attach_args aa; 96 1.2 rjs 97 1.11 bsh aa.sa_addr = cf->cf_loc[SACCCF_ADDR]; 98 1.11 bsh aa.sa_size = cf->cf_loc[SACCCF_SIZE]; 99 1.11 bsh aa.sa_intr = cf->cf_loc[SACCCF_INTR]; 100 1.11 bsh #if 0 101 1.11 bsh aa.sa_membase = cf->cf_loc[SACCCF_MEMBASE]; 102 1.11 bsh aa.sa_memsize = cf->cf_loc[SACCCF_MEMSIZE]; 103 1.1 rjs #endif 104 1.1 rjs 105 1.27 thorpej if (config_probe(parent, cf, &aa)) 106 1.28 thorpej config_attach(parent, cf, &aa, sa1111_print, CFARGS_NONE); 107 1.1 rjs 108 1.1 rjs return 0; 109 1.1 rjs } 110 1.1 rjs 111 1.1 rjs static int 112 1.16 peter sa1111_print(void *aux, const char *name) 113 1.1 rjs { 114 1.18 peter 115 1.18 peter return UNCONF; 116 1.1 rjs } 117 1.1 rjs 118 1.1 rjs 119 1.1 rjs void * 120 1.16 peter sacc_intr_establish(sacc_chipset_tag_t *ic, int irq, int type, int level, 121 1.16 peter int (*ih_fun)(void *), void *ih_arg) 122 1.1 rjs { 123 1.1 rjs int s; 124 1.1 rjs struct sacc_softc *sc = (struct sacc_softc *)ic; 125 1.1 rjs struct sacc_intrhand **p, *ih; 126 1.1 rjs 127 1.26 thorpej ih = kmem_alloc(sizeof *ih, KM_SLEEP); 128 1.1 rjs 129 1.1 rjs if (irq < 0 || irq > SACCIC_LEN || 130 1.18 peter !(type == IST_EDGE_RAISE || type == IST_EDGE_FALL)) 131 1.1 rjs panic("sacc_intr_establish: bogus irq or type"); 132 1.1 rjs 133 1.1 rjs if (sc->sc_intrhand[irq] == NULL) { 134 1.1 rjs sacc_intr_setpolarity(ic, irq, type); 135 1.1 rjs sc->sc_intrtype[irq] = type; 136 1.1 rjs } else if (sc->sc_intrtype[irq] != type) 137 1.1 rjs /* XXX we should be able to share raising and 138 1.1 rjs * falling edge intrs */ 139 1.7 provos panic("sacc_intr_establish: type must be unique"); 140 1.1 rjs 141 1.1 rjs /* install intr handler */ 142 1.11 bsh /* map interrupt level to appropriate softinterrupt level */ 143 1.21 matt level = SOFTINT_SERIAL; 144 1.21 matt ih->ih_soft = softint_establish(level, (void (*)(void *)) ih_fun, 145 1.1 rjs ih_arg); 146 1.1 rjs ih->ih_irq = irq; 147 1.1 rjs ih->ih_next = NULL; 148 1.1 rjs 149 1.1 rjs s = splhigh(); 150 1.18 peter for (p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next) 151 1.18 peter continue; 152 1.1 rjs 153 1.1 rjs *p = ih; 154 1.1 rjs 155 1.1 rjs sacc_intr_calculatemasks(sc); 156 1.1 rjs splx(s); 157 1.1 rjs 158 1.18 peter return ih; 159 1.1 rjs } 160 1.1 rjs 161 1.1 rjs void 162 1.16 peter sacc_intr_disestablish(sacc_chipset_tag_t *ic, void *arg) 163 1.1 rjs { 164 1.1 rjs int irq, s; 165 1.1 rjs struct sacc_softc *sc = (struct sacc_softc *)ic; 166 1.1 rjs struct sacc_intrhand *ih, **p; 167 1.1 rjs 168 1.1 rjs ih = (struct sacc_intrhand *)arg; 169 1.1 rjs irq = ih->ih_irq; 170 1.1 rjs 171 1.1 rjs #ifdef DIAGNOSTIC 172 1.1 rjs if (irq < 0 || irq > SACCIC_LEN) 173 1.1 rjs panic("sacc_intr_disestablish: bogus irq"); 174 1.1 rjs #endif 175 1.1 rjs 176 1.1 rjs s = splhigh(); 177 1.1 rjs 178 1.18 peter for (p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) { 179 1.1 rjs if (*p == NULL) 180 1.1 rjs panic("sacc_intr_disestablish: handler not registered"); 181 1.1 rjs if (*p == ih) 182 1.1 rjs break; 183 1.1 rjs } 184 1.1 rjs *p = (*p)->ih_next; 185 1.1 rjs 186 1.1 rjs sacc_intr_calculatemasks(sc); 187 1.1 rjs splx(s); 188 1.1 rjs 189 1.26 thorpej kmem_free(ih, sizeof(*ih)); 190 1.1 rjs } 191 1.1 rjs 192 1.18 peter static void 193 1.16 peter sacc_intr_setpolarity(sacc_chipset_tag_t *ic, int irq, int type) 194 1.1 rjs { 195 1.1 rjs struct sacc_softc *sc = (struct sacc_softc *)ic; 196 1.1 rjs int s; 197 1.17 peter uint32_t pol, mask; 198 1.1 rjs int addr; 199 1.1 rjs 200 1.1 rjs if (irq >= 32) { 201 1.1 rjs addr = SACCIC_INTPOL1; 202 1.1 rjs irq -= 32; 203 1.1 rjs } else 204 1.1 rjs addr = SACCIC_INTPOL0; 205 1.1 rjs 206 1.1 rjs mask = (1 << irq); 207 1.1 rjs 208 1.1 rjs s = splhigh(); 209 1.1 rjs pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 210 1.1 rjs if (type == IST_EDGE_RAISE) 211 1.1 rjs pol &= ~mask; 212 1.1 rjs else 213 1.1 rjs pol |= mask; 214 1.1 rjs bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol); 215 1.1 rjs splx(s); 216 1.1 rjs } 217 1.1 rjs 218 1.18 peter static void 219 1.16 peter sacc_intr_calculatemasks(struct sacc_softc *sc) 220 1.1 rjs { 221 1.1 rjs int irq; 222 1.1 rjs 223 1.1 rjs sc->sc_imask.lo = 0; 224 1.1 rjs sc->sc_imask.hi = 0; 225 1.18 peter for (irq = 0; irq < 32; irq++) 226 1.1 rjs if (sc->sc_intrhand[irq]) 227 1.1 rjs sc->sc_imask.lo |= (1 << irq); 228 1.18 peter for (irq = 0; irq < SACCIC_LEN - 32; irq++) 229 1.1 rjs if (sc->sc_intrhand[irq + 32]) 230 1.1 rjs sc->sc_imask.hi |= (1 << irq); 231 1.1 rjs 232 1.1 rjs 233 1.1 rjs /* XXX this should not be done here */ 234 1.1 rjs bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 235 1.1 rjs sc->sc_imask.lo); 236 1.1 rjs bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 237 1.1 rjs sc->sc_imask.hi); 238 1.1 rjs DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo, 239 1.1 rjs sc->sc_imask.hi)); 240 1.1 rjs } 241