sa1111.c revision 1.11
1 /* $NetBSD: sa1111.c,v 1.11 2003/08/08 12:29:23 bsh Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by IWAMOTO Toshihiro. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * TODO: 41 * - introduce bus abstraction to support SA1101 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.11 2003/08/08 12:29:23 bsh Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/types.h> 50 #include <sys/conf.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/uio.h> 55 56 #include <machine/bus.h> 57 #ifdef hpcarm 58 #include <machine/platid.h> 59 #include <machine/platid_mask.h> 60 #endif 61 62 #include <arm/sa11x0/sa11x0_reg.h> 63 #include <arm/sa11x0/sa11x0_var.h> 64 #include <arm/sa11x0/sa11x0_gpioreg.h> 65 #include <arm/sa11x0/sa1111_reg.h> 66 #include <arm/sa11x0/sa1111_var.h> 67 68 #include "locators.h" 69 70 static int sa1111_print(void *, const char *); 71 72 static void sacc_intr_calculatemasks(struct sacc_softc *); 73 static void sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int); 74 int sacc_intr(void *); 75 76 #if !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 77 void *softintr_establish(int, int (*)(void *), void *); 78 void softintr_schedule(void *); 79 #endif 80 81 #ifdef INTR_DEBUG 82 #define DPRINTF(arg) printf arg 83 #else 84 #define DPRINTF(arg) 85 #endif 86 87 int 88 sacc_probe(parent, match, aux) 89 struct device *parent; 90 struct cfdata *match; 91 void *aux; 92 { 93 struct sa11x0_attach_args *sa = aux; 94 bus_space_handle_t ioh; 95 u_int32_t skid; 96 97 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh)) 98 return (0); 99 100 skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID); 101 bus_space_unmap(sa->sa_iot, ioh, sa->sa_size); 102 103 if ((skid & 0xffffff00) != 0x690cc200) 104 return (0); 105 106 return (1); 107 } 108 109 110 int 111 sa1111_search(parent, cf, aux) 112 struct device *parent; 113 struct cfdata *cf; 114 void *aux; 115 { 116 struct sa1111_attach_args aa; 117 118 aa.sa_addr = cf->cf_loc[SACCCF_ADDR]; 119 aa.sa_size = cf->cf_loc[SACCCF_SIZE]; 120 aa.sa_intr = cf->cf_loc[SACCCF_INTR]; 121 #if 0 122 aa.sa_membase = cf->cf_loc[SACCCF_MEMBASE]; 123 aa.sa_memsize = cf->cf_loc[SACCCF_MEMSIZE]; 124 #endif 125 126 if (config_match(parent, cf, &aa) > 0) 127 config_attach(parent, cf, &aa, sa1111_print); 128 129 return 0; 130 } 131 132 static int 133 sa1111_print(aux, name) 134 void *aux; 135 const char *name; 136 { 137 return (UNCONF); 138 } 139 140 141 void * 142 sacc_intr_establish(ic, irq, type, level, ih_fun, ih_arg) 143 sacc_chipset_tag_t *ic; 144 int irq, type, level; 145 int (*ih_fun)(void *); 146 void *ih_arg; 147 { 148 int s; 149 struct sacc_softc *sc = (struct sacc_softc *)ic; 150 struct sacc_intrhand **p, *ih; 151 152 /* no point in sleeping unless someone can free memory. */ 153 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 154 if (ih == NULL) 155 panic("sacc_intr_establish: can't malloc handler info"); 156 157 if (irq < 0 || irq > SACCIC_LEN || 158 ! (type == IST_EDGE_RAISE || type == IST_EDGE_FALL)) 159 panic("sacc_intr_establish: bogus irq or type"); 160 161 if (sc->sc_intrhand[irq] == NULL) { 162 sacc_intr_setpolarity(ic, irq, type); 163 sc->sc_intrtype[irq] = type; 164 } else if (sc->sc_intrtype[irq] != type) 165 /* XXX we should be able to share raising and 166 * falling edge intrs */ 167 panic("sacc_intr_establish: type must be unique"); 168 169 /* install intr handler */ 170 #if defined(__GENERIC_SOFT_INTERRUPTS_ALL_LEVELS) || \ 171 !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 172 173 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 174 ih_arg); 175 #else 176 /* map interrupt level to appropriate softinterrupt level */ 177 if (level >= IPL_SOFTSERIAL) 178 level = IPL_SOFTSERIAL; 179 else if(level >= IPL_SOFTNET) 180 level = IPL_SOFTNET; 181 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 182 ih_arg); 183 #endif 184 ih->ih_irq = irq; 185 ih->ih_next = NULL; 186 187 s = splhigh(); 188 for(p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next) 189 ; 190 191 *p = ih; 192 193 sacc_intr_calculatemasks(sc); 194 splx(s); 195 196 return(ih); 197 } 198 199 void 200 sacc_intr_disestablish(ic, arg) 201 sacc_chipset_tag_t *ic; 202 void *arg; 203 { 204 int irq, s; 205 struct sacc_softc *sc = (struct sacc_softc *)ic; 206 struct sacc_intrhand *ih, **p; 207 208 ih = (struct sacc_intrhand *)arg; 209 irq = ih->ih_irq; 210 211 #ifdef DIAGNOSTIC 212 if (irq < 0 || irq > SACCIC_LEN) 213 panic("sacc_intr_disestablish: bogus irq"); 214 #endif 215 216 s = splhigh(); 217 218 for(p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) { 219 if (*p == NULL) 220 panic("sacc_intr_disestablish: handler not registered"); 221 if (*p == ih) 222 break; 223 } 224 *p = (*p)->ih_next; 225 226 sacc_intr_calculatemasks(sc); 227 splx(s); 228 229 free(ih, M_DEVBUF); 230 } 231 232 void 233 sacc_intr_setpolarity(ic, irq, type) 234 sacc_chipset_tag_t *ic; 235 int irq; 236 int type; 237 { 238 struct sacc_softc *sc = (struct sacc_softc *)ic; 239 int s; 240 u_int32_t pol, mask; 241 int addr; 242 243 if (irq >= 32) { 244 addr = SACCIC_INTPOL1; 245 irq -= 32; 246 } else 247 addr = SACCIC_INTPOL0; 248 249 mask = (1 << irq); 250 251 s = splhigh(); 252 pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 253 if (type == IST_EDGE_RAISE) 254 pol &= ~mask; 255 else 256 pol |= mask; 257 bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol); 258 splx(s); 259 } 260 261 void 262 sacc_intr_calculatemasks(sc) 263 struct sacc_softc *sc; 264 { 265 int irq; 266 267 sc->sc_imask.lo = 0; 268 sc->sc_imask.hi = 0; 269 for(irq = 0; irq < 32; irq++) 270 if (sc->sc_intrhand[irq]) 271 sc->sc_imask.lo |= (1 << irq); 272 for(irq = 0; irq < SACCIC_LEN - 32; irq++) 273 if (sc->sc_intrhand[irq + 32]) 274 sc->sc_imask.hi |= (1 << irq); 275 276 277 /* XXX this should not be done here */ 278 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 279 sc->sc_imask.lo); 280 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 281 sc->sc_imask.hi); 282 DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo, 283 sc->sc_imask.hi)); 284 } 285
Indexes created Tue Sep 30 07:10:03 GMT 2025