sa1111.c revision 1.18
1 /* $NetBSD: sa1111.c,v 1.18 2006/06/27 13:58:08 peter Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by IWAMOTO Toshihiro. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * TODO: 41 * - introduce bus abstraction to support SA-1101 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: sa1111.c,v 1.18 2006/06/27 13:58:08 peter Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/types.h> 50 #include <sys/conf.h> 51 #include <sys/device.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/uio.h> 55 56 #include <machine/bus.h> 57 58 #include <arm/sa11x0/sa11x0_reg.h> 59 #include <arm/sa11x0/sa11x0_var.h> 60 #include <arm/sa11x0/sa11x0_gpioreg.h> 61 #include <arm/sa11x0/sa1111_reg.h> 62 #include <arm/sa11x0/sa1111_var.h> 63 64 #include "locators.h" 65 66 static int sa1111_print(void *, const char *); 67 68 static void sacc_intr_calculatemasks(struct sacc_softc *); 69 static void sacc_intr_setpolarity(sacc_chipset_tag_t *, int , int); 70 71 #if !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 72 void *softintr_establish(int, int (*)(void *), void *); 73 void softintr_schedule(void *); 74 #endif 75 76 #ifdef INTR_DEBUG 77 #define DPRINTF(arg) printf arg 78 #else 79 #define DPRINTF(arg) 80 #endif 81 82 int 83 sacc_probe(struct device *parent, struct cfdata *match, void *aux) 84 { 85 struct sa11x0_attach_args *sa = aux; 86 bus_space_handle_t ioh; 87 uint32_t skid; 88 89 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &ioh)) 90 return 0; 91 92 skid = bus_space_read_4(sa->sa_iot, ioh, SACCSBI_SKID); 93 bus_space_unmap(sa->sa_iot, ioh, sa->sa_size); 94 95 if ((skid & 0xffffff00) != 0x690cc200) 96 return 0; 97 98 return 1; 99 } 100 101 102 int 103 sa1111_search(struct device *parent, struct cfdata *cf, const int *ldesc, 104 void *aux) 105 { 106 struct sa1111_attach_args aa; 107 108 aa.sa_addr = cf->cf_loc[SACCCF_ADDR]; 109 aa.sa_size = cf->cf_loc[SACCCF_SIZE]; 110 aa.sa_intr = cf->cf_loc[SACCCF_INTR]; 111 #if 0 112 aa.sa_membase = cf->cf_loc[SACCCF_MEMBASE]; 113 aa.sa_memsize = cf->cf_loc[SACCCF_MEMSIZE]; 114 #endif 115 116 if (config_match(parent, cf, &aa) > 0) 117 config_attach(parent, cf, &aa, sa1111_print); 118 119 return 0; 120 } 121 122 static int 123 sa1111_print(void *aux, const char *name) 124 { 125 126 return UNCONF; 127 } 128 129 130 void * 131 sacc_intr_establish(sacc_chipset_tag_t *ic, int irq, int type, int level, 132 int (*ih_fun)(void *), void *ih_arg) 133 { 134 int s; 135 struct sacc_softc *sc = (struct sacc_softc *)ic; 136 struct sacc_intrhand **p, *ih; 137 138 /* no point in sleeping unless someone can free memory. */ 139 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 140 if (ih == NULL) 141 panic("sacc_intr_establish: can't malloc handler info"); 142 143 if (irq < 0 || irq > SACCIC_LEN || 144 !(type == IST_EDGE_RAISE || type == IST_EDGE_FALL)) 145 panic("sacc_intr_establish: bogus irq or type"); 146 147 if (sc->sc_intrhand[irq] == NULL) { 148 sacc_intr_setpolarity(ic, irq, type); 149 sc->sc_intrtype[irq] = type; 150 } else if (sc->sc_intrtype[irq] != type) 151 /* XXX we should be able to share raising and 152 * falling edge intrs */ 153 panic("sacc_intr_establish: type must be unique"); 154 155 /* install intr handler */ 156 #if defined(__GENERIC_SOFT_INTERRUPTS_ALL_LEVELS) || \ 157 !defined(__HAVE_GENERIC_SOFT_INTERRUPTS) 158 159 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 160 ih_arg); 161 #else 162 /* map interrupt level to appropriate softinterrupt level */ 163 if (level >= IPL_SOFTSERIAL) 164 level = IPL_SOFTSERIAL; 165 else if (level >= IPL_SOFTNET) 166 level = IPL_SOFTNET; 167 ih->ih_soft = softintr_establish(level, (void (*)(void *)) ih_fun, 168 ih_arg); 169 #endif 170 ih->ih_irq = irq; 171 ih->ih_next = NULL; 172 173 s = splhigh(); 174 for (p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next) 175 continue; 176 177 *p = ih; 178 179 sacc_intr_calculatemasks(sc); 180 splx(s); 181 182 return ih; 183 } 184 185 void 186 sacc_intr_disestablish(sacc_chipset_tag_t *ic, void *arg) 187 { 188 int irq, s; 189 struct sacc_softc *sc = (struct sacc_softc *)ic; 190 struct sacc_intrhand *ih, **p; 191 192 ih = (struct sacc_intrhand *)arg; 193 irq = ih->ih_irq; 194 195 #ifdef DIAGNOSTIC 196 if (irq < 0 || irq > SACCIC_LEN) 197 panic("sacc_intr_disestablish: bogus irq"); 198 #endif 199 200 s = splhigh(); 201 202 for (p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) { 203 if (*p == NULL) 204 panic("sacc_intr_disestablish: handler not registered"); 205 if (*p == ih) 206 break; 207 } 208 *p = (*p)->ih_next; 209 210 sacc_intr_calculatemasks(sc); 211 splx(s); 212 213 free(ih, M_DEVBUF); 214 } 215 216 static void 217 sacc_intr_setpolarity(sacc_chipset_tag_t *ic, int irq, int type) 218 { 219 struct sacc_softc *sc = (struct sacc_softc *)ic; 220 int s; 221 uint32_t pol, mask; 222 int addr; 223 224 if (irq >= 32) { 225 addr = SACCIC_INTPOL1; 226 irq -= 32; 227 } else 228 addr = SACCIC_INTPOL0; 229 230 mask = (1 << irq); 231 232 s = splhigh(); 233 pol = bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 234 if (type == IST_EDGE_RAISE) 235 pol &= ~mask; 236 else 237 pol |= mask; 238 bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, pol); 239 splx(s); 240 } 241 242 static void 243 sacc_intr_calculatemasks(struct sacc_softc *sc) 244 { 245 int irq; 246 247 sc->sc_imask.lo = 0; 248 sc->sc_imask.hi = 0; 249 for (irq = 0; irq < 32; irq++) 250 if (sc->sc_intrhand[irq]) 251 sc->sc_imask.lo |= (1 << irq); 252 for (irq = 0; irq < SACCIC_LEN - 32; irq++) 253 if (sc->sc_intrhand[irq + 32]) 254 sc->sc_imask.hi |= (1 << irq); 255 256 257 /* XXX this should not be done here */ 258 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 259 sc->sc_imask.lo); 260 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 261 sc->sc_imask.hi); 262 DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask.lo, 263 sc->sc_imask.hi)); 264 } 265
Indexes created Tue Sep 30 11:09:46 GMT 2025