1 /* $NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Marty Fouts 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_exynos.h" 33 #include "opt_arm_debug.h" 34 #include "opt_multiprocessor.h" 35 #include "gpio.h" 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(1, "$NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/intr.h> 45 #include <sys/systm.h> 46 #include <sys/kmem.h> 47 48 #include <arm/cortex/gic_intr.h> 49 50 #include <arm/samsung/exynos_reg.h> 51 #include <arm/samsung/exynos_intr.h> 52 53 #include <dev/fdt/fdtvar.h> 54 55 #define COMBINER_GROUP_BASE(group) (((group) / 4) * 0x10) 56 #define COMBINER_GROUP_MASK(group) (0xff << (((group) % 4) * 8)) 57 58 #define COMBINER_IESR_REG(group) (COMBINER_GROUP_BASE(group) + 0x00) 59 #define COMBINER_IECR_REG(group) (COMBINER_GROUP_BASE(group) + 0x04) 60 #define COMBINER_ISTR_REG(group) (COMBINER_GROUP_BASE(group) + 0x08) 61 #define COMBINER_IMSR_REG(group) (COMBINER_GROUP_BASE(group) + 0x0c) 62 63 struct exynos_combiner_softc; 64 65 struct exynos_combiner_irq_entry { 66 int irq_no; 67 int (*irq_handler)(void *); 68 void * irq_arg; 69 struct exynos_combiner_irq_entry *irq_next; 70 bool irq_mpsafe; 71 }; 72 73 struct exynos_combiner_irq_group { 74 int irq_group_no; 75 struct exynos_combiner_softc *irq_sc; 76 struct exynos_combiner_irq_entry *irq_entries; 77 struct exynos_combiner_irq_group *irq_group_next; 78 void *irq_ih; 79 int irq_ipl; 80 }; 81 82 struct exynos_combiner_softc { 83 device_t sc_dev; 84 bus_space_tag_t sc_bst; 85 bus_space_handle_t sc_bsh; 86 int sc_phandle; 87 struct exynos_combiner_irq_group *irq_groups; 88 }; 89 90 static int exynos_combiner_match(device_t, cfdata_t, void *); 91 static void exynos_combiner_attach(device_t, device_t, void *); 92 93 static void * exynos_combiner_establish(device_t, u_int *, int, int, 94 int (*)(void *), void *, const char *); 95 static void exynos_combiner_disestablish(device_t, void *); 96 static bool exynos_combiner_intrstr(device_t, u_int *, char *, 97 size_t); 98 99 struct fdtbus_interrupt_controller_func exynos_combiner_funcs = { 100 .establish = exynos_combiner_establish, 101 .disestablish = exynos_combiner_disestablish, 102 .intrstr = exynos_combiner_intrstr 103 }; 104 105 CFATTACH_DECL_NEW(exynos_intr, sizeof(struct exynos_combiner_softc), 106 exynos_combiner_match, exynos_combiner_attach, NULL, NULL); 107 108 static const struct device_compatible_entry compat_data[] = { 109 { .compat = "samsung,exynos4210-combiner" }, 110 DEVICE_COMPAT_EOL 111 }; 112 113 static int 114 exynos_combiner_match(device_t parent, cfdata_t cf, void *aux) 115 { 116 struct fdt_attach_args * const faa = aux; 117 118 return of_compatible_match(faa->faa_phandle, compat_data); 119 } 120 121 static void 122 exynos_combiner_attach(device_t parent, device_t self, void *aux) 123 { 124 struct exynos_combiner_softc * const sc = device_private(self); 125 struct fdt_attach_args * const faa = aux; 126 bus_addr_t addr; 127 bus_size_t size; 128 int error; 129 130 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 131 aprint_error(": couldn't get registers\n"); 132 return; 133 } 134 135 sc->sc_dev = self; 136 sc->sc_phandle = faa->faa_phandle; 137 sc->sc_bst = faa->faa_bst; 138 139 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 140 if (error) { 141 aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", 142 addr, error); 143 return; 144 } 145 146 error = fdtbus_register_interrupt_controller(self, faa->faa_phandle, 147 &exynos_combiner_funcs); 148 if (error) { 149 aprint_error(": couldn't register with fdtbus: %d\n", error); 150 return; 151 } 152 153 aprint_naive("\n"); 154 aprint_normal(" @ 0x%08x: interrupt combiner\n", (uint)addr); 155 156 } 157 158 static struct exynos_combiner_irq_group * 159 exynos_combiner_new_group(struct exynos_combiner_softc *sc, int group_no) 160 { 161 struct exynos_combiner_irq_group *n = kmem_zalloc(sizeof(*n), 162 KM_SLEEP); 163 n->irq_group_no = group_no; 164 n->irq_group_next = sc->irq_groups; 165 n->irq_sc = sc; 166 sc->irq_groups = n; 167 return n; 168 } 169 170 static struct exynos_combiner_irq_group * 171 exynos_combiner_get_group(struct exynos_combiner_softc *sc, int group_no) 172 { 173 for (struct exynos_combiner_irq_group *g = sc->irq_groups; 174 g; g = g->irq_group_next) { 175 if (g->irq_group_no == group_no) 176 return g; 177 } 178 return NULL; 179 } 180 181 static struct exynos_combiner_irq_entry * 182 exynos_combiner_new_irq(struct exynos_combiner_irq_group *group, 183 int irq, bool mpsafe, int (*func)(void *), void *arg) 184 { 185 struct exynos_combiner_irq_entry * n = kmem_zalloc(sizeof(*n), 186 KM_SLEEP); 187 n->irq_no = irq; 188 n->irq_handler = func; 189 n->irq_next = group->irq_entries; 190 n->irq_arg = arg; 191 n->irq_mpsafe = mpsafe; 192 group->irq_entries = n; 193 return n; 194 } 195 196 static struct exynos_combiner_irq_entry * 197 exynos_combiner_get_irq(struct exynos_combiner_irq_group *g, int irq) 198 { 199 for (struct exynos_combiner_irq_entry *p = g->irq_entries; p; 200 p = p->irq_next) { 201 if (p->irq_no == irq) 202 return p; 203 } 204 return NULL; 205 } 206 207 static int 208 exynos_combiner_irq(void *cookie) 209 { 210 struct exynos_combiner_irq_group *groupp = cookie; 211 struct exynos_combiner_softc *sc = groupp->irq_sc; 212 int rv = 0; 213 214 const int group_no = groupp->irq_group_no; 215 216 const uint32_t istr = 217 bus_space_read_4(sc->sc_bst, sc->sc_bsh, COMBINER_ISTR_REG(group_no)); 218 const uint32_t istatus = __SHIFTOUT(istr, COMBINER_GROUP_MASK(group_no)); 219 220 for (int irq = 0; irq < 8; irq++) { 221 if (istatus & __BIT(irq)) { 222 struct exynos_combiner_irq_entry *e = 223 exynos_combiner_get_irq(groupp, irq); 224 if (e) { 225 if (!e->irq_mpsafe) 226 KERNEL_LOCK(1, curlwp); 227 rv += e->irq_handler(e->irq_arg); 228 if (!e->irq_mpsafe) 229 KERNEL_UNLOCK_ONE(curlwp); 230 } else 231 printf("%s: Unexpected irq (%d) on group %d\n", __func__, 232 irq, group_no); 233 } 234 } 235 236 return !!rv; 237 } 238 239 static void * 240 exynos_combiner_establish(device_t dev, u_int *specifier, 241 int ipl, int flags, 242 int (*func)(void *), void *arg, const char *xname) 243 { 244 struct exynos_combiner_softc * const sc = device_private(dev); 245 struct exynos_combiner_irq_group *groupp; 246 struct exynos_combiner_irq_entry *entryp; 247 const bool mpsafe = (flags & FDT_INTR_MPSAFE) != 0; 248 uint32_t iesr; 249 250 const u_int group = be32toh(specifier[0]); 251 const u_int intr = be32toh(specifier[1]); 252 253 groupp = exynos_combiner_get_group(sc, group); 254 if (!groupp) { 255 groupp = exynos_combiner_new_group(sc, group); 256 if (arg == NULL) { 257 groupp->irq_ih = fdtbus_intr_establish_xname( 258 sc->sc_phandle, group, ipl /* XXX */, flags, func, NULL, 259 device_xname(dev)); 260 } else { 261 groupp->irq_ih = fdtbus_intr_establish_xname( 262 sc->sc_phandle, group, ipl /* XXX */, FDT_INTR_MPSAFE, 263 exynos_combiner_irq, groupp, device_xname(dev)); 264 } 265 KASSERT(groupp->irq_ih != NULL); 266 groupp->irq_ipl = ipl; 267 } else if (groupp->irq_ipl != ipl) { 268 aprint_error_dev(dev, 269 "interrupt combiner cannot share interrupts with different ipl\n"); 270 return NULL; 271 } 272 273 if (exynos_combiner_get_irq(groupp, intr) != NULL) 274 return NULL; 275 276 entryp = exynos_combiner_new_irq(groupp, intr, mpsafe, func, arg); 277 278 iesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, COMBINER_IESR_REG(group)); 279 iesr |= __SHIFTIN((1 << intr), COMBINER_GROUP_MASK(group)); 280 bus_space_write_4(sc->sc_bst, sc->sc_bsh, COMBINER_IESR_REG(group), iesr); 281 282 return entryp; 283 } 284 285 static void 286 exynos_combiner_disestablish(device_t dev, void *ih) 287 { 288 /* MJF: Find the ih and disable the handler. */ 289 panic("exynos_combiner_disestablish not implemented"); 290 } 291 292 static bool 293 exynos_combiner_intrstr(device_t dev, u_int *specifier, char *buf, 294 size_t buflen) 295 { 296 297 /* 1st cell is the combiner group number */ 298 /* 2nd cell is the interrupt number within the group */ 299 300 const u_int group = be32toh(specifier[0]); 301 const u_int intr = be32toh(specifier[1]); 302 303 snprintf(buf, buflen, "interrupt combiner group %d intr %d", group, intr); 304 305 return true; 306 } 307
Indexes created Sat Sep 20 22:09:52 GMT 2025