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exynos_dwcmmc.c revision 1.2.2.3
      1  1.2.2.3  skrll /* $NetBSD: exynos_dwcmmc.c,v 1.2.2.3 2016/07/09 20:24:50 skrll Exp $ */
      2  1.2.2.2  skrll 
      3  1.2.2.2  skrll /*-
      4  1.2.2.2  skrll  * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  1.2.2.2  skrll  * All rights reserved.
      6  1.2.2.2  skrll  *
      7  1.2.2.2  skrll  * Redistribution and use in source and binary forms, with or without
      8  1.2.2.2  skrll  * modification, are permitted provided that the following conditions
      9  1.2.2.2  skrll  * are met:
     10  1.2.2.2  skrll  * 1. Redistributions of source code must retain the above copyright
     11  1.2.2.2  skrll  *    notice, this list of conditions and the following disclaimer.
     12  1.2.2.2  skrll  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.2.2.2  skrll  *    notice, this list of conditions and the following disclaimer in the
     14  1.2.2.2  skrll  *    documentation and/or other materials provided with the distribution.
     15  1.2.2.2  skrll  *
     16  1.2.2.2  skrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.2.2.2  skrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.2.2.2  skrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.2.2.2  skrll  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.2.2.2  skrll  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.2.2.2  skrll  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.2.2.2  skrll  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.2.2.2  skrll  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.2.2.2  skrll  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.2.2.2  skrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.2.2.2  skrll  * SUCH DAMAGE.
     27  1.2.2.2  skrll  */
     28  1.2.2.2  skrll 
     29  1.2.2.2  skrll #include <sys/cdefs.h>
     30  1.2.2.3  skrll __KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.2.2.3 2016/07/09 20:24:50 skrll Exp $");
     31  1.2.2.2  skrll 
     32  1.2.2.2  skrll #include <sys/param.h>
     33  1.2.2.2  skrll #include <sys/bus.h>
     34  1.2.2.2  skrll #include <sys/device.h>
     35  1.2.2.2  skrll #include <sys/intr.h>
     36  1.2.2.2  skrll #include <sys/systm.h>
     37  1.2.2.2  skrll #include <sys/kernel.h>
     38  1.2.2.2  skrll #include <sys/mutex.h>
     39  1.2.2.2  skrll #include <sys/condvar.h>
     40  1.2.2.2  skrll 
     41  1.2.2.2  skrll #include <arm/samsung/exynos_var.h>
     42  1.2.2.2  skrll 
     43  1.2.2.2  skrll #include <dev/ic/dwc_mmc_var.h>
     44  1.2.2.2  skrll #include <dev/fdt/fdtvar.h>
     45  1.2.2.2  skrll 
     46  1.2.2.2  skrll static int	exynos_dwcmmc_match(device_t, cfdata_t, void *);
     47  1.2.2.2  skrll static void	exynos_dwcmmc_attach(device_t, device_t, void *);
     48  1.2.2.2  skrll 
     49  1.2.2.2  skrll static void	exynos_dwcmmc_attach_i(device_t);
     50  1.2.2.2  skrll 
     51  1.2.2.2  skrll static int	exynos_dwcmmc_card_detect(struct dwc_mmc_softc *);
     52  1.2.2.2  skrll 
     53  1.2.2.2  skrll struct exynos_dwcmmc_softc {
     54  1.2.2.2  skrll 	struct dwc_mmc_softc	sc;
     55  1.2.2.2  skrll 	struct clk		*sc_clk_biu;
     56  1.2.2.2  skrll 	struct clk		*sc_clk_ciu;
     57  1.2.2.2  skrll 	struct fdtbus_gpio_pin	*sc_pin_cd;
     58  1.2.2.2  skrll };
     59  1.2.2.2  skrll 
     60  1.2.2.2  skrll CFATTACH_DECL_NEW(exynos_dwcmmc, sizeof(struct dwc_mmc_softc),
     61  1.2.2.2  skrll 	exynos_dwcmmc_match, exynos_dwcmmc_attach, NULL, NULL);
     62  1.2.2.2  skrll 
     63  1.2.2.2  skrll static const char * const exynos_dwcmmc_compat[] = {
     64  1.2.2.2  skrll 	"samsung,exynos5420-dw-mshc-smu",
     65  1.2.2.2  skrll 	"samsung,exynos5420-dw-mshc",
     66  1.2.2.2  skrll 	NULL
     67  1.2.2.2  skrll };
     68  1.2.2.2  skrll 
     69  1.2.2.2  skrll static int
     70  1.2.2.2  skrll exynos_dwcmmc_match(device_t parent, cfdata_t cf, void *aux)
     71  1.2.2.2  skrll {
     72  1.2.2.2  skrll 	struct fdt_attach_args * const faa = aux;
     73  1.2.2.2  skrll 
     74  1.2.2.2  skrll 	return of_match_compatible(faa->faa_phandle, exynos_dwcmmc_compat);
     75  1.2.2.2  skrll }
     76  1.2.2.2  skrll 
     77  1.2.2.2  skrll static void
     78  1.2.2.2  skrll exynos_dwcmmc_attach(device_t parent, device_t self, void *aux)
     79  1.2.2.2  skrll {
     80  1.2.2.2  skrll 	struct exynos_dwcmmc_softc *esc = device_private(self);
     81  1.2.2.2  skrll 	struct dwc_mmc_softc *sc = &esc->sc;
     82  1.2.2.2  skrll 	struct fdt_attach_args * const faa = aux;
     83  1.2.2.2  skrll 	const int phandle = faa->faa_phandle;
     84  1.2.2.2  skrll 	char intrstr[128];
     85  1.2.2.2  skrll 	bus_addr_t addr;
     86  1.2.2.2  skrll 	bus_size_t size;
     87  1.2.2.3  skrll 	u_int ciu_div, fifo_depth;
     88  1.2.2.2  skrll 	int error;
     89  1.2.2.2  skrll 
     90  1.2.2.2  skrll 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
     91  1.2.2.2  skrll 		aprint_error(": couldn't get registers\n");
     92  1.2.2.2  skrll 		return;
     93  1.2.2.2  skrll 	}
     94  1.2.2.2  skrll 
     95  1.2.2.3  skrll 	//if (of_getprop_uint32(phandle, "bus-width", &bus_width)) {
     96  1.2.2.3  skrll 	//	bus_width = 4;
     97  1.2.2.3  skrll 	//}
     98  1.2.2.2  skrll 	if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) {
     99  1.2.2.2  skrll 		fifo_depth = 64;
    100  1.2.2.2  skrll 	}
    101  1.2.2.2  skrll 	if (of_getprop_uint32(phandle, "samsung,dw-mshc-ciu-div", &ciu_div)) {
    102  1.2.2.2  skrll 		aprint_error(": missing samsung,dw-mshc-ciu-div property\n");
    103  1.2.2.2  skrll 		return;
    104  1.2.2.2  skrll 	}
    105  1.2.2.2  skrll 
    106  1.2.2.2  skrll 	esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu");
    107  1.2.2.2  skrll 	if (esc->sc_clk_biu == NULL) {
    108  1.2.2.2  skrll 		aprint_error(": couldn't get clock biu\n");
    109  1.2.2.2  skrll 		return;
    110  1.2.2.2  skrll 	}
    111  1.2.2.2  skrll 	esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu");
    112  1.2.2.2  skrll 	if (esc->sc_clk_ciu == NULL) {
    113  1.2.2.2  skrll 		aprint_error(": couldn't get clock ciu\n");
    114  1.2.2.2  skrll 		return;
    115  1.2.2.2  skrll 	}
    116  1.2.2.2  skrll 
    117  1.2.2.2  skrll 	error = clk_enable(esc->sc_clk_biu);
    118  1.2.2.2  skrll 	if (error) {
    119  1.2.2.2  skrll 		aprint_error(": couldn't enable clock biu: %d\n", error);
    120  1.2.2.2  skrll 		return;
    121  1.2.2.2  skrll 	}
    122  1.2.2.2  skrll 	error = clk_enable(esc->sc_clk_ciu);
    123  1.2.2.2  skrll 	if (error) {
    124  1.2.2.2  skrll 		aprint_error(": couldn't enable clock ciu: %d\n", error);
    125  1.2.2.2  skrll 		return;
    126  1.2.2.2  skrll 	}
    127  1.2.2.2  skrll 
    128  1.2.2.2  skrll 	sc->sc_dev = self;
    129  1.2.2.2  skrll 	sc->sc_bst = faa->faa_bst;
    130  1.2.2.2  skrll 	sc->sc_dmat = faa->faa_dmat;
    131  1.2.2.2  skrll 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
    132  1.2.2.2  skrll 	if (error) {
    133  1.2.2.2  skrll 		aprint_error(": couldn't map %#llx: %d\n",
    134  1.2.2.2  skrll 		    (uint64_t)addr, error);
    135  1.2.2.2  skrll 		return;
    136  1.2.2.2  skrll 	}
    137  1.2.2.2  skrll 
    138  1.2.2.2  skrll 	sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu) / (ciu_div + 1);
    139  1.2.2.2  skrll 	sc->sc_fifo_depth = fifo_depth;
    140  1.2.2.2  skrll 
    141  1.2.2.2  skrll 	esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios",
    142  1.2.2.2  skrll 	    GPIO_PIN_INPUT);
    143  1.2.2.2  skrll 	if (esc->sc_pin_cd) {
    144  1.2.2.2  skrll 		sc->sc_card_detect = exynos_dwcmmc_card_detect;
    145  1.2.2.2  skrll 	}
    146  1.2.2.2  skrll 
    147  1.2.2.2  skrll 	aprint_naive("\n");
    148  1.2.2.2  skrll 	aprint_normal(": MHS (%u Hz)\n", sc->sc_clock_freq);
    149  1.2.2.2  skrll 
    150  1.2.2.2  skrll 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
    151  1.2.2.2  skrll 		aprint_error_dev(self, "failed to decode interrupt\n");
    152  1.2.2.2  skrll 		return;
    153  1.2.2.2  skrll 	}
    154  1.2.2.2  skrll 
    155  1.2.2.2  skrll 	sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0,
    156  1.2.2.2  skrll 	    dwc_mmc_intr, sc);
    157  1.2.2.2  skrll 	if (sc->sc_ih == NULL) {
    158  1.2.2.2  skrll 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
    159  1.2.2.2  skrll 		    intrstr);
    160  1.2.2.2  skrll 		return;
    161  1.2.2.2  skrll 	}
    162  1.2.2.2  skrll 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    163  1.2.2.2  skrll 
    164  1.2.2.2  skrll 	config_interrupts(self, exynos_dwcmmc_attach_i);
    165  1.2.2.2  skrll }
    166  1.2.2.2  skrll 
    167  1.2.2.2  skrll static void
    168  1.2.2.2  skrll exynos_dwcmmc_attach_i(device_t self)
    169  1.2.2.2  skrll {
    170  1.2.2.2  skrll 	struct exynos_dwcmmc_softc *esc = device_private(self);
    171  1.2.2.2  skrll 	struct dwc_mmc_softc *sc = &esc->sc;
    172  1.2.2.2  skrll 
    173  1.2.2.2  skrll 	dwc_mmc_init(sc);
    174  1.2.2.2  skrll }
    175  1.2.2.2  skrll 
    176  1.2.2.2  skrll static int
    177  1.2.2.2  skrll exynos_dwcmmc_card_detect(struct dwc_mmc_softc *sc)
    178  1.2.2.2  skrll {
    179  1.2.2.2  skrll 	struct exynos_dwcmmc_softc *esc = device_private(sc->sc_dev);
    180  1.2.2.2  skrll 
    181  1.2.2.2  skrll 	KASSERT(esc->sc_pin_cd != NULL);
    182  1.2.2.2  skrll 
    183  1.2.2.2  skrll 	return fdtbus_gpio_read(esc->sc_pin_cd);
    184  1.2.2.2  skrll }
    185