exynos_dwcmmc.c revision 1.2
1 /* $NetBSD: exynos_dwcmmc.c,v 1.2 2015/12/27 20:49:01 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.2 2015/12/27 20:49:01 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 41 #include <arm/samsung/exynos_var.h> 42 43 #include <dev/ic/dwc_mmc_var.h> 44 #include <dev/fdt/fdtvar.h> 45 46 static int exynos_dwcmmc_match(device_t, cfdata_t, void *); 47 static void exynos_dwcmmc_attach(device_t, device_t, void *); 48 49 static void exynos_dwcmmc_attach_i(device_t); 50 51 static int exynos_dwcmmc_card_detect(struct dwc_mmc_softc *); 52 53 struct exynos_dwcmmc_softc { 54 struct dwc_mmc_softc sc; 55 struct clk *sc_clk_biu; 56 struct clk *sc_clk_ciu; 57 struct fdtbus_gpio_pin *sc_pin_cd; 58 }; 59 60 CFATTACH_DECL_NEW(exynos_dwcmmc, sizeof(struct dwc_mmc_softc), 61 exynos_dwcmmc_match, exynos_dwcmmc_attach, NULL, NULL); 62 63 static const char * const exynos_dwcmmc_compat[] = { 64 "samsung,exynos5420-dw-mshc-smu", 65 "samsung,exynos5420-dw-mshc", 66 NULL 67 }; 68 69 static int 70 exynos_dwcmmc_match(device_t parent, cfdata_t cf, void *aux) 71 { 72 struct fdt_attach_args * const faa = aux; 73 74 return of_match_compatible(faa->faa_phandle, exynos_dwcmmc_compat); 75 } 76 77 static void 78 exynos_dwcmmc_attach(device_t parent, device_t self, void *aux) 79 { 80 struct exynos_dwcmmc_softc *esc = device_private(self); 81 struct dwc_mmc_softc *sc = &esc->sc; 82 struct fdt_attach_args * const faa = aux; 83 const int phandle = faa->faa_phandle; 84 char intrstr[128]; 85 bus_addr_t addr; 86 bus_size_t size; 87 u_int bus_width, ciu_div, fifo_depth; 88 int error; 89 90 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 91 aprint_error(": couldn't get registers\n"); 92 return; 93 } 94 95 if (of_getprop_uint32(phandle, "bus-width", &bus_width)) { 96 bus_width = 4; 97 } 98 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) { 99 fifo_depth = 64; 100 } 101 if (of_getprop_uint32(phandle, "samsung,dw-mshc-ciu-div", &ciu_div)) { 102 aprint_error(": missing samsung,dw-mshc-ciu-div property\n"); 103 return; 104 } 105 106 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 107 if (esc->sc_clk_biu == NULL) { 108 aprint_error(": couldn't get clock biu\n"); 109 return; 110 } 111 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 112 if (esc->sc_clk_ciu == NULL) { 113 aprint_error(": couldn't get clock ciu\n"); 114 return; 115 } 116 117 error = clk_enable(esc->sc_clk_biu); 118 if (error) { 119 aprint_error(": couldn't enable clock biu: %d\n", error); 120 return; 121 } 122 error = clk_enable(esc->sc_clk_ciu); 123 if (error) { 124 aprint_error(": couldn't enable clock ciu: %d\n", error); 125 return; 126 } 127 128 sc->sc_dev = self; 129 sc->sc_bst = faa->faa_bst; 130 sc->sc_dmat = faa->faa_dmat; 131 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 132 if (error) { 133 aprint_error(": couldn't map %#llx: %d\n", 134 (uint64_t)addr, error); 135 return; 136 } 137 138 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu) / (ciu_div + 1); 139 sc->sc_fifo_depth = fifo_depth; 140 141 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios", 142 GPIO_PIN_INPUT); 143 if (esc->sc_pin_cd) { 144 sc->sc_card_detect = exynos_dwcmmc_card_detect; 145 } 146 147 aprint_naive("\n"); 148 aprint_normal(": MHS (%u Hz)\n", sc->sc_clock_freq); 149 150 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 151 aprint_error_dev(self, "failed to decode interrupt\n"); 152 return; 153 } 154 155 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0, 156 dwc_mmc_intr, sc); 157 if (sc->sc_ih == NULL) { 158 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 159 intrstr); 160 return; 161 } 162 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 163 164 config_interrupts(self, exynos_dwcmmc_attach_i); 165 } 166 167 static void 168 exynos_dwcmmc_attach_i(device_t self) 169 { 170 struct exynos_dwcmmc_softc *esc = device_private(self); 171 struct dwc_mmc_softc *sc = &esc->sc; 172 173 dwc_mmc_init(sc); 174 } 175 176 static int 177 exynos_dwcmmc_card_detect(struct dwc_mmc_softc *sc) 178 { 179 struct exynos_dwcmmc_softc *esc = device_private(sc->sc_dev); 180 181 KASSERT(esc->sc_pin_cd != NULL); 182 183 return fdtbus_gpio_read(esc->sc_pin_cd); 184 } 185
Indexes created Thu Oct 02 01:09:59 GMT 2025