exynos_intr.h revision 1.1 
11.1Smatt/*-
21.1Smatt * Copyright (c) 2014 The NetBSD Foundation, Inc.
31.1Smatt * All rights reserved.
41.1Smatt *
51.1Smatt * This code is derived from software contributed to The NetBSD Foundation
61.1Smatt * by Nick Hudson
71.1Smatt *
81.1Smatt * Redistribution and use in source and binary forms, with or without
91.1Smatt * modification, are permitted provided that the following conditions
101.1Smatt * are met:
111.1Smatt * 1. Redistributions of source code must retain the above copyright
121.1Smatt *    notice, this list of conditions and the following disclaimer.
131.1Smatt * 2. Redistributions in binary form must reproduce the above copyright
141.1Smatt *    notice, this list of conditions and the following disclaimer in the
151.1Smatt *    documentation and/or other materials provided with the distribution.
161.1Smatt *
171.1Smatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
181.1Smatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
191.1Smatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
201.1Smatt * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
211.1Smatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
221.1Smatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
231.1Smatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
241.1Smatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
251.1Smatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
261.1Smatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
271.1Smatt * POSSIBILITY OF SUCH DAMAGE.
281.1Smatt */
291.1Smatt
301.1Smatt#ifndef _ARM_SAMSUNG_EXYNOS_INTR_H_
311.1Smatt#define _ARM_SAMSUNG_EXYNOS_INTR_H_
321.1Smatt
331.1Smatt#define	PIC_MAXSOURCES			GIC_MAXSOURCES(224)
341.1Smatt#define	PIC_MAXMAXSOURCES		(PIC_MAXSOURCES + 32)	/* XXX */
351.1Smatt
361.1Smatt/*
371.1Smatt * The Exynos uses a generic interrupt controller
381.1Smatt */
391.1Smatt#include <arm/cortex/gic_intr.h>
401.1Smatt
411.1Smatt#ifdef _KERNEL_OPT
421.1Smatt#include "opt_exynos.h"
431.1Smatt#endif
441.1Smatt
451.1Smatt/*
461.1Smatt * The GIC supports
471.1Smatt *   - 16 Software Generated Interrupts (SGIs)
481.1Smatt *   - 16 Private Peripheral Interrupts (PPIs)
491.1Smatt *   - 127 Shared Peripheral Interrupts (SPIs)
501.1Smatt */
511.1Smatt
521.1Smatt#define	EXYNOS_NSPI		128
531.1Smatt#define	EXYNOS_COMBINERBASE	EXYNOS_SPIBASE + EXYNOS_NSPI
541.1Smatt
551.1Smatt#define	EXYNOS_BITSPERGROUP	8
561.1Smatt
571.1Smatt#define	EXYNOS_COMBINERIRQ(g, b) \
581.1Smatt    (EXYNOS_COMBINERBASE + ((g) * EXYNOS_BITSPERGROUP + (b)))
591.1Smatt
601.1Smatt#define	IRQ_MCT_LTIMER		IRQ_PPI(12)
611.1Smatt
621.1Smatt#ifdef EXYNOS5
631.1Smatt#include <arm/cortex/gtmr_intr.h>
641.1Smatt#endif
651.1Smatt
661.1Smatt#endif /* _ARM_SAMSUNG_EXYNOS_INTR_H_ */
671.1Smatt
68