exynos_pinctrl.c revision 1.18 1 1.18 thorpej /* $NetBSD: exynos_pinctrl.c,v 1.18 2021/01/18 02:35:49 thorpej Exp $ */
2 1.1 marty
3 1.1 marty /*-
4 1.17 skrll * Copyright (c) 2015, 2020 The NetBSD Foundation, Inc.
5 1.1 marty * All rights reserved.
6 1.1 marty *
7 1.1 marty * This code is derived from software contributed to The NetBSD Foundation
8 1.17 skrll * by Marty Fouts, and by Nick Hudson
9 1.1 marty *
10 1.1 marty * Redistribution and use in source and binary forms, with or without
11 1.1 marty * modification, are permitted provided that the following conditions
12 1.1 marty * are met:
13 1.1 marty * 1. Redistributions of source code must retain the above copyright
14 1.1 marty * notice, this list of conditions and the following disclaimer.
15 1.1 marty * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 marty * notice, this list of conditions and the following disclaimer in the
17 1.1 marty * documentation and/or other materials provided with the distribution.
18 1.1 marty *
19 1.1 marty * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 marty * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 marty * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 marty * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 marty * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 marty * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 marty * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 marty * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 marty * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 marty * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 marty * POSSIBILITY OF SUCH DAMAGE.
30 1.1 marty */
31 1.1 marty
32 1.1 marty #include "opt_exynos.h"
33 1.1 marty #include "opt_arm_debug.h"
34 1.1 marty #include "gpio.h"
35 1.1 marty
36 1.1 marty #include <sys/cdefs.h>
37 1.18 thorpej __KERNEL_RCSID(1, "$NetBSD: exynos_pinctrl.c,v 1.18 2021/01/18 02:35:49 thorpej Exp $");
38 1.1 marty
39 1.1 marty #include <sys/param.h>
40 1.1 marty #include <sys/bus.h>
41 1.1 marty #include <sys/device.h>
42 1.1 marty #include <sys/intr.h>
43 1.1 marty #include <sys/systm.h>
44 1.1 marty #include <sys/kmem.h>
45 1.1 marty #include <sys/gpio.h>
46 1.1 marty
47 1.1 marty #include <dev/gpio/gpiovar.h>
48 1.1 marty
49 1.1 marty #include <arm/samsung/exynos_reg.h>
50 1.3 marty #include <arm/samsung/exynos_var.h>
51 1.1 marty #include <arm/samsung/exynos_intr.h>
52 1.1 marty #include <arm/samsung/exynos_pinctrl.h>
53 1.1 marty
54 1.1 marty #include <dev/fdt/fdtvar.h>
55 1.1 marty
56 1.9 marty struct exynos_pinctrl_config {
57 1.9 marty int pc_phandle;
58 1.11 jmcneill struct exynos_gpio_pin_cfg pc_pincfg;
59 1.9 marty struct exynos_pinctrl_softc *pc_sc;
60 1.9 marty };
61 1.9 marty
62 1.1 marty static int exynos_pinctrl_match(device_t, cfdata_t, void *);
63 1.1 marty static void exynos_pinctrl_attach(device_t, device_t, void *);
64 1.1 marty
65 1.11 jmcneill static int exynos_pinctrl_set_cfg(device_t, const void *, size_t);
66 1.11 jmcneill static void exynos_parse_config(int, struct exynos_gpio_pin_cfg *);
67 1.8 marty
68 1.8 marty static struct fdtbus_pinctrl_controller_func exynos_pinctrl_controller_func = {
69 1.9 marty .set_config = exynos_pinctrl_set_cfg
70 1.8 marty };
71 1.8 marty
72 1.1 marty CFATTACH_DECL_NEW(exynos_pinctrl, sizeof(struct exynos_pinctrl_softc),
73 1.1 marty exynos_pinctrl_match, exynos_pinctrl_attach, NULL, NULL);
74 1.1 marty
75 1.17 skrll
76 1.18 thorpej static const struct device_compatible_entry compat_data[] = {
77 1.18 thorpej { .compat = "samsung,exynos5410-pinctrl",
78 1.18 thorpej .data = &exynos5410_pinctrl_banks },
79 1.18 thorpej { .compat = "samsung,exynos5420-pinctrl",
80 1.18 thorpej .data = &exynos5420_pinctrl_banks },
81 1.18 thorpej
82 1.18 thorpej { 0 }
83 1.17 skrll };
84 1.17 skrll
85 1.1 marty static int
86 1.1 marty exynos_pinctrl_match(device_t parent, cfdata_t cf, void *aux)
87 1.1 marty {
88 1.1 marty struct fdt_attach_args * const faa = aux;
89 1.17 skrll
90 1.17 skrll return of_match_compat_data(faa->faa_phandle, compat_data);
91 1.1 marty }
92 1.1 marty
93 1.1 marty static void
94 1.1 marty exynos_pinctrl_attach(device_t parent, device_t self, void *aux)
95 1.1 marty {
96 1.1 marty struct exynos_pinctrl_softc * const sc
97 1.1 marty = kmem_zalloc(sizeof(*sc), KM_SLEEP);
98 1.1 marty struct fdt_attach_args * const faa = aux;
99 1.1 marty bus_addr_t addr;
100 1.1 marty bus_size_t size;
101 1.1 marty int error;
102 1.1 marty int child;
103 1.1 marty
104 1.1 marty if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
105 1.1 marty aprint_error(": couldn't get registers\n");
106 1.1 marty return;
107 1.1 marty }
108 1.1 marty
109 1.17 skrll aprint_normal(" pinctrl @ 0x%08x ", (uint)addr);
110 1.17 skrll self->dv_private = sc;
111 1.1 marty sc->sc_dev = self;
112 1.1 marty sc->sc_bst = faa->faa_bst;
113 1.18 thorpej sc->sc_epb = of_search_compatible(faa->faa_phandle, compat_data)->data;
114 1.17 skrll
115 1.1 marty error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
116 1.1 marty if (error) {
117 1.15 skrll aprint_error(": couldn't map %#" PRIxBUSADDR ": %d",
118 1.15 skrll addr, error);
119 1.1 marty return;
120 1.1 marty }
121 1.1 marty
122 1.7 jmcneill aprint_naive("\n");
123 1.7 jmcneill aprint_normal("\n");
124 1.7 jmcneill
125 1.1 marty for (child = OF_child(faa->faa_phandle); child;
126 1.1 marty child = OF_peer(child)) {
127 1.9 marty
128 1.13 jmcneill if (of_hasprop(child, "gpio-controller")) {
129 1.9 marty exynos_gpio_bank_config(sc, faa, child);
130 1.9 marty }
131 1.9 marty
132 1.13 jmcneill if (of_hasprop(child, "samsung,pins")) {
133 1.11 jmcneill fdtbus_register_pinctrl_config(self, child,
134 1.17 skrll &exynos_pinctrl_controller_func);
135 1.9 marty }
136 1.1 marty }
137 1.1 marty }
138 1.8 marty
139 1.11 jmcneill static void
140 1.11 jmcneill exynos_parse_config(int phandle, struct exynos_gpio_pin_cfg *gc)
141 1.9 marty {
142 1.13 jmcneill gc->cfg_valid = of_getprop_uint32(phandle, "samsung,pin-function", &gc->cfg) == 0;
143 1.13 jmcneill gc->pud_valid = of_getprop_uint32(phandle, "samsung,pin-pud", &gc->pud) == 0;
144 1.13 jmcneill gc->drv_valid = of_getprop_uint32(phandle, "samsung,pin-drv", &gc->drv) == 0;
145 1.13 jmcneill gc->conpwd_valid = of_getprop_uint32(phandle, "samsung,pin-conpwd", &gc->conpwd) == 0;
146 1.13 jmcneill gc->pudpwd_valid = of_getprop_uint32(phandle, "samsung,pin-pudpwd", &gc->pudpwd) == 0;
147 1.13 jmcneill }
148 1.13 jmcneill
149 1.13 jmcneill static int
150 1.13 jmcneill exynos_parse_pin(const char *pinname)
151 1.13 jmcneill {
152 1.13 jmcneill
153 1.13 jmcneill const int len = strlen(pinname);
154 1.13 jmcneill
155 1.13 jmcneill if (len == 0)
156 1.13 jmcneill return -1;
157 1.13 jmcneill
158 1.13 jmcneill if (pinname[len - 1] < '0' || pinname[len - 1] > '9')
159 1.13 jmcneill return -1;
160 1.13 jmcneill
161 1.13 jmcneill return pinname[len - 1] - '0';
162 1.8 marty }
163 1.8 marty
164 1.9 marty static int
165 1.9 marty exynos_do_config(struct exynos_pinctrl_config *pc)
166 1.8 marty {
167 1.11 jmcneill struct exynos_gpio_pin_cfg *gc = &pc->pc_pincfg;
168 1.18 thorpej const struct exynos_pinctrl_banks *epb = pc->pc_sc->sc_epb;
169 1.9 marty struct exynos_gpio_bank *bank;
170 1.11 jmcneill const char *pins;
171 1.13 jmcneill int pin;
172 1.9 marty
173 1.11 jmcneill int pins_len = OF_getproplen(pc->pc_phandle, "samsung,pins");
174 1.11 jmcneill if (pins_len <= 0)
175 1.9 marty return -1;
176 1.9 marty
177 1.11 jmcneill for (pins = fdtbus_get_string(pc->pc_phandle, "samsung,pins");
178 1.11 jmcneill pins_len > 0;
179 1.11 jmcneill pins_len -= strlen(pins) + 1, pins += strlen(pins) + 1) {
180 1.17 skrll bank = exynos_gpio_bank_lookup(epb, pins);
181 1.13 jmcneill pin = exynos_parse_pin(pins);
182 1.11 jmcneill if (bank == NULL) {
183 1.11 jmcneill aprint_error_dev(pc->pc_sc->sc_dev,
184 1.11 jmcneill "unknown pin name '%s'\n", pins);
185 1.11 jmcneill continue;
186 1.11 jmcneill }
187 1.13 jmcneill exynos_gpio_pin_ctl_write(bank, gc, pin);
188 1.9 marty }
189 1.8 marty
190 1.9 marty return 0;
191 1.8 marty }
192 1.16 skrll
193 1.9 marty static int
194 1.11 jmcneill exynos_pinctrl_set_cfg(device_t dev, const void *data, size_t len)
195 1.8 marty {
196 1.11 jmcneill struct exynos_pinctrl_config pc;
197 1.11 jmcneill
198 1.11 jmcneill if (len != 4)
199 1.11 jmcneill return -1;
200 1.11 jmcneill
201 1.11 jmcneill pc.pc_phandle = fdtbus_get_phandle_from_native(be32dec(data));
202 1.11 jmcneill pc.pc_sc = device_private(dev);
203 1.11 jmcneill exynos_parse_config(pc.pc_phandle, &pc.pc_pincfg);
204 1.11 jmcneill
205 1.11 jmcneill return exynos_do_config(&pc);
206 1.8 marty }
207