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exynos_pinctrl.c revision 1.15
      1 /*	$NetBSD: exynos_pinctrl.c,v 1.15 2019/10/18 06:13:38 skrll Exp $ */
      2 
      3 /*-
      4 * Copyright (c) 2015 The NetBSD Foundation, Inc.
      5 * All rights reserved.
      6 *
      7 * This code is derived from software contributed to The NetBSD Foundation
      8 * by Marty Fouts
      9 *
     10 * Redistribution and use in source and binary forms, with or without
     11 * modification, are permitted provided that the following conditions
     12 * are met:
     13 * 1. Redistributions of source code must retain the above copyright
     14 *    notice, this list of conditions and the following disclaimer.
     15 * 2. Redistributions in binary form must reproduce the above copyright
     16 *    notice, this list of conditions and the following disclaimer in the
     17 *    documentation and/or other materials provided with the distribution.
     18 *
     19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29 * POSSIBILITY OF SUCH DAMAGE.
     30 */
     31 
     32 #include "opt_exynos.h"
     33 #include "opt_arm_debug.h"
     34 #include "gpio.h"
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(1, "$NetBSD: exynos_pinctrl.c,v 1.15 2019/10/18 06:13:38 skrll Exp $");
     38 
     39 #include <sys/param.h>
     40 #include <sys/bus.h>
     41 #include <sys/device.h>
     42 #include <sys/intr.h>
     43 #include <sys/systm.h>
     44 #include <sys/kmem.h>
     45 #include <sys/gpio.h>
     46 
     47 #include <dev/gpio/gpiovar.h>
     48 
     49 #include <arm/samsung/exynos_reg.h>
     50 #include <arm/samsung/exynos_var.h>
     51 #include <arm/samsung/exynos_intr.h>
     52 #include <arm/samsung/exynos_pinctrl.h>
     53 
     54 #include <dev/fdt/fdtvar.h>
     55 
     56 struct exynos_pinctrl_config {
     57 	int pc_phandle;
     58 	struct exynos_gpio_pin_cfg pc_pincfg;
     59 	struct exynos_pinctrl_softc *pc_sc;
     60 };
     61 
     62 static int exynos_pinctrl_match(device_t, cfdata_t, void *);
     63 static void exynos_pinctrl_attach(device_t, device_t, void *);
     64 
     65 static int  exynos_pinctrl_set_cfg(device_t, const void *, size_t);
     66 static void exynos_parse_config(int, struct exynos_gpio_pin_cfg *);
     67 
     68 static struct fdtbus_pinctrl_controller_func exynos_pinctrl_controller_func = {
     69 	.set_config = exynos_pinctrl_set_cfg
     70 };
     71 
     72 CFATTACH_DECL_NEW(exynos_pinctrl, sizeof(struct exynos_pinctrl_softc),
     73 	exynos_pinctrl_match, exynos_pinctrl_attach, NULL, NULL);
     74 
     75 static int
     76 exynos_pinctrl_match(device_t parent, cfdata_t cf, void *aux)
     77 {
     78 	const char * const compatible[] = {
     79 	    "samsung,exynos5410-pinctrl",
     80 	    "samsung,exynos5420-pinctrl",
     81 	    NULL };
     82 	struct fdt_attach_args * const faa = aux;
     83 	return of_match_compatible(faa->faa_phandle, compatible);
     84 }
     85 
     86 static void
     87 exynos_pinctrl_attach(device_t parent, device_t self, void *aux)
     88 {
     89 	struct exynos_pinctrl_softc * const sc
     90 		= kmem_zalloc(sizeof(*sc), KM_SLEEP);
     91 	struct fdt_attach_args * const faa = aux;
     92 	bus_addr_t addr;
     93 	bus_size_t size;
     94 	int error;
     95 	int child;
     96 
     97 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
     98 		aprint_error(": couldn't get registers\n");
     99 		return;
    100 	}
    101 
    102 	aprint_normal(" pinctl @ 0x%08x ", (uint)addr);
    103 	sc->sc_dev = self;
    104 	sc->sc_bst = faa->faa_bst;
    105 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
    106 	if (error) {
    107 		aprint_error(": couldn't map %#" PRIxBUSADDR ": %d",
    108 			     addr, error);
    109 		return;
    110 	}
    111 
    112 	aprint_naive("\n");
    113 	aprint_normal("\n");
    114 
    115 	for (child = OF_child(faa->faa_phandle); child;
    116 	     child = OF_peer(child)) {
    117 
    118 		if (of_hasprop(child, "gpio-controller")) {
    119 			exynos_gpio_bank_config(sc, faa, child);
    120 		}
    121 
    122 		if (of_hasprop(child, "samsung,pins")) {
    123 			fdtbus_register_pinctrl_config(self, child,
    124 						       &exynos_pinctrl_controller_func);
    125 		}
    126 	}
    127 }
    128 
    129 static void
    130 exynos_parse_config(int phandle, struct exynos_gpio_pin_cfg *gc)
    131 {
    132 	gc->cfg_valid = of_getprop_uint32(phandle, "samsung,pin-function", &gc->cfg) == 0;
    133 	gc->pud_valid = of_getprop_uint32(phandle, "samsung,pin-pud", &gc->pud) == 0;
    134 	gc->drv_valid = of_getprop_uint32(phandle, "samsung,pin-drv", &gc->drv) == 0;
    135 	gc->conpwd_valid = of_getprop_uint32(phandle, "samsung,pin-conpwd", &gc->conpwd) == 0;
    136 	gc->pudpwd_valid = of_getprop_uint32(phandle, "samsung,pin-pudpwd", &gc->pudpwd) == 0;
    137 }
    138 
    139 static int
    140 exynos_parse_pin(const char *pinname)
    141 {
    142 
    143 	const int len = strlen(pinname);
    144 
    145 	if (len == 0)
    146 		return -1;
    147 
    148 	if (pinname[len - 1] < '0' || pinname[len - 1] > '9')
    149 		return -1;
    150 
    151 	return pinname[len - 1] - '0';
    152 }
    153 
    154 static int
    155 exynos_do_config(struct exynos_pinctrl_config *pc)
    156 {
    157 	struct exynos_gpio_pin_cfg *gc = &pc->pc_pincfg;
    158 	struct exynos_gpio_bank *bank;
    159 	const char *pins;
    160 	int pin;
    161 
    162 	int pins_len = OF_getproplen(pc->pc_phandle, "samsung,pins");
    163 	if (pins_len <= 0)
    164 		return -1;
    165 
    166 	for (pins = fdtbus_get_string(pc->pc_phandle, "samsung,pins");
    167 	     pins_len > 0;
    168 	     pins_len -= strlen(pins) + 1, pins += strlen(pins) + 1) {
    169 		bank = exynos_gpio_bank_lookup(pins);
    170 		pin = exynos_parse_pin(pins);
    171 		if (bank == NULL) {
    172 			aprint_error_dev(pc->pc_sc->sc_dev,
    173 			    "unknown pin name '%s'\n", pins);
    174 			continue;
    175 		}
    176 		exynos_gpio_pin_ctl_write(bank, gc, pin);
    177 	}
    178 
    179 	return 0;
    180 }
    181 
    182 static int
    183 exynos_pinctrl_set_cfg(device_t dev, const void *data, size_t len)
    184 {
    185 	struct exynos_pinctrl_config pc;
    186 
    187 	if (len != 4)
    188 		return -1;
    189 
    190 	pc.pc_phandle = fdtbus_get_phandle_from_native(be32dec(data));
    191 	pc.pc_sc = device_private(dev);
    192 	exynos_parse_config(pc.pc_phandle, &pc.pc_pincfg);
    193 
    194 	return exynos_do_config(&pc);
    195 }
    196