sni_gpio.c revision 1.9 1 1.9 thorpej /* $NetBSD: sni_gpio.c,v 1.9 2021/01/27 03:10:19 thorpej Exp $ */
2 1.1 nisimura
3 1.1 nisimura /*-
4 1.1 nisimura * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 1.1 nisimura * All rights reserved.
6 1.1 nisimura *
7 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation
8 1.1 nisimura * by Tohru Nishimura.
9 1.1 nisimura *
10 1.1 nisimura * Redistribution and use in source and binary forms, with or without
11 1.1 nisimura * modification, are permitted provided that the following conditions
12 1.1 nisimura * are met:
13 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
14 1.1 nisimura * notice, this list of conditions and the following disclaimer.
15 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
17 1.1 nisimura * documentation and/or other materials provided with the distribution.
18 1.1 nisimura *
19 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
30 1.1 nisimura */
31 1.1 nisimura
32 1.1 nisimura /*
33 1.1 nisimura * Socionext SC2A11 SynQuacer GPIO driver
34 1.1 nisimura */
35 1.1 nisimura
36 1.1 nisimura #include <sys/cdefs.h>
37 1.9 thorpej __KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.9 2021/01/27 03:10:19 thorpej Exp $");
38 1.1 nisimura
39 1.1 nisimura #include <sys/param.h>
40 1.1 nisimura #include <sys/device.h>
41 1.1 nisimura #include <sys/systm.h>
42 1.1 nisimura #include <sys/gpio.h>
43 1.1 nisimura #include <sys/kernel.h>
44 1.1 nisimura #include <sys/systm.h>
45 1.1 nisimura
46 1.1 nisimura #include <machine/endian.h>
47 1.1 nisimura #include <sys/bus.h>
48 1.1 nisimura #include <sys/intr.h>
49 1.1 nisimura
50 1.1 nisimura #include <dev/gpio/gpiovar.h>
51 1.1 nisimura #include <dev/fdt/fdtvar.h>
52 1.2 nisimura #include <dev/acpi/acpireg.h>
53 1.2 nisimura #include <dev/acpi/acpivar.h>
54 1.2 nisimura #include <dev/acpi/acpi_intr.h>
55 1.2 nisimura
56 1.2 nisimura static int snigpio_fdt_match(device_t, struct cfdata *, void *);
57 1.2 nisimura static void snigpio_fdt_attach(device_t, device_t, void *);
58 1.2 nisimura static int snigpio_acpi_match(device_t, struct cfdata *, void *);
59 1.2 nisimura static void snigpio_acpi_attach(device_t, device_t, void *);
60 1.1 nisimura
61 1.1 nisimura struct snigpio_softc {
62 1.1 nisimura device_t sc_dev;
63 1.1 nisimura bus_space_tag_t sc_iot;
64 1.1 nisimura bus_space_handle_t sc_ioh;
65 1.1 nisimura bus_addr_t sc_iob;
66 1.1 nisimura bus_size_t sc_ios;
67 1.3 nisimura void *sc_ih;
68 1.1 nisimura kmutex_t sc_lock;
69 1.1 nisimura struct gpio_chipset_tag sc_gpio_gc;
70 1.1 nisimura gpio_pin_t sc_gpio_pins[32];
71 1.1 nisimura int sc_maxpins;
72 1.1 nisimura int sc_phandle;
73 1.1 nisimura };
74 1.1 nisimura
75 1.2 nisimura CFATTACH_DECL_NEW(snigpio_fdt, sizeof(struct snigpio_softc),
76 1.2 nisimura snigpio_fdt_match, snigpio_fdt_attach, NULL, NULL);
77 1.2 nisimura
78 1.2 nisimura CFATTACH_DECL_NEW(snigpio_acpi, sizeof(struct snigpio_softc),
79 1.2 nisimura snigpio_acpi_match, snigpio_acpi_attach, NULL, NULL);
80 1.2 nisimura
81 1.3 nisimura /*
82 1.3 nisimura * "DevelopmentBox" implementation
83 1.3 nisimura * DSW3-PIN1, DSW3-PIN2, DSW3-PIN3, DSW3-PIN4,
84 1.3 nisimura * DSW3-PIN5, DSW3-PIN6, DSW3-PIN7, DSW3-PIN8,
85 1.5 nisimura * PSIN#, PWROFF#, GPIO-A, GPIO-B,
86 1.5 nisimura * GPIO-C, GPIO-D, PCIE1EXTINT, PCIE0EXTINT,
87 1.5 nisimura * PHY2-INT#, PHY1-INT#, GPIO-E, GPIO-F,
88 1.5 nisimura * GPIO-G, GPIO-H, GPIO-I, GPIO-J,
89 1.5 nisimura * GPIO-K, GPIO-L, PEC-PD26, PEC-PD27,
90 1.5 nisimura * PEC-PD28, PEC-PD29, PEC-PD30, PEC-PD31
91 1.4 nisimura *
92 1.4 nisimura * DSW3-PIN1 -- what's "varstore" really this
93 1.4 nisimura * DSW3-PIN3 -- tweek PCIe bus implementation error toggle
94 1.5 nisimura * PowerButton (PWROFF#) can be detectable.
95 1.4 nisimura *
96 1.4 nisimura * 96board mezzanine
97 1.4 nisimura * i2c "/i2c@51221000"
98 1.4 nisimura * spi "/spi@54810000"
99 1.5 nisimura * gpio "/gpio@51000000" pinA-L (10-25) down edge sensitive
100 1.3 nisimura */
101 1.2 nisimura static void snigpio_attach_i(struct snigpio_softc *);
102 1.3 nisimura static int snigpio_intr(void *);
103 1.1 nisimura
104 1.9 thorpej static const struct device_compatible_entry compat_data[] = {
105 1.9 thorpej { .compat = "socionext,synquacer-gpio" },
106 1.9 thorpej { .compat = "fujitsu,mb86s70-gpio" },
107 1.9 thorpej DEVICE_COMPAT_EOL
108 1.9 thorpej };
109 1.9 thorpej
110 1.1 nisimura static int
111 1.2 nisimura snigpio_fdt_match(device_t parent, struct cfdata *match, void *aux)
112 1.1 nisimura {
113 1.1 nisimura struct fdt_attach_args * const faa = aux;
114 1.1 nisimura
115 1.9 thorpej return of_compatible_match(faa->faa_phandle, compat_data);
116 1.1 nisimura }
117 1.1 nisimura
118 1.1 nisimura static void
119 1.2 nisimura snigpio_fdt_attach(device_t parent, device_t self, void *aux)
120 1.1 nisimura {
121 1.1 nisimura struct snigpio_softc * const sc = device_private(self);
122 1.1 nisimura struct fdt_attach_args * const faa = aux;
123 1.1 nisimura const int phandle = faa->faa_phandle;
124 1.1 nisimura bus_space_handle_t ioh;
125 1.1 nisimura bus_addr_t addr;
126 1.1 nisimura bus_size_t size;
127 1.3 nisimura char intrstr[128];
128 1.6 nisimura const char *list;
129 1.1 nisimura
130 1.3 nisimura if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0
131 1.3 nisimura || bus_space_map(faa->faa_bst, addr, size, 0, &ioh) != 0) {
132 1.3 nisimura aprint_error(": unable to map device\n");
133 1.1 nisimura return;
134 1.1 nisimura }
135 1.3 nisimura if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
136 1.3 nisimura aprint_error(": failed to decode interrupt\n");
137 1.3 nisimura goto fail;
138 1.3 nisimura }
139 1.3 nisimura sc->sc_ih = fdtbus_intr_establish(phandle,
140 1.3 nisimura 0, IPL_VM, 0, snigpio_intr, sc);
141 1.3 nisimura if (sc->sc_ih == NULL) {
142 1.3 nisimura aprint_error_dev(self, "couldn't establish interrupt\n");
143 1.3 nisimura goto fail;
144 1.1 nisimura }
145 1.1 nisimura
146 1.3 nisimura aprint_naive("\n");
147 1.7 nisimura aprint_normal_dev(self, "Socionext GPIO controller\n");
148 1.3 nisimura aprint_normal_dev(self, "interrupting on %s\n", intrstr);
149 1.6 nisimura list = fdtbus_get_string(phandle, "gpio-line-names");
150 1.6 nisimura if (list)
151 1.6 nisimura aprint_normal_dev(self, "%s\n", list);
152 1.3 nisimura
153 1.1 nisimura sc->sc_dev = self;
154 1.1 nisimura sc->sc_phandle = phandle;
155 1.1 nisimura sc->sc_iot = faa->faa_bst;
156 1.1 nisimura sc->sc_ioh = ioh;
157 1.1 nisimura sc->sc_iob = addr;
158 1.1 nisimura sc->sc_ios = size;
159 1.2 nisimura
160 1.2 nisimura snigpio_attach_i(sc);
161 1.2 nisimura
162 1.2 nisimura return;
163 1.3 nisimura fail:
164 1.3 nisimura bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
165 1.3 nisimura return;
166 1.2 nisimura }
167 1.2 nisimura
168 1.2 nisimura static int
169 1.2 nisimura snigpio_acpi_match(device_t parent, struct cfdata *match, void *aux)
170 1.2 nisimura {
171 1.2 nisimura static const char * compatible[] = {
172 1.2 nisimura "SCX0007",
173 1.2 nisimura NULL
174 1.2 nisimura };
175 1.2 nisimura struct acpi_attach_args *aa = aux;
176 1.2 nisimura
177 1.2 nisimura if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
178 1.2 nisimura return 0;
179 1.2 nisimura return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
180 1.2 nisimura }
181 1.2 nisimura
182 1.2 nisimura static void
183 1.2 nisimura snigpio_acpi_attach(device_t parent, device_t self, void *aux)
184 1.2 nisimura {
185 1.2 nisimura struct snigpio_softc * const sc = device_private(self);
186 1.2 nisimura struct acpi_attach_args *aa = aux;
187 1.4 nisimura ACPI_HANDLE handle = aa->aa_node->ad_handle;
188 1.2 nisimura bus_space_handle_t ioh;
189 1.2 nisimura struct acpi_resources res;
190 1.2 nisimura struct acpi_mem *mem;
191 1.2 nisimura struct acpi_irq *irq;
192 1.2 nisimura ACPI_STATUS rv;
193 1.4 nisimura char *list;
194 1.2 nisimura
195 1.2 nisimura rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
196 1.2 nisimura &res, &acpi_resource_parse_ops_default);
197 1.2 nisimura if (ACPI_FAILURE(rv))
198 1.2 nisimura return;
199 1.2 nisimura mem = acpi_res_mem(&res, 0);
200 1.2 nisimura irq = acpi_res_irq(&res, 0);
201 1.3 nisimura if (mem == NULL || irq == NULL || mem->ar_length == 0) {
202 1.2 nisimura aprint_error(": incomplete resources\n");
203 1.2 nisimura return;
204 1.2 nisimura }
205 1.2 nisimura if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0,
206 1.2 nisimura &ioh)) {
207 1.2 nisimura aprint_error(": couldn't map registers\n");
208 1.2 nisimura return;
209 1.2 nisimura }
210 1.3 nisimura sc->sc_ih = acpi_intr_establish(self,
211 1.3 nisimura (uint64_t)(uintptr_t)aa->aa_node->ad_handle,
212 1.3 nisimura IPL_VM, false, snigpio_intr, sc, device_xname(self));
213 1.3 nisimura if (sc->sc_ih == NULL) {
214 1.3 nisimura aprint_error_dev(self, "couldn't establish interrupt\n");
215 1.3 nisimura goto fail;
216 1.3 nisimura }
217 1.2 nisimura
218 1.6 nisimura aprint_normal_dev(self, "Socionext GPIO controller\n");
219 1.6 nisimura rv = acpi_dsd_string(handle, "gpio-line-names", &list);
220 1.6 nisimura if (ACPI_SUCCESS(rv))
221 1.6 nisimura aprint_normal_dev(self, "%s\n", list);
222 1.6 nisimura
223 1.2 nisimura sc->sc_dev = self;
224 1.2 nisimura sc->sc_iot = aa->aa_memt;
225 1.2 nisimura sc->sc_ioh = ioh;
226 1.2 nisimura sc->sc_ios = mem->ar_length;
227 1.2 nisimura
228 1.5 nisimura snigpio_attach_i(sc);
229 1.5 nisimura
230 1.3 nisimura acpi_resource_cleanup(&res);
231 1.3 nisimura return;
232 1.3 nisimura fail:
233 1.3 nisimura acpi_resource_cleanup(&res);
234 1.3 nisimura bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
235 1.3 nisimura return;
236 1.2 nisimura }
237 1.2 nisimura
238 1.2 nisimura static void
239 1.2 nisimura snigpio_attach_i(struct snigpio_softc *sc)
240 1.2 nisimura {
241 1.3 nisimura struct gpio_chipset_tag *gc;
242 1.2 nisimura struct gpiobus_attach_args gba;
243 1.2 nisimura
244 1.1 nisimura mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
245 1.1 nisimura sc->sc_maxpins = 32;
246 1.1 nisimura
247 1.1 nisimura /* create controller tag */
248 1.3 nisimura gc = &sc->sc_gpio_gc;
249 1.3 nisimura gc->gp_cookie = sc;
250 1.3 nisimura gc->gp_pin_read = NULL; /* AAA */
251 1.3 nisimura gc->gp_pin_write = NULL; /* AAA */
252 1.3 nisimura gc->gp_pin_ctl = NULL; /* AAA */
253 1.3 nisimura gc->gp_intr_establish = NULL; /* AAA */
254 1.3 nisimura gc->gp_intr_disestablish = NULL; /* AAA */
255 1.3 nisimura gc->gp_intr_str = NULL; /* AAA */
256 1.1 nisimura
257 1.3 nisimura gba.gba_gc = gc;
258 1.1 nisimura gba.gba_pins = &sc->sc_gpio_pins[0];
259 1.1 nisimura gba.gba_npins = sc->sc_maxpins;
260 1.1 nisimura
261 1.2 nisimura (void) config_found_ia(sc->sc_dev, "gpiobus", &gba, gpiobus_print);
262 1.1 nisimura }
263 1.3 nisimura
264 1.3 nisimura static int
265 1.3 nisimura snigpio_intr(void *arg)
266 1.3 nisimura {
267 1.3 nisimura return 1;
268 1.3 nisimura }
269