sni_gpio.c revision 1.1 1 /* $NetBSD: sni_gpio.c,v 1.1 2020/03/18 08:51:08 nisimura Exp $ */
2
3 /*-
4 * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tohru Nishimura.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Socionext SC2A11 SynQuacer GPIO driver
34 */
35
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.1 2020/03/18 08:51:08 nisimura Exp $");
38
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/systm.h>
42 #include <sys/gpio.h>
43 #include <sys/kernel.h>
44 #include <sys/systm.h>
45
46 #include <machine/endian.h>
47 #include <sys/bus.h>
48 #include <sys/intr.h>
49
50 #include <dev/gpio/gpiovar.h>
51 #include <dev/fdt/fdtvar.h>
52
53 static int snigpio_match(device_t, struct cfdata *, void *);
54 static void snigpio_attach(device_t, device_t, void *);
55
56 struct snigpio_softc {
57 device_t sc_dev;
58 bus_space_tag_t sc_iot;
59 bus_space_handle_t sc_ioh;
60 bus_addr_t sc_iob;
61 bus_size_t sc_ios;
62 kmutex_t sc_lock;
63 struct gpio_chipset_tag sc_gpio_gc;
64 gpio_pin_t sc_gpio_pins[32];
65 int sc_maxpins;
66 int sc_phandle;
67 };
68
69 CFATTACH_DECL_NEW(snigpio, sizeof(struct snigpio_softc),
70 snigpio_match, snigpio_attach, NULL, NULL);
71
72 static int
73 snigpio_match(device_t parent, struct cfdata *match, void *aux)
74 {
75 static const char * compatible[] = {
76 "socionext,synquacer-gpio",
77 "fujitsu,mb86s70-gpio",
78 NULL
79 };
80 struct fdt_attach_args * const faa = aux;
81
82 return of_match_compatible(faa->faa_phandle, compatible);
83 }
84
85 static void
86 snigpio_attach(device_t parent, device_t self, void *aux)
87 {
88 struct snigpio_softc * const sc = device_private(self);
89 struct fdt_attach_args * const faa = aux;
90 prop_dictionary_t dict = device_properties(self);
91 const int phandle = faa->faa_phandle;
92 struct gpiobus_attach_args gba;
93 bus_space_handle_t ioh;
94 bus_addr_t addr;
95 bus_size_t size;
96 _Bool disable;
97 int error;
98
99 prop_dictionary_get_bool(dict, "disable", &disable);
100 if (disable) {
101 aprint_naive(": disabled\n");
102 aprint_normal(": disabled\n");
103 return;
104 }
105 error = fdtbus_get_reg(phandle, 0, &addr, &size);
106 if (error) {
107 aprint_error(": couldn't get registers\n");
108 return;
109 }
110 error = bus_space_map(faa->faa_bst, addr, size, 0, &ioh);
111 if (error) {
112 aprint_error(": unable to map device\n");
113 return;
114 }
115
116 aprint_naive(": GPIO controller\n");
117 aprint_normal(": GPIO controller\n");
118
119 sc->sc_dev = self;
120 sc->sc_phandle = phandle;
121 sc->sc_iot = faa->faa_bst;
122 sc->sc_ioh = ioh;
123 sc->sc_iob = addr;
124 sc->sc_ios = size;
125 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
126 sc->sc_maxpins = 32;
127
128 /* create controller tag */
129 sc->sc_gpio_gc.gp_cookie = sc;
130 sc->sc_gpio_gc.gp_pin_read = NULL; /* AAA */
131 sc->sc_gpio_gc.gp_pin_write = NULL; /* AAA */
132 sc->sc_gpio_gc.gp_pin_ctl = NULL; /* AAA */
133 sc->sc_gpio_gc.gp_intr_establish = NULL; /* AAA */
134 sc->sc_gpio_gc.gp_intr_disestablish = NULL; /* AAA */
135 sc->sc_gpio_gc.gp_intr_str = NULL; /* AAA */
136
137 gba.gba_gc = &sc->sc_gpio_gc;
138 gba.gba_pins = &sc->sc_gpio_pins[0];
139 gba.gba_npins = sc->sc_maxpins;
140 (void) config_found_ia(self, "gpiobus", &gba, gpiobus_print);
141
142 return;
143 }
144