sni_gpio.c revision 1.3
1 /* $NetBSD: sni_gpio.c,v 1.3 2020/03/24 11:40:08 nisimura Exp $ */ 2 3 /*- 4 * Copyright (c) 2020 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tohru Nishimura. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Socionext SC2A11 SynQuacer GPIO driver 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.3 2020/03/24 11:40:08 nisimura Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/systm.h> 42 #include <sys/gpio.h> 43 #include <sys/kernel.h> 44 #include <sys/systm.h> 45 46 #include <machine/endian.h> 47 #include <sys/bus.h> 48 #include <sys/intr.h> 49 50 #include <dev/gpio/gpiovar.h> 51 #include <dev/fdt/fdtvar.h> 52 #include <dev/acpi/acpireg.h> 53 #include <dev/acpi/acpivar.h> 54 #include <dev/acpi/acpi_intr.h> 55 56 static int snigpio_fdt_match(device_t, struct cfdata *, void *); 57 static void snigpio_fdt_attach(device_t, device_t, void *); 58 static int snigpio_acpi_match(device_t, struct cfdata *, void *); 59 static void snigpio_acpi_attach(device_t, device_t, void *); 60 61 struct snigpio_softc { 62 device_t sc_dev; 63 bus_space_tag_t sc_iot; 64 bus_space_handle_t sc_ioh; 65 bus_addr_t sc_iob; 66 bus_size_t sc_ios; 67 void *sc_ih; 68 kmutex_t sc_lock; 69 struct gpio_chipset_tag sc_gpio_gc; 70 gpio_pin_t sc_gpio_pins[32]; 71 int sc_maxpins; 72 int sc_phandle; 73 }; 74 75 CFATTACH_DECL_NEW(snigpio_fdt, sizeof(struct snigpio_softc), 76 snigpio_fdt_match, snigpio_fdt_attach, NULL, NULL); 77 78 CFATTACH_DECL_NEW(snigpio_acpi, sizeof(struct snigpio_softc), 79 snigpio_acpi_match, snigpio_acpi_attach, NULL, NULL); 80 81 /* 82 * "DevelopmentBox" implementation 83 * DSW3-PIN1, DSW3-PIN2, DSW3-PIN3, DSW3-PIN4, 84 * DSW3-PIN5, DSW3-PIN6, DSW3-PIN7, DSW3-PIN8, 85 * PEC-PD8, PEC-PD9, PEC-PD10, PEC-PD11, 86 * NC, NC, PCIE1EXTINT, PCIE0EXTINT, 87 * PHY_P2_2, PHY_P1_2, NC, NC, 88 * NC, NC, NC, NC, 89 * NC, NC, PEC-PD26, PEC-PD27, 90 * PEC-PD28, PEC-PD29, PEC-PD30, PEC-PD31; 91 */ 92 static void snigpio_attach_i(struct snigpio_softc *); 93 static int snigpio_intr(void *); 94 95 static int 96 snigpio_fdt_match(device_t parent, struct cfdata *match, void *aux) 97 { 98 static const char * compatible[] = { 99 "socionext,synquacer-gpio", 100 "fujitsu,mb86s70-gpio", 101 NULL 102 }; 103 struct fdt_attach_args * const faa = aux; 104 105 return of_match_compatible(faa->faa_phandle, compatible); 106 } 107 108 static void 109 snigpio_fdt_attach(device_t parent, device_t self, void *aux) 110 { 111 struct snigpio_softc * const sc = device_private(self); 112 struct fdt_attach_args * const faa = aux; 113 prop_dictionary_t dict = device_properties(self); 114 const int phandle = faa->faa_phandle; 115 bus_space_handle_t ioh; 116 bus_addr_t addr; 117 bus_size_t size; 118 char intrstr[128]; 119 _Bool disable; 120 121 prop_dictionary_get_bool(dict, "disable", &disable); 122 if (disable) { 123 aprint_naive(": disabled\n"); 124 aprint_normal(": disabled\n"); 125 return; 126 } 127 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0 128 || bus_space_map(faa->faa_bst, addr, size, 0, &ioh) != 0) { 129 aprint_error(": unable to map device\n"); 130 return; 131 } 132 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 133 aprint_error(": failed to decode interrupt\n"); 134 goto fail; 135 } 136 sc->sc_ih = fdtbus_intr_establish(phandle, 137 0, IPL_VM, 0, snigpio_intr, sc); 138 if (sc->sc_ih == NULL) { 139 aprint_error_dev(self, "couldn't establish interrupt\n"); 140 goto fail; 141 } 142 143 aprint_naive("\n"); 144 aprint_normal(": GPIO controller\n"); 145 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 146 147 sc->sc_dev = self; 148 sc->sc_phandle = phandle; 149 sc->sc_iot = faa->faa_bst; 150 sc->sc_ioh = ioh; 151 sc->sc_iob = addr; 152 sc->sc_ios = size; 153 154 snigpio_attach_i(sc); 155 156 /* dig FDT description to show 32 of GPIO line usage */ 157 /* DIPSW3 1-8 usage remain unclear */ 158 159 return; 160 fail: 161 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 162 return; 163 } 164 165 static int 166 snigpio_acpi_match(device_t parent, struct cfdata *match, void *aux) 167 { 168 static const char * compatible[] = { 169 "SCX0007", 170 NULL 171 }; 172 struct acpi_attach_args *aa = aux; 173 174 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE) 175 return 0; 176 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible); 177 } 178 179 static void 180 snigpio_acpi_attach(device_t parent, device_t self, void *aux) 181 { 182 struct snigpio_softc * const sc = device_private(self); 183 struct acpi_attach_args *aa = aux; 184 bus_space_handle_t ioh; 185 struct acpi_resources res; 186 struct acpi_mem *mem; 187 struct acpi_irq *irq; 188 ACPI_STATUS rv; 189 190 rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS", 191 &res, &acpi_resource_parse_ops_default); 192 if (ACPI_FAILURE(rv)) 193 return; 194 mem = acpi_res_mem(&res, 0); 195 irq = acpi_res_irq(&res, 0); 196 if (mem == NULL || irq == NULL || mem->ar_length == 0) { 197 aprint_error(": incomplete resources\n"); 198 return; 199 } 200 if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0, 201 &ioh)) { 202 aprint_error(": couldn't map registers\n"); 203 return; 204 } 205 sc->sc_ih = acpi_intr_establish(self, 206 (uint64_t)(uintptr_t)aa->aa_node->ad_handle, 207 IPL_VM, false, snigpio_intr, sc, device_xname(self)); 208 if (sc->sc_ih == NULL) { 209 aprint_error_dev(self, "couldn't establish interrupt\n"); 210 goto fail; 211 } 212 213 sc->sc_dev = self; 214 sc->sc_iot = aa->aa_memt; 215 sc->sc_ioh = ioh; 216 sc->sc_ios = mem->ar_length; 217 218 snigpio_attach_i(sc); 219 220 /* dig _DSD property to show 32 of GPIO line usage */ 221 /* DIPSW3 1-8 usage remain unclear */ 222 223 acpi_resource_cleanup(&res); 224 return; 225 fail: 226 acpi_resource_cleanup(&res); 227 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 228 return; 229 } 230 231 static void 232 snigpio_attach_i(struct snigpio_softc *sc) 233 { 234 struct gpio_chipset_tag *gc; 235 struct gpiobus_attach_args gba; 236 237 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM); 238 sc->sc_maxpins = 32; 239 240 /* create controller tag */ 241 gc = &sc->sc_gpio_gc; 242 gc->gp_cookie = sc; 243 gc->gp_pin_read = NULL; /* AAA */ 244 gc->gp_pin_write = NULL; /* AAA */ 245 gc->gp_pin_ctl = NULL; /* AAA */ 246 gc->gp_intr_establish = NULL; /* AAA */ 247 gc->gp_intr_disestablish = NULL; /* AAA */ 248 gc->gp_intr_str = NULL; /* AAA */ 249 250 gba.gba_gc = gc; 251 gba.gba_pins = &sc->sc_gpio_pins[0]; 252 gba.gba_npins = sc->sc_maxpins; 253 254 (void) config_found_ia(sc->sc_dev, "gpiobus", &gba, gpiobus_print); 255 } 256 257 static int 258 snigpio_intr(void *arg) 259 { 260 return 1; 261 } 262
Indexes created Tue Sep 30 10:09:55 GMT 2025