sni_gpio.c revision 1.5 1 /* $NetBSD: sni_gpio.c,v 1.5 2020/03/25 19:03:44 nisimura Exp $ */
2
3 /*-
4 * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tohru Nishimura.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Socionext SC2A11 SynQuacer GPIO driver
34 */
35
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.5 2020/03/25 19:03:44 nisimura Exp $");
38
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/systm.h>
42 #include <sys/gpio.h>
43 #include <sys/kernel.h>
44 #include <sys/systm.h>
45
46 #include <machine/endian.h>
47 #include <sys/bus.h>
48 #include <sys/intr.h>
49
50 #include <dev/gpio/gpiovar.h>
51 #include <dev/fdt/fdtvar.h>
52 #include <dev/acpi/acpireg.h>
53 #include <dev/acpi/acpivar.h>
54 #include <dev/acpi/acpi_intr.h>
55
56 static int snigpio_fdt_match(device_t, struct cfdata *, void *);
57 static void snigpio_fdt_attach(device_t, device_t, void *);
58 static int snigpio_acpi_match(device_t, struct cfdata *, void *);
59 static void snigpio_acpi_attach(device_t, device_t, void *);
60
61 struct snigpio_softc {
62 device_t sc_dev;
63 bus_space_tag_t sc_iot;
64 bus_space_handle_t sc_ioh;
65 bus_addr_t sc_iob;
66 bus_size_t sc_ios;
67 void *sc_ih;
68 kmutex_t sc_lock;
69 struct gpio_chipset_tag sc_gpio_gc;
70 gpio_pin_t sc_gpio_pins[32];
71 int sc_maxpins;
72 int sc_phandle;
73 };
74
75 CFATTACH_DECL_NEW(snigpio_fdt, sizeof(struct snigpio_softc),
76 snigpio_fdt_match, snigpio_fdt_attach, NULL, NULL);
77
78 CFATTACH_DECL_NEW(snigpio_acpi, sizeof(struct snigpio_softc),
79 snigpio_acpi_match, snigpio_acpi_attach, NULL, NULL);
80
81 /*
82 * "DevelopmentBox" implementation
83 * DSW3-PIN1, DSW3-PIN2, DSW3-PIN3, DSW3-PIN4,
84 * DSW3-PIN5, DSW3-PIN6, DSW3-PIN7, DSW3-PIN8,
85 * PSIN#, PWROFF#, GPIO-A, GPIO-B,
86 * GPIO-C, GPIO-D, PCIE1EXTINT, PCIE0EXTINT,
87 * PHY2-INT#, PHY1-INT#, GPIO-E, GPIO-F,
88 * GPIO-G, GPIO-H, GPIO-I, GPIO-J,
89 * GPIO-K, GPIO-L, PEC-PD26, PEC-PD27,
90 * PEC-PD28, PEC-PD29, PEC-PD30, PEC-PD31
91 *
92 * DSW3-PIN1 -- what's "varstore" really this
93 * DSW3-PIN3 -- tweek PCIe bus implementation error toggle
94 * PowerButton (PWROFF#) can be detectable.
95 *
96 * 96board mezzanine
97 * i2c "/i2c@51221000"
98 * spi "/spi@54810000"
99 * gpio "/gpio@51000000" pinA-L (10-25) down edge sensitive
100 */
101 static void snigpio_attach_i(struct snigpio_softc *);
102 static int snigpio_intr(void *);
103
104 static int
105 snigpio_fdt_match(device_t parent, struct cfdata *match, void *aux)
106 {
107 static const char * compatible[] = {
108 "socionext,synquacer-gpio",
109 "fujitsu,mb86s70-gpio",
110 NULL
111 };
112 struct fdt_attach_args * const faa = aux;
113
114 return of_match_compatible(faa->faa_phandle, compatible);
115 }
116
117 static void
118 snigpio_fdt_attach(device_t parent, device_t self, void *aux)
119 {
120 struct snigpio_softc * const sc = device_private(self);
121 struct fdt_attach_args * const faa = aux;
122 prop_dictionary_t dict = device_properties(self);
123 const int phandle = faa->faa_phandle;
124 bus_space_handle_t ioh;
125 bus_addr_t addr;
126 bus_size_t size;
127 char intrstr[128];
128 _Bool disable;
129
130 prop_dictionary_get_bool(dict, "disable", &disable);
131 if (disable) {
132 aprint_naive(": disabled\n");
133 aprint_normal(": disabled\n");
134 return;
135 }
136 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0
137 || bus_space_map(faa->faa_bst, addr, size, 0, &ioh) != 0) {
138 aprint_error(": unable to map device\n");
139 return;
140 }
141 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
142 aprint_error(": failed to decode interrupt\n");
143 goto fail;
144 }
145 sc->sc_ih = fdtbus_intr_establish(phandle,
146 0, IPL_VM, 0, snigpio_intr, sc);
147 if (sc->sc_ih == NULL) {
148 aprint_error_dev(self, "couldn't establish interrupt\n");
149 goto fail;
150 }
151
152 aprint_naive("\n");
153 aprint_normal(": GPIO controller\n");
154 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
155
156 sc->sc_dev = self;
157 sc->sc_phandle = phandle;
158 sc->sc_iot = faa->faa_bst;
159 sc->sc_ioh = ioh;
160 sc->sc_iob = addr;
161 sc->sc_ios = size;
162
163 snigpio_attach_i(sc);
164
165 /* dig FDT description to show 32 of GPIO line usage */
166
167 return;
168 fail:
169 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
170 return;
171 }
172
173 static int
174 snigpio_acpi_match(device_t parent, struct cfdata *match, void *aux)
175 {
176 static const char * compatible[] = {
177 "SCX0007",
178 NULL
179 };
180 struct acpi_attach_args *aa = aux;
181
182 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
183 return 0;
184 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
185 }
186
187 static void
188 snigpio_acpi_attach(device_t parent, device_t self, void *aux)
189 {
190 struct snigpio_softc * const sc = device_private(self);
191 struct acpi_attach_args *aa = aux;
192 ACPI_HANDLE handle = aa->aa_node->ad_handle;
193 bus_space_handle_t ioh;
194 struct acpi_resources res;
195 struct acpi_mem *mem;
196 struct acpi_irq *irq;
197 ACPI_STATUS rv;
198 char *list;
199
200 rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
201 &res, &acpi_resource_parse_ops_default);
202 if (ACPI_FAILURE(rv))
203 return;
204 mem = acpi_res_mem(&res, 0);
205 irq = acpi_res_irq(&res, 0);
206 if (mem == NULL || irq == NULL || mem->ar_length == 0) {
207 aprint_error(": incomplete resources\n");
208 return;
209 }
210 if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0,
211 &ioh)) {
212 aprint_error(": couldn't map registers\n");
213 return;
214 }
215 sc->sc_ih = acpi_intr_establish(self,
216 (uint64_t)(uintptr_t)aa->aa_node->ad_handle,
217 IPL_VM, false, snigpio_intr, sc, device_xname(self));
218 if (sc->sc_ih == NULL) {
219 aprint_error_dev(self, "couldn't establish interrupt\n");
220 goto fail;
221 }
222
223 sc->sc_dev = self;
224 sc->sc_iot = aa->aa_memt;
225 sc->sc_ioh = ioh;
226 sc->sc_ios = mem->ar_length;
227
228 snigpio_attach_i(sc);
229
230 /* dig _DSD property to show 32 of GPIO line usage */
231 rv = acpi_dsd_string(handle, "gpio-line-names", &list);
232 if (ACPI_SUCCESS(rv))
233 aprint_normal_dev(self, "%s\n", list);
234
235 acpi_resource_cleanup(&res);
236 return;
237 fail:
238 acpi_resource_cleanup(&res);
239 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
240 return;
241 }
242
243 static void
244 snigpio_attach_i(struct snigpio_softc *sc)
245 {
246 struct gpio_chipset_tag *gc;
247 struct gpiobus_attach_args gba;
248
249 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
250 sc->sc_maxpins = 32;
251
252 /* create controller tag */
253 gc = &sc->sc_gpio_gc;
254 gc->gp_cookie = sc;
255 gc->gp_pin_read = NULL; /* AAA */
256 gc->gp_pin_write = NULL; /* AAA */
257 gc->gp_pin_ctl = NULL; /* AAA */
258 gc->gp_intr_establish = NULL; /* AAA */
259 gc->gp_intr_disestablish = NULL; /* AAA */
260 gc->gp_intr_str = NULL; /* AAA */
261
262 gba.gba_gc = gc;
263 gba.gba_pins = &sc->sc_gpio_pins[0];
264 gba.gba_npins = sc->sc_maxpins;
265
266 (void) config_found_ia(sc->sc_dev, "gpiobus", &gba, gpiobus_print);
267 }
268
269 static int
270 snigpio_intr(void *arg)
271 {
272 return 1;
273 }
274