sni_gpio.c revision 1.9 1 /* $NetBSD: sni_gpio.c,v 1.9 2021/01/27 03:10:19 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tohru Nishimura.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Socionext SC2A11 SynQuacer GPIO driver
34 */
35
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: sni_gpio.c,v 1.9 2021/01/27 03:10:19 thorpej Exp $");
38
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/systm.h>
42 #include <sys/gpio.h>
43 #include <sys/kernel.h>
44 #include <sys/systm.h>
45
46 #include <machine/endian.h>
47 #include <sys/bus.h>
48 #include <sys/intr.h>
49
50 #include <dev/gpio/gpiovar.h>
51 #include <dev/fdt/fdtvar.h>
52 #include <dev/acpi/acpireg.h>
53 #include <dev/acpi/acpivar.h>
54 #include <dev/acpi/acpi_intr.h>
55
56 static int snigpio_fdt_match(device_t, struct cfdata *, void *);
57 static void snigpio_fdt_attach(device_t, device_t, void *);
58 static int snigpio_acpi_match(device_t, struct cfdata *, void *);
59 static void snigpio_acpi_attach(device_t, device_t, void *);
60
61 struct snigpio_softc {
62 device_t sc_dev;
63 bus_space_tag_t sc_iot;
64 bus_space_handle_t sc_ioh;
65 bus_addr_t sc_iob;
66 bus_size_t sc_ios;
67 void *sc_ih;
68 kmutex_t sc_lock;
69 struct gpio_chipset_tag sc_gpio_gc;
70 gpio_pin_t sc_gpio_pins[32];
71 int sc_maxpins;
72 int sc_phandle;
73 };
74
75 CFATTACH_DECL_NEW(snigpio_fdt, sizeof(struct snigpio_softc),
76 snigpio_fdt_match, snigpio_fdt_attach, NULL, NULL);
77
78 CFATTACH_DECL_NEW(snigpio_acpi, sizeof(struct snigpio_softc),
79 snigpio_acpi_match, snigpio_acpi_attach, NULL, NULL);
80
81 /*
82 * "DevelopmentBox" implementation
83 * DSW3-PIN1, DSW3-PIN2, DSW3-PIN3, DSW3-PIN4,
84 * DSW3-PIN5, DSW3-PIN6, DSW3-PIN7, DSW3-PIN8,
85 * PSIN#, PWROFF#, GPIO-A, GPIO-B,
86 * GPIO-C, GPIO-D, PCIE1EXTINT, PCIE0EXTINT,
87 * PHY2-INT#, PHY1-INT#, GPIO-E, GPIO-F,
88 * GPIO-G, GPIO-H, GPIO-I, GPIO-J,
89 * GPIO-K, GPIO-L, PEC-PD26, PEC-PD27,
90 * PEC-PD28, PEC-PD29, PEC-PD30, PEC-PD31
91 *
92 * DSW3-PIN1 -- what's "varstore" really this
93 * DSW3-PIN3 -- tweek PCIe bus implementation error toggle
94 * PowerButton (PWROFF#) can be detectable.
95 *
96 * 96board mezzanine
97 * i2c "/i2c@51221000"
98 * spi "/spi@54810000"
99 * gpio "/gpio@51000000" pinA-L (10-25) down edge sensitive
100 */
101 static void snigpio_attach_i(struct snigpio_softc *);
102 static int snigpio_intr(void *);
103
104 static const struct device_compatible_entry compat_data[] = {
105 { .compat = "socionext,synquacer-gpio" },
106 { .compat = "fujitsu,mb86s70-gpio" },
107 DEVICE_COMPAT_EOL
108 };
109
110 static int
111 snigpio_fdt_match(device_t parent, struct cfdata *match, void *aux)
112 {
113 struct fdt_attach_args * const faa = aux;
114
115 return of_compatible_match(faa->faa_phandle, compat_data);
116 }
117
118 static void
119 snigpio_fdt_attach(device_t parent, device_t self, void *aux)
120 {
121 struct snigpio_softc * const sc = device_private(self);
122 struct fdt_attach_args * const faa = aux;
123 const int phandle = faa->faa_phandle;
124 bus_space_handle_t ioh;
125 bus_addr_t addr;
126 bus_size_t size;
127 char intrstr[128];
128 const char *list;
129
130 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0
131 || bus_space_map(faa->faa_bst, addr, size, 0, &ioh) != 0) {
132 aprint_error(": unable to map device\n");
133 return;
134 }
135 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
136 aprint_error(": failed to decode interrupt\n");
137 goto fail;
138 }
139 sc->sc_ih = fdtbus_intr_establish(phandle,
140 0, IPL_VM, 0, snigpio_intr, sc);
141 if (sc->sc_ih == NULL) {
142 aprint_error_dev(self, "couldn't establish interrupt\n");
143 goto fail;
144 }
145
146 aprint_naive("\n");
147 aprint_normal_dev(self, "Socionext GPIO controller\n");
148 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
149 list = fdtbus_get_string(phandle, "gpio-line-names");
150 if (list)
151 aprint_normal_dev(self, "%s\n", list);
152
153 sc->sc_dev = self;
154 sc->sc_phandle = phandle;
155 sc->sc_iot = faa->faa_bst;
156 sc->sc_ioh = ioh;
157 sc->sc_iob = addr;
158 sc->sc_ios = size;
159
160 snigpio_attach_i(sc);
161
162 return;
163 fail:
164 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
165 return;
166 }
167
168 static int
169 snigpio_acpi_match(device_t parent, struct cfdata *match, void *aux)
170 {
171 static const char * compatible[] = {
172 "SCX0007",
173 NULL
174 };
175 struct acpi_attach_args *aa = aux;
176
177 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
178 return 0;
179 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
180 }
181
182 static void
183 snigpio_acpi_attach(device_t parent, device_t self, void *aux)
184 {
185 struct snigpio_softc * const sc = device_private(self);
186 struct acpi_attach_args *aa = aux;
187 ACPI_HANDLE handle = aa->aa_node->ad_handle;
188 bus_space_handle_t ioh;
189 struct acpi_resources res;
190 struct acpi_mem *mem;
191 struct acpi_irq *irq;
192 ACPI_STATUS rv;
193 char *list;
194
195 rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
196 &res, &acpi_resource_parse_ops_default);
197 if (ACPI_FAILURE(rv))
198 return;
199 mem = acpi_res_mem(&res, 0);
200 irq = acpi_res_irq(&res, 0);
201 if (mem == NULL || irq == NULL || mem->ar_length == 0) {
202 aprint_error(": incomplete resources\n");
203 return;
204 }
205 if (bus_space_map(aa->aa_memt, mem->ar_base, mem->ar_length, 0,
206 &ioh)) {
207 aprint_error(": couldn't map registers\n");
208 return;
209 }
210 sc->sc_ih = acpi_intr_establish(self,
211 (uint64_t)(uintptr_t)aa->aa_node->ad_handle,
212 IPL_VM, false, snigpio_intr, sc, device_xname(self));
213 if (sc->sc_ih == NULL) {
214 aprint_error_dev(self, "couldn't establish interrupt\n");
215 goto fail;
216 }
217
218 aprint_normal_dev(self, "Socionext GPIO controller\n");
219 rv = acpi_dsd_string(handle, "gpio-line-names", &list);
220 if (ACPI_SUCCESS(rv))
221 aprint_normal_dev(self, "%s\n", list);
222
223 sc->sc_dev = self;
224 sc->sc_iot = aa->aa_memt;
225 sc->sc_ioh = ioh;
226 sc->sc_ios = mem->ar_length;
227
228 snigpio_attach_i(sc);
229
230 acpi_resource_cleanup(&res);
231 return;
232 fail:
233 acpi_resource_cleanup(&res);
234 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
235 return;
236 }
237
238 static void
239 snigpio_attach_i(struct snigpio_softc *sc)
240 {
241 struct gpio_chipset_tag *gc;
242 struct gpiobus_attach_args gba;
243
244 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
245 sc->sc_maxpins = 32;
246
247 /* create controller tag */
248 gc = &sc->sc_gpio_gc;
249 gc->gp_cookie = sc;
250 gc->gp_pin_read = NULL; /* AAA */
251 gc->gp_pin_write = NULL; /* AAA */
252 gc->gp_pin_ctl = NULL; /* AAA */
253 gc->gp_intr_establish = NULL; /* AAA */
254 gc->gp_intr_disestablish = NULL; /* AAA */
255 gc->gp_intr_str = NULL; /* AAA */
256
257 gba.gba_gc = gc;
258 gba.gba_pins = &sc->sc_gpio_pins[0];
259 gba.gba_npins = sc->sc_maxpins;
260
261 (void) config_found_ia(sc->sc_dev, "gpiobus", &gba, gpiobus_print);
262 }
263
264 static int
265 snigpio_intr(void *arg)
266 {
267 return 1;
268 }
269