1 /* $NetBSD: sun50i_h6_r_ccu.c,v 1.3 2021/11/10 17:38:11 jakllsch Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 31 __KERNEL_RCSID(1, "$NetBSD: sun50i_h6_r_ccu.c,v 1.3 2021/11/10 17:38:11 jakllsch Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/device.h> 36 #include <sys/systm.h> 37 38 #include <dev/fdt/fdtvar.h> 39 40 #include <arm/sunxi/sunxi_ccu.h> 41 #include <arm/sunxi/sun50i_h6_r_ccu.h> 42 43 #define AR100_CFG_REG 0x00 44 #define APB1_CFG_REG 0x0c 45 #define APB2_CFG_REG 0x10 46 #define IR_CFG_REG 0x1c0 47 #define W1_CFG_REG 0x1e0 48 49 static int sun50i_h6_r_ccu_match(device_t, cfdata_t, void *); 50 static void sun50i_h6_r_ccu_attach(device_t, device_t, void *); 51 52 static const struct device_compatible_entry compat_data[] = { 53 { .compat = "allwinner,sun50i-h6-r-ccu" }, 54 DEVICE_COMPAT_EOL 55 }; 56 57 CFATTACH_DECL_NEW(sunxi_h6_r_ccu, sizeof(struct sunxi_ccu_softc), 58 sun50i_h6_r_ccu_match, sun50i_h6_r_ccu_attach, NULL, NULL); 59 60 static struct sunxi_ccu_reset sun50i_h6_r_ccu_resets[] = { 61 SUNXI_CCU_RESET(H6_R_RST_APB1_TIMER, 0x11c, 16), 62 SUNXI_CCU_RESET(H6_R_RST_APB1_TWD, 0x12c, 16), 63 SUNXI_CCU_RESET(H6_R_RST_APB1_PWM, 0x13c, 16), 64 SUNXI_CCU_RESET(H6_R_RST_APB2_UART, 0x18c, 16), 65 SUNXI_CCU_RESET(H6_R_RST_APB2_I2C, 0x19c, 16), 66 SUNXI_CCU_RESET(H6_R_RST_APB2_RSB, 0x1bc, 16), 67 SUNXI_CCU_RESET(H6_R_RST_APB1_IR, 0x1cc, 16), 68 SUNXI_CCU_RESET(H6_R_RST_APB1_W1, 0x1ec, 16), 69 }; 70 71 static const char *ar100_parents[] = { "hosc", "losc", "pll-periph", "iosc" }; 72 static const char *apb1_parents[] = { "ahb" }; 73 static const char *apb2_parents[] = { "hosc", "losc", "pll-periph", "iosc" }; 74 static const char *mod_parents[] = { "losc", "hosc" }; 75 76 static struct sunxi_ccu_clk sun50i_h6_r_ccu_clks[] = { 77 SUNXI_CCU_PREDIV(H6_R_CLK_AR100, "ar100", ar100_parents, 78 AR100_CFG_REG, /* reg */ 79 __BITS(4,0), /* prediv */ 80 __BIT(2), /* prediv_sel */ 81 __BITS(9,8), /* div */ 82 __BITS(25,24), /* sel */ 83 SUNXI_CCU_PREDIV_POWER_OF_TWO), 84 85 SUNXI_CCU_FIXED_FACTOR(H6_R_CLK_AHB, "ahb", "ar100", 1, 1), 86 87 SUNXI_CCU_DIV(H6_R_CLK_APB1, "apb1", apb1_parents, 88 APB1_CFG_REG, /* reg */ 89 __BITS(1,0), /* div */ 90 0, /* sel */ 91 SUNXI_CCU_DIV_POWER_OF_TWO), 92 93 SUNXI_CCU_PREDIV(H6_R_CLK_APB2, "apb2", apb2_parents, 94 APB2_CFG_REG, /* reg */ 95 __BITS(4,0), /* prediv */ 96 __BIT(2), /* prediv_sel */ 97 __BITS(9,8), /* div */ 98 __BITS(25,24), /* sel */ 99 SUNXI_CCU_PREDIV_POWER_OF_TWO), 100 101 SUNXI_CCU_GATE(H6_R_CLK_APB1_TIMER, "apb1-timer", "apb1", 0x11c, 0), 102 SUNXI_CCU_GATE(H6_R_CLK_APB1_TWD, "apb1-twd", "apb1", 0x12c, 0), 103 SUNXI_CCU_GATE(H6_R_CLK_APB1_PWM, "apb1-pwm", "apb1", 0x13c, 0), 104 SUNXI_CCU_GATE(H6_R_CLK_APB2_UART, "apb2-uart", "apb2", 0x18c, 0), 105 SUNXI_CCU_GATE(H6_R_CLK_APB2_I2C, "apb2-i2c", "apb2", 0x19c, 0), 106 SUNXI_CCU_GATE(H6_R_CLK_APB2_RSB, "apb2-rsb", "apb2", 0x1bc, 0), 107 SUNXI_CCU_GATE(H6_R_CLK_APB1_IR, "apb1-ir", "apb1", 0x1cc, 0), 108 SUNXI_CCU_GATE(H6_R_CLK_APB1_W1, "apb1-w1", "apb1", 0x1ec, 0), 109 110 SUNXI_CCU_NM(H6_R_CLK_IR, "ir", mod_parents, 111 IR_CFG_REG, /* reg */ 112 __BITS(4,0), /* n */ 113 __BITS(9,8), /* m */ 114 __BIT(24), /* sel */ 115 __BIT(31), /* enable */ 116 0), 117 118 SUNXI_CCU_NM(H6_R_CLK_W1, "w1", mod_parents, 119 W1_CFG_REG, /* reg */ 120 __BITS(4,0), /* n */ 121 __BITS(9,8), /* m */ 122 __BIT(24), /* sel */ 123 __BIT(31), /* enable */ 124 0), 125 }; 126 127 static int 128 sun50i_h6_r_ccu_match(device_t parent, cfdata_t cf, void *aux) 129 { 130 struct fdt_attach_args * const faa = aux; 131 132 return of_compatible_match(faa->faa_phandle, compat_data); 133 } 134 135 static void 136 sun50i_h6_r_ccu_attach(device_t parent, device_t self, void *aux) 137 { 138 struct sunxi_ccu_softc * const sc = device_private(self); 139 struct fdt_attach_args * const faa = aux; 140 141 sc->sc_dev = self; 142 sc->sc_phandle = faa->faa_phandle; 143 sc->sc_bst = faa->faa_bst; 144 145 sc->sc_resets = sun50i_h6_r_ccu_resets; 146 sc->sc_nresets = __arraycount(sun50i_h6_r_ccu_resets); 147 148 sc->sc_clks = sun50i_h6_r_ccu_clks; 149 sc->sc_nclks = __arraycount(sun50i_h6_r_ccu_clks); 150 151 if (sunxi_ccu_attach(sc) != 0) 152 return; 153 154 aprint_naive("\n"); 155 aprint_normal(": H6 PRCM CCU\n"); 156 157 sunxi_ccu_print(sc); 158 } 159
Indexes created Fri Sep 26 20:09:58 GMT 2025