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sunxi_nmi.c revision 1.1.4.1 
      1 /* $NetBSD: sunxi_nmi.c,v 1.1.4.1 2019/06/10 22:05:57 christos Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #define	_INTR_PRIVATE
     30 
     31 #include <sys/cdefs.h>
     32 __KERNEL_RCSID(0, "$NetBSD: sunxi_nmi.c,v 1.1.4.1 2019/06/10 22:05:57 christos Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/kernel.h>
     36 #include <sys/bus.h>
     37 #include <sys/device.h>
     38 #include <sys/intr.h>
     39 #include <sys/systm.h>
     40 
     41 #include <dev/fdt/fdtvar.h>
     42 
     43 #include <arm/cpu.h>
     44 #include <arm/pic/picvar.h>
     45 #include <arm/fdt/arm_fdtvar.h>
     46 
     47 /* ctrl_reg */
     48 #define	NMI_CTRL_IRQ_LOW_LEVEL	0
     49 #define	NMI_CTRL_IRQ_LOW_EDGE	1
     50 #define	NMI_CTRL_IRQ_HIGH_LEVEL	2
     51 #define	NMI_CTRL_IRQ_HIGH_EDGE	3
     52 #define	NMI_CTRL_IRQ_TYPE	__BITS(1,0)
     53 
     54 /* pend_reg */
     55 #define	NMI_PEND_IRQ_ACK	__BIT(0)
     56 
     57 /* enable_reg */
     58 #define	NMI_ENABLE_IRQEN	__BIT(0)
     59 
     60 struct sunxi_nmi_config {
     61 	const char *	name;
     62 	bus_size_t	ctrl_reg;
     63 	bus_size_t	pend_reg;
     64 	bus_size_t	enable_reg;
     65 };
     66 
     67 static const struct sunxi_nmi_config sun7i_a20_sc_nmi_config = {
     68 	.name = "NMI",
     69 	.ctrl_reg = 0x00,
     70 	.pend_reg = 0x04,
     71 	.enable_reg = 0x08,
     72 };
     73 
     74 static const struct sunxi_nmi_config sun6i_a31_r_intc_config = {
     75 	.name = "R_INTC",
     76 	.ctrl_reg = 0x0c,
     77 	.pend_reg = 0x10,
     78 	.enable_reg = 0x40,
     79 };
     80 
     81 static const struct sunxi_nmi_config sun9i_a80_nmi_config = {
     82 	.name = "NMI",
     83 	.ctrl_reg = 0x00,
     84 	.pend_reg = 0x04,
     85 	.enable_reg = 0x08,
     86 };
     87 
     88 static const struct of_compat_data compat_data[] = {
     89 	{ "allwinner,sun7i-a20-sc-nmi",	(uintptr_t)&sun7i_a20_sc_nmi_config },
     90 	{ "allwinner,sun6i-a31-r-intc",	(uintptr_t)&sun6i_a31_r_intc_config },
     91 	{ "allwinner,sun9i-a80-nmi",	(uintptr_t)&sun9i_a80_nmi_config },
     92 	{ NULL }
     93 };
     94 
     95 struct sunxi_nmi_softc {
     96 	device_t sc_dev;
     97 	bus_space_tag_t sc_bst;
     98 	bus_space_handle_t sc_bsh;
     99 	int sc_phandle;
    100 
    101 	const struct sunxi_nmi_config *sc_config;
    102 
    103 	int (*sc_func)(void *);
    104 	void *sc_arg;
    105 };
    106 
    107 #define NMI_READ(sc, reg) \
    108 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
    109 #define NMI_WRITE(sc, reg, val) \
    110 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
    111 
    112 static void
    113 sunxi_nmi_irq_ack(struct sunxi_nmi_softc *sc)
    114 {
    115 	uint32_t val;
    116 
    117 	val = NMI_READ(sc, sc->sc_config->pend_reg);
    118 	val |= NMI_PEND_IRQ_ACK;
    119 	NMI_WRITE(sc, sc->sc_config->pend_reg, val);
    120 }
    121 
    122 static void
    123 sunxi_nmi_irq_enable(struct sunxi_nmi_softc *sc, bool on)
    124 {
    125 	uint32_t val;
    126 
    127 	val = NMI_READ(sc, sc->sc_config->enable_reg);
    128 	if (on)
    129 		val |= NMI_ENABLE_IRQEN;
    130 	else
    131 		val &= ~NMI_ENABLE_IRQEN;
    132 	NMI_WRITE(sc, sc->sc_config->enable_reg, val);
    133 }
    134 
    135 static void
    136 sunxi_nmi_irq_set_type(struct sunxi_nmi_softc *sc, u_int irq_type)
    137 {
    138 	uint32_t val;
    139 
    140 	val = NMI_READ(sc, sc->sc_config->ctrl_reg);
    141 	val &= ~NMI_CTRL_IRQ_TYPE;
    142 	val |= __SHIFTIN(irq_type, NMI_CTRL_IRQ_TYPE);
    143 	NMI_WRITE(sc, sc->sc_config->ctrl_reg, val);
    144 }
    145 
    146 static int
    147 sunxi_nmi_intr(void *priv)
    148 {
    149 	struct sunxi_nmi_softc * const sc = priv;
    150 	int rv = 0;
    151 
    152 	if (sc->sc_func)
    153 		rv = sc->sc_func(sc->sc_arg);
    154 
    155 	sunxi_nmi_irq_ack(sc);
    156 
    157 	return rv;
    158 }
    159 
    160 static void *
    161 sunxi_nmi_fdt_establish(device_t dev, u_int *specifier, int ipl, int flags,
    162     int (*func)(void *), void *arg)
    163 {
    164 	struct sunxi_nmi_softc * const sc = device_private(dev);
    165 	u_int irq_type;
    166 
    167 	/* 1st cell is the interrupt number */
    168 	const u_int irq = be32toh(specifier[0]);
    169 	/* 2nd cell is polarity */
    170 	const u_int pol = be32toh(specifier[1]);
    171 
    172 	if (sc->sc_func != NULL) {
    173 #ifdef DIAGNOSTIC
    174 		device_printf(dev, "%s in use\n", sc->sc_config->name);
    175 #endif
    176 		return NULL;
    177 	}
    178 
    179 	if (irq != 0) {
    180 #ifdef DIAGNOSTIC
    181 		device_printf(dev, "IRQ %u is invalid\n", irq);
    182 #endif
    183 		return NULL;
    184 	}
    185 
    186 	switch (pol & 0x7) {
    187 	case 1:	/* IRQ_TYPE_EDGE_RISING */
    188 		irq_type = NMI_CTRL_IRQ_HIGH_EDGE;
    189 		break;
    190 	case 2:	/* IRQ_TYPE_EDGE_FALLING */
    191 		irq_type = NMI_CTRL_IRQ_LOW_EDGE;
    192 		break;
    193 	case 3:	/* IRQ_TYPE_LEVEL_HIGH */
    194 		irq_type = NMI_CTRL_IRQ_HIGH_LEVEL;
    195 		break;
    196 	case 4:	/* IRQ_TYPE_LEVEL_LOW */
    197 		irq_type = NMI_CTRL_IRQ_LOW_LEVEL;
    198 		break;
    199 	default:
    200 		irq_type = NMI_CTRL_IRQ_LOW_LEVEL;
    201 		break;
    202 	}
    203 
    204 	sc->sc_func = func;
    205 	sc->sc_arg = arg;
    206 
    207 	sunxi_nmi_irq_set_type(sc, irq_type);
    208 	sunxi_nmi_irq_enable(sc, true);
    209 
    210 	return fdtbus_intr_establish(sc->sc_phandle, 0, ipl, flags,
    211 	    sunxi_nmi_intr, sc);
    212 }
    213 
    214 static void
    215 sunxi_nmi_fdt_disestablish(device_t dev, void *ih)
    216 {
    217 	struct sunxi_nmi_softc * const sc = device_private(dev);
    218 
    219 	sunxi_nmi_irq_enable(sc, false);
    220 
    221 	fdtbus_intr_disestablish(sc->sc_phandle, ih);
    222 
    223 	sc->sc_func = NULL;
    224 	sc->sc_arg = NULL;
    225 }
    226 
    227 static bool
    228 sunxi_nmi_fdt_intrstr(device_t dev, u_int *specifier, char *buf, size_t buflen)
    229 {
    230 	struct sunxi_nmi_softc * const sc = device_private(dev);
    231 
    232 	snprintf(buf, buflen, "%s", sc->sc_config->name);
    233 
    234 	return true;
    235 }
    236 
    237 static const struct fdtbus_interrupt_controller_func sunxi_nmi_fdt_funcs = {
    238 	.establish = sunxi_nmi_fdt_establish,
    239 	.disestablish = sunxi_nmi_fdt_disestablish,
    240 	.intrstr = sunxi_nmi_fdt_intrstr,
    241 };
    242 
    243 static int
    244 sunxi_nmi_match(device_t parent, cfdata_t cf, void *aux)
    245 {
    246 	struct fdt_attach_args * const faa = aux;
    247 
    248 	return of_match_compat_data(faa->faa_phandle, compat_data);
    249 }
    250 
    251 static void
    252 sunxi_nmi_attach(device_t parent, device_t self, void *aux)
    253 {
    254 	struct sunxi_nmi_softc * const sc = device_private(self);
    255 	struct fdt_attach_args * const faa = aux;
    256 	const int phandle = faa->faa_phandle;
    257 	bus_addr_t addr;
    258 	bus_size_t size;
    259 	int error;
    260 
    261 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    262 		aprint_error(": couldn't get registers\n");
    263 		return;
    264 	}
    265 
    266 	sc->sc_dev = self;
    267 	sc->sc_phandle = phandle;
    268 	sc->sc_config = (void *)of_search_compatible(phandle, compat_data)->data;
    269 	sc->sc_bst = faa->faa_bst;
    270 	if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
    271 		aprint_error(": couldn't map registers\n");
    272 		return;
    273 	}
    274 
    275 	aprint_naive("\n");
    276 	aprint_normal(": %s\n", sc->sc_config->name);
    277 
    278 	sunxi_nmi_irq_enable(sc, false);
    279 	sunxi_nmi_irq_ack(sc);
    280 
    281 	error = fdtbus_register_interrupt_controller(self, phandle,
    282 	    &sunxi_nmi_fdt_funcs);
    283 	if (error) {
    284 		aprint_error_dev(self, "couldn't register with fdtbus: %d\n",
    285 		    error);
    286 		return;
    287 	}
    288 }
    289 
    290 CFATTACH_DECL_NEW(sunxi_nmi, sizeof(struct sunxi_nmi_softc),
    291 	sunxi_nmi_match, sunxi_nmi_attach, NULL, NULL);
    292