1 1.2 thorpej /* $NetBSD: ti_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. The name of the author may not be used to endorse or promote products 13 1.1 jmcneill * derived from this software without specific prior written permission. 14 1.1 jmcneill * 15 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 1.1 jmcneill * SUCH DAMAGE. 26 1.1 jmcneill */ 27 1.1 jmcneill 28 1.1 jmcneill #include <sys/cdefs.h> 29 1.2 thorpej __KERNEL_RCSID(0, "$NetBSD: ti_usb.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $"); 30 1.1 jmcneill 31 1.1 jmcneill #include <sys/param.h> 32 1.1 jmcneill #include <sys/systm.h> 33 1.1 jmcneill #include <sys/device.h> 34 1.1 jmcneill #include <sys/conf.h> 35 1.1 jmcneill #include <sys/mutex.h> 36 1.1 jmcneill #include <sys/bus.h> 37 1.1 jmcneill 38 1.1 jmcneill #include <dev/fdt/fdtvar.h> 39 1.1 jmcneill 40 1.1 jmcneill #include <arm/ti/ti_prcm.h> 41 1.1 jmcneill 42 1.1 jmcneill #define UHH_SYSCONFIG 0x10 43 1.1 jmcneill #define UHH_SYSCONFIG_MIDLEMODE_MASK 0x00003000 44 1.1 jmcneill #define UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY 0x00002000 45 1.1 jmcneill #define UHH_SYSCONFIG_CLOCKACTIVITY 0x00000100 46 1.1 jmcneill #define UHH_SYSCONFIG_SIDLEMODE_MASK 0x00000018 47 1.1 jmcneill #define UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE 0x00000008 48 1.1 jmcneill #define UHH_SYSCONFIG_ENAWAKEUP 0x00000004 49 1.1 jmcneill #define UHH_SYSCONFIG_SOFTRESET 0x00000002 50 1.1 jmcneill #define UHH_SYSCONFIG_AUTOIDLE 0x00000001 51 1.1 jmcneill 52 1.1 jmcneill #define UHH_HOSTCONFIG 0x40 53 1.1 jmcneill #define UHH_HOSTCONFIG_APP_START_CLK __BIT(31) 54 1.1 jmcneill #define UHH_HOSTCONFIG_P3_MODE __BITS(21,20) 55 1.1 jmcneill #define UHH_HOSTCONFIG_P2_MODE __BITS(19,18) 56 1.1 jmcneill #define UHH_HOSTCONFIG_P1_MODE __BITS(17,16) 57 1.1 jmcneill #define UHH_HOSTCONFIG_PMODE_ULPI_PHY 0 58 1.1 jmcneill #define UHH_HOSTCONFIG_PMODE_UTMI 1 59 1.1 jmcneill #define UHH_HOSTCONFIG_PMODE_HSIC 3 60 1.1 jmcneill #define UHH_HOSTCONFIG_P3_ULPI_BYPASS __BIT(12) 61 1.1 jmcneill #define UHH_HOSTCONFIG_P2_ULPI_BYPASS __BIT(11) 62 1.1 jmcneill #define UHH_HOSTCONFIG_P3_CONNECT_STATUS __BIT(10) 63 1.1 jmcneill #define UHH_HOSTCONFIG_P2_CONNECT_STATUS __BIT(9) 64 1.1 jmcneill #define UHH_HOSTCONFIG_P1_CONNECT_STATUS __BIT(8) 65 1.1 jmcneill #define UHH_HOSTCONFIG_ENA_INCR_ALIGN __BIT(5) 66 1.1 jmcneill #define UHH_HOSTCONFIG_ENA_INCR16 __BIT(4) 67 1.1 jmcneill #define UHH_HOSTCONFIG_ENA_INCR8 __BIT(3) 68 1.1 jmcneill #define UHH_HOSTCONFIG_ENA_INCR4 __BIT(2) 69 1.1 jmcneill #define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN __BIT(1) 70 1.1 jmcneill #define UHH_HOSTCONFIG_P1_ULPI_BYPASS __BIT(0) 71 1.1 jmcneill 72 1.1 jmcneill extern void tl_usbtll_enable_port(u_int); 73 1.1 jmcneill 74 1.2 thorpej static const struct device_compatible_entry compat_data[] = { 75 1.2 thorpej { .compat = "ti,usbhs-host" }, 76 1.2 thorpej DEVICE_COMPAT_EOL 77 1.1 jmcneill }; 78 1.1 jmcneill 79 1.1 jmcneill #define TI_USB_NPORTS 3 80 1.1 jmcneill 81 1.1 jmcneill enum { 82 1.1 jmcneill CONNECT_STATUS, 83 1.1 jmcneill ULPI_BYPASS, 84 1.1 jmcneill TI_USB_NBITS 85 1.1 jmcneill }; 86 1.1 jmcneill 87 1.1 jmcneill static const uint32_t ti_usb_portbits[TI_USB_NPORTS][TI_USB_NBITS] = { 88 1.1 jmcneill [0] = { 89 1.1 jmcneill [CONNECT_STATUS] = UHH_HOSTCONFIG_P1_CONNECT_STATUS, 90 1.1 jmcneill [ULPI_BYPASS] = UHH_HOSTCONFIG_P1_ULPI_BYPASS, 91 1.1 jmcneill }, 92 1.1 jmcneill [1] = { 93 1.1 jmcneill [CONNECT_STATUS] = UHH_HOSTCONFIG_P2_CONNECT_STATUS, 94 1.1 jmcneill [ULPI_BYPASS] = UHH_HOSTCONFIG_P2_ULPI_BYPASS, 95 1.1 jmcneill }, 96 1.1 jmcneill [2] = { 97 1.1 jmcneill [CONNECT_STATUS] = UHH_HOSTCONFIG_P3_CONNECT_STATUS, 98 1.1 jmcneill [ULPI_BYPASS] = UHH_HOSTCONFIG_P3_ULPI_BYPASS, 99 1.1 jmcneill }, 100 1.1 jmcneill }; 101 1.1 jmcneill 102 1.1 jmcneill enum { 103 1.1 jmcneill PORT_UNUSED, 104 1.1 jmcneill PORT_EHCI_PHY, 105 1.1 jmcneill PORT_EHCI_TLL, 106 1.1 jmcneill PORT_EHCI_HSIC, 107 1.1 jmcneill }; 108 1.1 jmcneill 109 1.1 jmcneill struct ti_usb_softc { 110 1.1 jmcneill device_t sc_dev; 111 1.1 jmcneill bus_space_tag_t sc_bst; 112 1.1 jmcneill bus_space_handle_t sc_bsh; 113 1.1 jmcneill 114 1.1 jmcneill u_int sc_portmode[TI_USB_NPORTS]; 115 1.1 jmcneill }; 116 1.1 jmcneill 117 1.1 jmcneill static int ti_usb_match(device_t, cfdata_t, void *); 118 1.1 jmcneill static void ti_usb_attach(device_t, device_t, void *); 119 1.1 jmcneill 120 1.1 jmcneill CFATTACH_DECL_NEW(ti_usb, sizeof(struct ti_usb_softc), 121 1.1 jmcneill ti_usb_match, ti_usb_attach, NULL, NULL); 122 1.1 jmcneill 123 1.1 jmcneill #define RD4(sc, reg) \ 124 1.1 jmcneill bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 125 1.1 jmcneill #define WR4(sc, reg, val) \ 126 1.1 jmcneill bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 127 1.1 jmcneill 128 1.1 jmcneill static void 129 1.1 jmcneill ti_usb_init(struct ti_usb_softc *sc) 130 1.1 jmcneill { 131 1.1 jmcneill uint32_t val; 132 1.1 jmcneill int port; 133 1.1 jmcneill 134 1.1 jmcneill val = RD4(sc, UHH_SYSCONFIG); 135 1.1 jmcneill val &= ~(UHH_SYSCONFIG_SIDLEMODE_MASK|UHH_SYSCONFIG_MIDLEMODE_MASK); 136 1.1 jmcneill val |= UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY; 137 1.1 jmcneill val |= UHH_SYSCONFIG_CLOCKACTIVITY; 138 1.1 jmcneill val |= UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE; 139 1.1 jmcneill val |= UHH_SYSCONFIG_ENAWAKEUP; 140 1.1 jmcneill val &= ~UHH_SYSCONFIG_AUTOIDLE; 141 1.1 jmcneill WR4(sc, UHH_SYSCONFIG, val); 142 1.1 jmcneill 143 1.1 jmcneill val = RD4(sc, UHH_SYSCONFIG); 144 1.1 jmcneill 145 1.1 jmcneill val = RD4(sc, UHH_HOSTCONFIG); 146 1.1 jmcneill val |= UHH_HOSTCONFIG_ENA_INCR16; 147 1.1 jmcneill val |= UHH_HOSTCONFIG_ENA_INCR8; 148 1.1 jmcneill val |= UHH_HOSTCONFIG_ENA_INCR4; 149 1.1 jmcneill val |= UHH_HOSTCONFIG_APP_START_CLK; 150 1.1 jmcneill val &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN; 151 1.1 jmcneill for (port = 0; port < TI_USB_NPORTS; port++) { 152 1.1 jmcneill if (sc->sc_portmode[port] == PORT_UNUSED) 153 1.1 jmcneill val &= ~ti_usb_portbits[port][CONNECT_STATUS]; 154 1.1 jmcneill if (sc->sc_portmode[port] == PORT_EHCI_PHY) 155 1.1 jmcneill val &= ~ti_usb_portbits[port][ULPI_BYPASS]; 156 1.1 jmcneill else 157 1.1 jmcneill val |= ti_usb_portbits[port][ULPI_BYPASS]; 158 1.1 jmcneill } 159 1.1 jmcneill WR4(sc, UHH_HOSTCONFIG, val); 160 1.1 jmcneill } 161 1.1 jmcneill 162 1.1 jmcneill static int 163 1.1 jmcneill ti_usb_match(device_t parent, cfdata_t match, void *aux) 164 1.1 jmcneill { 165 1.1 jmcneill struct fdt_attach_args * const faa = aux; 166 1.1 jmcneill 167 1.2 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 168 1.1 jmcneill } 169 1.1 jmcneill 170 1.1 jmcneill static void 171 1.1 jmcneill ti_usb_attach(device_t parent, device_t self, void *aux) 172 1.1 jmcneill { 173 1.1 jmcneill struct ti_usb_softc *sc = device_private(self); 174 1.1 jmcneill struct fdt_attach_args * const faa = aux; 175 1.1 jmcneill const int phandle = faa->faa_phandle; 176 1.1 jmcneill bus_addr_t addr; 177 1.1 jmcneill bus_size_t size; 178 1.1 jmcneill char propname[16]; 179 1.1 jmcneill const char *portmode; 180 1.1 jmcneill int port; 181 1.1 jmcneill 182 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 183 1.1 jmcneill aprint_error(": couldn't get registers\n"); 184 1.1 jmcneill return; 185 1.1 jmcneill } 186 1.1 jmcneill 187 1.1 jmcneill if (ti_prcm_enable_hwmod(phandle, 0) != 0) { 188 1.1 jmcneill aprint_error(": couldn't enable module\n"); 189 1.1 jmcneill return; 190 1.1 jmcneill } 191 1.1 jmcneill 192 1.1 jmcneill sc->sc_dev = self; 193 1.1 jmcneill sc->sc_bst = faa->faa_bst; 194 1.1 jmcneill if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 195 1.1 jmcneill aprint_error(": couldn't map registers\n"); 196 1.1 jmcneill return; 197 1.1 jmcneill } 198 1.1 jmcneill 199 1.1 jmcneill for (port = 0; port < TI_USB_NPORTS; port++) { 200 1.1 jmcneill snprintf(propname, sizeof(propname), "port%d-mode", port + 1); 201 1.1 jmcneill portmode = fdtbus_get_string(phandle, propname); 202 1.1 jmcneill if (portmode == NULL) 203 1.1 jmcneill continue; 204 1.1 jmcneill if (strcmp(portmode, "ehci-phy") == 0) 205 1.1 jmcneill sc->sc_portmode[port] = PORT_EHCI_PHY; 206 1.1 jmcneill else if (strcmp(portmode, "ehci-tll") == 0) 207 1.1 jmcneill sc->sc_portmode[port] = PORT_EHCI_TLL; 208 1.1 jmcneill else if (strcmp(portmode, "ehci-hsic") == 0) 209 1.1 jmcneill sc->sc_portmode[port] = PORT_EHCI_HSIC; 210 1.1 jmcneill 211 1.1 jmcneill if (sc->sc_portmode[port] != PORT_UNUSED) 212 1.1 jmcneill tl_usbtll_enable_port(port); 213 1.1 jmcneill } 214 1.1 jmcneill 215 1.1 jmcneill aprint_naive("\n"); 216 1.1 jmcneill aprint_normal(": OMAP HS USB Host\n"); 217 1.1 jmcneill 218 1.1 jmcneill ti_usb_init(sc); 219 1.1 jmcneill 220 1.1 jmcneill fdt_add_bus(self, phandle, faa); 221 1.1 jmcneill } 222