becc_timer.c revision 1.5 1 /* $NetBSD: becc_timer.c,v 1.5 2003/07/27 04:52:28 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Timer/clock support for the ADI Engineering Big Endian Companion Chip.
40 */
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: becc_timer.c,v 1.5 2003/07/27 04:52:28 thorpej Exp $");
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/time.h>
49
50 #include <dev/clock_subr.h>
51
52 #include <machine/bus.h>
53 #include <arm/cpufunc.h>
54
55 #include <arm/xscale/beccreg.h>
56 #include <arm/xscale/beccvar.h>
57
58 void (*becc_hardclock_hook)(void);
59
60 /*
61 * Note, since COUNTS_PER_USEC doesn't divide evenly, we round up.
62 */
63 #define COUNTS_PER_SEC BECC_PERIPH_CLOCK
64 #define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1)
65
66 static void *clock_ih;
67
68 /*
69 * Since the timer interrupts when the counter underflows, we need to
70 * subtract 1 from counts_per_hz when loading the preload register.
71 */
72 static uint32_t counts_per_hz;
73
74 int clockhandler(void *);
75
76 /*
77 * becc_calibrate_delay:
78 *
79 * Calibrate the delay loop.
80 */
81 void
82 becc_calibrate_delay(void)
83 {
84
85 /*
86 * Just use hz=100 for now -- we'll adjust it, if necessary,
87 * in cpu_initclocks().
88 */
89 counts_per_hz = COUNTS_PER_SEC / 100;
90
91 /* Stop both timers, clear interrupts. */
92 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
93 BECC_CSR_WRITE(BECC_TSCRB, TSCRx_TIF);
94
95 /* Set the timer preload value. */
96 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
97
98 /* Start the timer. */
99 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
100 }
101
102 /*
103 * cpu_initclocks:
104 *
105 * Initialize the clock and get them going.
106 */
107 void
108 cpu_initclocks(void)
109 {
110 u_int oldirqstate;
111
112 #if 0
113 if (hz < 50 || COUNTS_PER_SEC % hz) {
114 printf("Cannot get %d Hz clock; using 100 Hz\n", hz);
115 hz = 100;
116 }
117 #endif
118 tick = 1000000 / hz; /* number of microseconds between interrupts */
119 tickfix = 1000000 - (hz * tick);
120 if (tickfix) {
121 int ftp;
122
123 ftp = min(ffs(tickfix), ffs(hz));
124 tickfix >>= (ftp - 1);
125 tickfixinterval = hz >> (ftp - 1);
126 }
127
128 /*
129 * We only have one timer available; stathz and profhz are
130 * always left as 0 (the upper-layer clock code deals with
131 * this situation).
132 */
133 if (stathz != 0)
134 printf("Cannot get %d Hz statclock\n", stathz);
135 stathz = 0;
136
137 if (profhz != 0)
138 printf("Cannot get %d Hz profclock\n", profhz);
139 profhz = 0;
140
141 /* Report the clock frequency. */
142 aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz);
143
144 oldirqstate = disable_interrupts(I32_bit);
145
146 /* Hook up the clock interrupt handler. */
147 clock_ih = becc_intr_establish(ICU_TIMERA, IPL_CLOCK,
148 clockhandler, NULL);
149 if (clock_ih == NULL)
150 panic("cpu_initclocks: unable to register timer interrupt");
151
152 /* Set up the new clock parameters. */
153
154 /* Stop timer, clear interrupt */
155 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TIF);
156
157 counts_per_hz = COUNTS_PER_SEC / hz;
158
159 /* Set the timer preload value. */
160 BECC_CSR_WRITE(BECC_TPRA, counts_per_hz - 1);
161
162 /* ...and start it in motion. */
163 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM);
164
165 /* register soft interrupt handler as well */
166 becc_intr_establish(ICU_SOFT, IPL_SOFT, becc_softint, NULL);
167
168 restore_interrupts(oldirqstate);
169 }
170
171 /*
172 * setstatclockrate:
173 *
174 * Set the rate of the statistics clock.
175 *
176 * We assume that hz is either stathz or profhz, and that neither
177 * will change after being set by cpu_initclocks(). We could
178 * recalculate the intervals here, but that would be a pain.
179 */
180 void
181 setstatclockrate(int hz)
182 {
183
184 /*
185 * XXX Use TMR1?
186 */
187 }
188
189 /*
190 * microtime:
191 *
192 * Fill in the specified timeval struct with the current time
193 * accurate to the microsecond.
194 */
195 void
196 microtime(struct timeval *tvp)
197 {
198 static struct timeval lasttv;
199 u_int oldirqstate;
200 uint32_t counts;
201
202 oldirqstate = disable_interrupts(I32_bit);
203
204 /*
205 * XXX How do we compensate for the -1 behavior of the preload value?
206 */
207 counts = counts_per_hz - BECC_CSR_READ(BECC_TCVRA);
208
209 /* Fill in the timeval struct. */
210 *tvp = time;
211 tvp->tv_usec += (counts / COUNTS_PER_USEC);
212
213 /* Make sure microseconds doesn't overflow. */
214 while (tvp->tv_usec >= 1000000) {
215 tvp->tv_usec -= 1000000;
216 tvp->tv_sec++;
217 }
218
219 /* Make sure the time has advanced. */
220 if (tvp->tv_sec == lasttv.tv_sec &&
221 tvp->tv_usec <= lasttv.tv_usec) {
222 tvp->tv_usec = lasttv.tv_usec + 1;
223 if (tvp->tv_usec >= 1000000) {
224 tvp->tv_usec -= 1000000;
225 tvp->tv_sec++;
226 }
227 }
228
229 lasttv = *tvp;
230
231 restore_interrupts(oldirqstate);
232 }
233
234 /*
235 * delay:
236 *
237 * Delay for at least N microseconds.
238 */
239 void
240 delay(u_int n)
241 {
242 uint32_t cur, last, delta, usecs;
243
244 /*
245 * This works by polling the timer and counting the
246 * number of microseconds that go by.
247 */
248 last = BECC_CSR_READ(BECC_TCVRA);
249 delta = usecs = 0;
250
251 while (n > usecs) {
252 cur = BECC_CSR_READ(BECC_TCVRA);
253
254 /* Check to see if the timer has wrapped around. */
255 if (last < cur)
256 delta += (last + (counts_per_hz - cur));
257 else
258 delta += (last - cur);
259
260 last = cur;
261
262 if (delta >= COUNTS_PER_USEC) {
263 usecs += delta / COUNTS_PER_USEC;
264 delta %= COUNTS_PER_USEC;
265 }
266 }
267 }
268
269 todr_chip_handle_t todr_handle;
270
271 /*
272 * todr_attach:
273 *
274 * Set the specified time-of-day register as the system real-time clock.
275 */
276 void
277 todr_attach(todr_chip_handle_t todr)
278 {
279
280 if (todr_handle)
281 panic("todr_attach: rtc already configured");
282 todr_handle = todr;
283 }
284
285 /*
286 * inittodr:
287 *
288 * Initialize time from the time-of-day register.
289 */
290 #define MINYEAR 2003 /* minimum plausible year */
291 void
292 inittodr(time_t base)
293 {
294 time_t deltat;
295 int badbase;
296
297 if (base < (MINYEAR - 1970) * SECYR) {
298 printf("WARNING: preposterous time in file system");
299 /* read the system clock anyway */
300 base = (MINYEAR - 1970) * SECYR;
301 badbase = 1;
302 } else
303 badbase = 0;
304
305 if (todr_handle == NULL ||
306 todr_gettime(todr_handle, (struct timeval *)&time) != 0 ||
307 time.tv_sec == 0) {
308 /*
309 * Believe the time in the file system for lack of
310 * anything better, resetting the TODR.
311 */
312 time.tv_sec = base;
313 time.tv_usec = 0;
314 if (todr_handle != NULL && !badbase) {
315 printf("WARNING: preposterous clock chip time\n");
316 resettodr();
317 }
318 goto bad;
319 }
320
321 if (!badbase) {
322 /*
323 * See if we tained/lost two or more days; if
324 * so, assume something is amiss.
325 */
326 deltat = time.tv_sec - base;
327 if (deltat < 0)
328 deltat = -deltat;
329 if (deltat < 2 * SECDAY)
330 return; /* all is well */
331 printf("WARNING: clock %s %ld days\n",
332 time.tv_sec < base ? "lost" : "gained",
333 (long)deltat / SECDAY);
334 }
335 bad:
336 printf("WARNING: CHECK AND RESET THE DATE!\n");
337 }
338
339 /*
340 * resettodr:
341 *
342 * Reset the time-of-day register with the current time.
343 */
344 void
345 resettodr(void)
346 {
347
348 if (time.tv_sec == 0)
349 return;
350
351 if (todr_handle != NULL &&
352 todr_settime(todr_handle, (struct timeval *)&time) != 0)
353 printf("resettodr: failed to set time\n");
354 }
355
356 /*
357 * clockhandler:
358 *
359 * Handle the hardclock interrupt.
360 */
361 int
362 clockhandler(void *arg)
363 {
364 struct clockframe *frame = arg;
365
366 /* ACK the interrupt. */
367 BECC_CSR_WRITE(BECC_TSCRA, TSCRx_TE | TSCRx_CM | TSCRx_TIF);
368
369 hardclock(frame);
370
371 if (becc_hardclock_hook != NULL)
372 (*becc_hardclock_hook)();
373
374 return (1);
375 }
376