iopi2c.c revision 1.8
1 /* $NetBSD: iopi2c.c,v 1.8 2016/02/14 19:54:20 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Intel i80321 I/O Processor I2C Controller Unit support. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: iopi2c.c,v 1.8 2016/02/14 19:54:20 chs Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/mutex.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/kernel.h> 50 51 #include <sys/bus.h> 52 #include <machine/intr.h> 53 54 #include <dev/i2c/i2cvar.h> 55 56 #include <arm/xscale/iopi2creg.h> 57 #include <arm/xscale/iopi2cvar.h> 58 59 static int iopiic_acquire_bus(void *, int); 60 static void iopiic_release_bus(void *, int); 61 62 static int iopiic_send_start(void *, int); 63 static int iopiic_send_stop(void *, int); 64 static int iopiic_initiate_xfer(void *, uint16_t, int); 65 static int iopiic_read_byte(void *, uint8_t *, int); 66 static int iopiic_write_byte(void *, uint8_t, int); 67 68 void 69 iopiic_attach(struct iopiic_softc *sc) 70 { 71 struct i2cbus_attach_args iba; 72 73 sc->sc_i2c.ic_cookie = sc; 74 sc->sc_i2c.ic_acquire_bus = iopiic_acquire_bus; 75 sc->sc_i2c.ic_release_bus = iopiic_release_bus; 76 sc->sc_i2c.ic_send_start = iopiic_send_start; 77 sc->sc_i2c.ic_send_stop = iopiic_send_stop; 78 sc->sc_i2c.ic_initiate_xfer = iopiic_initiate_xfer; 79 sc->sc_i2c.ic_read_byte = iopiic_read_byte; 80 sc->sc_i2c.ic_write_byte = iopiic_write_byte; 81 82 memset(&iba, 0, sizeof(iba)); 83 iba.iba_tag = &sc->sc_i2c; 84 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 85 } 86 87 static int 88 iopiic_acquire_bus(void *cookie, int flags) 89 { 90 struct iopiic_softc *sc = cookie; 91 92 /* XXX What should we do for the polling case? */ 93 if (flags & I2C_F_POLL) 94 return (0); 95 96 mutex_enter(&sc->sc_buslock); 97 return (0); 98 } 99 100 static void 101 iopiic_release_bus(void *cookie, int flags) 102 { 103 struct iopiic_softc *sc = cookie; 104 105 /* XXX See above. */ 106 if (flags & I2C_F_POLL) 107 return; 108 109 mutex_exit(&sc->sc_buslock); 110 } 111 112 #define IOPIIC_TIMEOUT 100 /* protocol timeout, in uSecs */ 113 114 static int 115 iopiic_wait(struct iopiic_softc *sc, int bit, int flags) 116 { 117 uint32_t isr; 118 int timeout, error=0; 119 120 /* XXX We never sleep, we always poll. Fix me. */ 121 122 /* 123 * For some reason, we seem to run into problems if we poll 124 * the ISR while the transfer is in progress--at least on the 125 * i80312. The condition that we're looking for never seems 126 * to appear on a read, and it's not clear why; perhaps reads 127 * of the I2C register file interfere with its proper operation? 128 * For now, just delay for a while up front. 129 * 130 * We _really_ need this to be interrupt-driven, but a problem 131 * with that is that the i80312 has no way to mask interrupts... 132 * So we need to deal with that. For DMA and AAU, too, for that 133 * matter. 134 * Note that delay(100) doesn't quite work on the npwr w/ m41t00. 135 */ 136 delay(110); 137 for (timeout = IOPIIC_TIMEOUT; timeout != 0; timeout--) { 138 isr = bus_space_read_4(sc->sc_st, sc->sc_sh, IIC_ISR); 139 if (isr & (bit | IIC_ISR_BED)) 140 break; 141 delay(1); 142 } 143 144 if (isr & (IIC_ISR_BED | (bit & IIC_ISR_ALD))) 145 error = EIO; 146 else if (isr & (bit & ~IIC_ISR_ALD)) 147 error = 0; 148 else 149 error = ETIMEDOUT; 150 151 if (error) 152 device_printf(sc->sc_dev, 153 "iopiic_wait, (%08x) error %d: ISR = 0x%08x\n", 154 bit, error, isr); 155 156 /* 157 * The IIC_ISR is Read/Clear apart from the bottom 4 bits, which are 158 * read-only. So simply write back our copy of the ISR to clear any 159 * latched status. 160 */ 161 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISR, isr); 162 163 return (error); 164 } 165 166 static int 167 iopiic_send_start(void *cookie, int flags) 168 { 169 struct iopiic_softc *sc = cookie; 170 171 /* 172 * This may only work in conjunction with a data transfer; 173 * we might need to un-export the "start" primitive. 174 */ 175 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 176 sc->sc_icr | IIC_ICR_START); 177 delay(IOPIIC_TIMEOUT); 178 179 return (0); 180 } 181 182 static int 183 iopiic_send_stop(void *cookie, int flags) 184 { 185 struct iopiic_softc *sc = cookie; 186 187 /* 188 * The STOP bit is only used in conjunction with 189 * a data transfer, so we need to use MA in this 190 * case. 191 * 192 * Consider adding an I2C_F_STOP so we can 193 * do a read-with-STOP and write-with-STOP. 194 */ 195 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 196 sc->sc_icr | IIC_ICR_MA); 197 delay(IOPIIC_TIMEOUT); 198 199 return (0); 200 } 201 202 static int 203 iopiic_initiate_xfer(void *cookie, uint16_t addr, int flags) 204 { 205 struct iopiic_softc *sc = cookie; 206 int error, rd_req = (flags & I2C_F_READ) != 0; 207 uint32_t idbr; 208 209 /* We only support 7-bit addressing. */ 210 if ((addr & 0x78) == 0x78) 211 return (EINVAL); 212 213 idbr = (addr << 1) | (rd_req ? 1 : 0); 214 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_IDBR, idbr); 215 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 216 sc->sc_icr | IIC_ICR_START | IIC_ICR_TB); 217 218 error = iopiic_wait(sc, IIC_ISR_ITE, flags); 219 #if 0 220 if (error) 221 device_printf(sc->sc_dev, "failed to initiate %s xfer\n", 222 rd_req ? "read" : "write"); 223 #endif 224 return (error); 225 } 226 227 static int 228 iopiic_read_byte(void *cookie, uint8_t *bytep, int flags) 229 { 230 struct iopiic_softc *sc = cookie; 231 int error, last_byte = (flags & I2C_F_LAST) != 0, 232 send_stop = (flags & I2C_F_STOP) != 0; 233 234 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 235 sc->sc_icr | IIC_ICR_TB | (last_byte ? IIC_ICR_NACK : 0) | 236 (send_stop ? IIC_ICR_STOP : 0)); 237 if ((error = iopiic_wait(sc, IIC_ISR_IRF | IIC_ISR_ALD, flags)) == 0) 238 *bytep = bus_space_read_4(sc->sc_st, sc->sc_sh, IIC_IDBR); 239 #if 0 240 if (error) 241 device_printf(sc->sc_dev, "read byte failed\n"); 242 #endif 243 244 return (error); 245 } 246 247 static int 248 iopiic_write_byte(void *cookie, uint8_t byte, int flags) 249 { 250 struct iopiic_softc *sc = cookie; 251 int error, send_stop = (flags & I2C_F_STOP) != 0; 252 253 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_IDBR, byte); 254 bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 255 sc->sc_icr | IIC_ICR_TB | (send_stop ? IIC_ICR_STOP : 0)); 256 error = iopiic_wait(sc, IIC_ISR_ITE | IIC_ISR_ALD, flags); 257 258 #if 0 259 if (error) 260 device_printf(sc->sc_dev, "write byte failed\n"); 261 #endif 262 263 return (error); 264 } 265
Indexes created Fri Sep 26 20:09:58 GMT 2025