ixp425_timer.c revision 1.14.10.1
1 /* $NetBSD: ixp425_timer.c,v 1.14.10.1 2010/03/11 15:02:08 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2003 5 * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: ixp425_timer.c,v 1.14.10.1 2010/03/11 15:02:08 yamt Exp $"); 32 33 #include "opt_ixp425.h" 34 #include "opt_perfctrs.h" 35 36 #include <sys/types.h> 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/atomic.h> 41 #include <sys/time.h> 42 #include <sys/timetc.h> 43 #include <sys/device.h> 44 45 #include <dev/clock_subr.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <arm/cpufunc.h> 51 52 #include <arm/xscale/ixp425reg.h> 53 #include <arm/xscale/ixp425var.h> 54 #include <arm/xscale/ixp425_sipvar.h> 55 56 static int ixpclk_match(struct device *, struct cfdata *, void *); 57 static void ixpclk_attach(struct device *, struct device *, void *); 58 static u_int ixpclk_get_timecount(struct timecounter *); 59 60 static uint32_t counts_per_hz; 61 62 static void *clock_ih; 63 64 /* callback functions for intr_functions */ 65 int ixpclk_intr(void *); 66 67 struct ixpclk_softc { 68 struct device sc_dev; 69 bus_addr_t sc_baseaddr; 70 bus_space_tag_t sc_iot; 71 bus_space_handle_t sc_ioh; 72 }; 73 74 #ifndef IXP425_CLOCK_FREQ 75 #define COUNTS_PER_SEC 66666600 /* 66MHz */ 76 #else 77 #define COUNTS_PER_SEC IXP425_CLOCK_FREQ 78 #endif 79 #define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1) 80 81 static struct ixpclk_softc *ixpclk_sc; 82 83 static struct timecounter ixpclk_timecounter = { 84 ixpclk_get_timecount, /* get_timecount */ 85 0, /* no poll_pps */ 86 0xffffffff, /* counter_mask */ 87 COUNTS_PER_SEC, /* frequency */ 88 "ixpclk", /* name */ 89 100, /* quality */ 90 NULL, /* prev */ 91 NULL, /* next */ 92 }; 93 94 static volatile uint32_t ixpclk_base; 95 96 CFATTACH_DECL(ixpclk, sizeof(struct ixpclk_softc), 97 ixpclk_match, ixpclk_attach, NULL, NULL); 98 99 #define GET_TIMER_VALUE(sc) (bus_space_read_4((sc)->sc_iot, \ 100 (sc)->sc_ioh, \ 101 IXP425_OST_TIM0)) 102 103 #define GET_TS_VALUE(sc) (*(volatile u_int32_t *) \ 104 (IXP425_TIMER_VBASE + IXP425_OST_TS)) 105 106 static int 107 ixpclk_match(struct device *parent, struct cfdata *match, void *aux) 108 { 109 return 2; 110 } 111 112 static void 113 ixpclk_attach(struct device *parent, struct device *self, void *aux) 114 { 115 struct ixpclk_softc *sc = (struct ixpclk_softc*) self; 116 struct ixpsip_attach_args *sa = aux; 117 118 printf("\n"); 119 120 ixpclk_sc = sc; 121 122 sc->sc_iot = sa->sa_iot; 123 sc->sc_baseaddr = sa->sa_addr; 124 125 if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0, 126 &sc->sc_ioh)) 127 panic("%s: Cannot map registers", self->dv_xname); 128 129 aprint_normal("%s: IXP425 Interval Timer\n", sc->sc_dev.dv_xname); 130 } 131 132 /* 133 * cpu_initclocks: 134 * 135 * Initialize the clock and get them going. 136 */ 137 void 138 cpu_initclocks(void) 139 { 140 struct ixpclk_softc* sc = ixpclk_sc; 141 u_int oldirqstate; 142 #if defined(PERFCTRS) 143 void *pmu_ih; 144 #endif 145 146 if (hz < 50 || COUNTS_PER_SEC % hz) { 147 aprint_error("Cannot get %d Hz clock; using 100 Hz\n", hz); 148 hz = 100; 149 } 150 151 /* 152 * We only have one timer available; stathz and profhz are 153 * always left as 0 (the upper-layer clock code deals with 154 * this situation). 155 */ 156 if (stathz != 0) 157 aprint_error("Cannot get %d Hz statclock\n", stathz); 158 stathz = 0; 159 160 if (profhz != 0) 161 aprint_error("Cannot get %d Hz profclock\n", profhz); 162 profhz = 0; 163 164 /* Report the clock frequency. */ 165 aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz); 166 167 oldirqstate = disable_interrupts(I32_bit); 168 169 /* Hook up the clock interrupt handler. */ 170 clock_ih = ixp425_intr_establish(IXP425_INT_TMR0, IPL_CLOCK, 171 ixpclk_intr, NULL); 172 if (clock_ih == NULL) 173 panic("cpu_initclocks: unable to register timer interrupt"); 174 175 #if defined(PERFCTRS) 176 pmu_ih = ixp425_intr_establish(IXP425_INT_XPMU, IPL_STATCLOCK, 177 xscale_pmc_dispatch, NULL); 178 if (pmu_ih == NULL) 179 panic("cpu_initclocks: unable to register timer interrupt"); 180 #endif 181 182 /* Set up the new clock parameters. */ 183 184 /* clear interrupt */ 185 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS, 186 OST_WARM_RESET | OST_WDOG_INT | OST_TS_INT | 187 OST_TIM1_INT | OST_TIM0_INT); 188 189 counts_per_hz = COUNTS_PER_SEC / hz; 190 191 /* reload value & Timer enable */ 192 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_TIM0_RELOAD, 193 (counts_per_hz & TIMERRELOAD_MASK) | OST_TIMER_EN); 194 195 restore_interrupts(oldirqstate); 196 197 tc_init(&ixpclk_timecounter); 198 } 199 200 /* 201 * setstatclockrate: 202 * 203 * Set the rate of the statistics clock. 204 * 205 * We assume that hz is either stathz or profhz, and that neither 206 * will change after being set by cpu_initclocks(). We could 207 * recalculate the intervals here, but that would be a pain. 208 */ 209 void 210 setstatclockrate(int newhz) 211 { 212 213 /* 214 * XXX Use TMR1? 215 */ 216 } 217 218 static u_int 219 ixpclk_get_timecount(struct timecounter *tc) 220 { 221 u_int savedints, base, counter; 222 223 savedints = disable_interrupts(I32_bit); 224 base = ixpclk_base; 225 counter = GET_TIMER_VALUE(ixpclk_sc); 226 restore_interrupts(savedints); 227 228 return base - counter; 229 } 230 231 /* 232 * delay: 233 * 234 * Delay for at least N microseconds. 235 */ 236 void 237 delay(u_int n) 238 { 239 u_int32_t first, last; 240 int usecs; 241 242 if (n == 0) 243 return; 244 245 /* 246 * Clamp the timeout at a maximum value (about 32 seconds with 247 * a 66MHz clock). *Nobody* should be delay()ing for anywhere 248 * near that length of time and if they are, they should be hung 249 * out to dry. 250 */ 251 if (n >= (0x80000000U / COUNTS_PER_USEC)) 252 usecs = (0x80000000U / COUNTS_PER_USEC) - 1; 253 else 254 usecs = n * COUNTS_PER_USEC; 255 256 /* Note: Timestamp timer counts *up*, unlike the other timers */ 257 first = GET_TS_VALUE(); 258 259 while (usecs > 0) { 260 last = GET_TS_VALUE(); 261 usecs -= (int)(last - first); 262 first = last; 263 } 264 } 265 266 /* 267 * ixpclk_intr: 268 * 269 * Handle the hardclock interrupt. 270 */ 271 int 272 ixpclk_intr(void *arg) 273 { 274 struct ixpclk_softc* sc = ixpclk_sc; 275 struct clockframe *frame = arg; 276 277 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS, 278 OST_TIM0_INT); 279 280 atomic_add_32(&ixpclk_base, counts_per_hz); 281 282 hardclock(frame); 283 284 return (1); 285 } 286
Indexes created Sun Oct 12 02:09:55 GMT 2025