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pxa2x0_ohci.c revision 1.2
      1  1.2  chris /*	$NetBSD: pxa2x0_ohci.c,v 1.2 2008/03/31 23:18:49 chris Exp $	*/
      2  1.1  peter /*	$OpenBSD: pxa2x0_ohci.c,v 1.19 2005/04/08 02:32:54 dlg Exp $ */
      3  1.1  peter 
      4  1.1  peter /*
      5  1.1  peter  * Copyright (c) 2005 David Gwynne <dlg (at) openbsd.org>
      6  1.1  peter  *
      7  1.1  peter  * Permission to use, copy, modify, and distribute this software for any
      8  1.1  peter  * purpose with or without fee is hereby granted, provided that the above
      9  1.1  peter  * copyright notice and this permission notice appear in all copies.
     10  1.1  peter  *
     11  1.1  peter  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12  1.1  peter  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13  1.1  peter  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14  1.1  peter  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15  1.1  peter  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16  1.1  peter  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17  1.1  peter  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18  1.1  peter  */
     19  1.1  peter 
     20  1.1  peter #include <sys/param.h>
     21  1.1  peter #include <sys/systm.h>
     22  1.1  peter #include <sys/device.h>
     23  1.1  peter #include <sys/kernel.h>
     24  1.1  peter 
     25  1.1  peter #include <machine/intr.h>
     26  1.1  peter #include <machine/bus.h>
     27  1.1  peter 
     28  1.1  peter #include <dev/usb/usb.h>
     29  1.1  peter #include <dev/usb/usbdi.h>
     30  1.1  peter #include <dev/usb/usbdivar.h>
     31  1.1  peter #include <dev/usb/usb_mem.h>
     32  1.1  peter 
     33  1.1  peter #include <dev/usb/ohcireg.h>
     34  1.1  peter #include <dev/usb/ohcivar.h>
     35  1.1  peter 
     36  1.1  peter #include <arm/xscale/pxa2x0cpu.h>
     37  1.1  peter #include <arm/xscale/pxa2x0reg.h>
     38  1.1  peter #include <arm/xscale/pxa2x0var.h>
     39  1.1  peter #include <arm/xscale/pxa2x0_gpio.h>
     40  1.1  peter 
     41  1.1  peter struct pxaohci_softc {
     42  1.1  peter 	ohci_softc_t	sc;
     43  1.1  peter 
     44  1.1  peter 	void		*sc_ih;
     45  1.1  peter };
     46  1.1  peter 
     47  1.2  chris #if 0
     48  1.1  peter static void	pxaohci_power(int, void *);
     49  1.2  chris #endif
     50  1.1  peter static void	pxaohci_enable(struct pxaohci_softc *);
     51  1.1  peter static void	pxaohci_disable(struct pxaohci_softc *);
     52  1.1  peter 
     53  1.1  peter #define	HREAD4(sc,r)	bus_space_read_4((sc)->sc.iot, (sc)->sc.ioh, (r))
     54  1.1  peter #define	HWRITE4(sc,r,v)	bus_space_write_4((sc)->sc.iot, (sc)->sc.ioh, (r), (v))
     55  1.1  peter 
     56  1.1  peter static int
     57  1.2  chris pxaohci_match(device_t parent, struct cfdata *cf, void *aux)
     58  1.1  peter {
     59  1.1  peter 
     60  1.1  peter 	if (CPU_IS_PXA270)
     61  1.1  peter 		return 1;
     62  1.1  peter 	return 0;
     63  1.1  peter }
     64  1.1  peter 
     65  1.1  peter static void
     66  1.2  chris pxaohci_attach(device_t parent, device_t self, void *aux)
     67  1.1  peter {
     68  1.2  chris 	struct pxaohci_softc *sc = device_private(self);
     69  1.1  peter 	struct pxaip_attach_args *pxa = aux;
     70  1.1  peter 	usbd_status r;
     71  1.2  chris 	const char *devname = device_xname(self);
     72  1.1  peter 
     73  1.2  chris #ifdef USB_DEBUG
     74  1.1  peter 	{
     75  1.2  chris 		//extern int ohcidebug;
     76  1.2  chris 		//ohcidebug = 16;
     77  1.1  peter 	}
     78  1.2  chris #endif
     79  1.1  peter 
     80  1.1  peter 	sc->sc.iot = pxa->pxa_iot;
     81  1.1  peter 	sc->sc.sc_bus.dmatag = pxa->pxa_dmat;
     82  1.1  peter 	sc->sc.sc_size = 0;
     83  1.1  peter 	sc->sc_ih = NULL;
     84  1.2  chris 	sc->sc.sc_dev = self;
     85  1.1  peter 
     86  1.1  peter 	/* Map I/O space */
     87  1.1  peter 	if (bus_space_map(sc->sc.iot, PXA2X0_USBHC_BASE, PXA2X0_USBHC_SIZE, 0,
     88  1.1  peter 	    &sc->sc.ioh)) {
     89  1.1  peter 		aprint_error(": couldn't map memory space\n");
     90  1.1  peter 		return;
     91  1.1  peter 	}
     92  1.1  peter 	sc->sc.sc_size = PXA2X0_USBHC_SIZE;
     93  1.1  peter 
     94  1.1  peter 	/* XXX copied from ohci_pci.c. needed? */
     95  1.1  peter 	bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
     96  1.1  peter 	    BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
     97  1.1  peter 
     98  1.1  peter 	/* start the usb clock */
     99  1.1  peter 	pxa2x0_clkman_config(CKEN_USBHC, 1);
    100  1.1  peter 	pxaohci_enable(sc);
    101  1.1  peter 
    102  1.1  peter 	/* Disable interrupts, so we don't get any spurious ones. */
    103  1.1  peter 	bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
    104  1.1  peter 	    OHCI_MIE);
    105  1.1  peter 
    106  1.1  peter 	sc->sc_ih = pxa2x0_intr_establish(PXA2X0_INT_USBH1, IPL_USB,
    107  1.1  peter 	    ohci_intr, &sc->sc);
    108  1.1  peter 	if (sc->sc_ih == NULL) {
    109  1.1  peter 		aprint_error(": unable to establish interrupt\n");
    110  1.1  peter 		goto free_map;
    111  1.1  peter 	}
    112  1.1  peter 
    113  1.1  peter 	strlcpy(sc->sc.sc_vendor, "PXA27x", sizeof(sc->sc.sc_vendor));
    114  1.1  peter 	r = ohci_init(&sc->sc);
    115  1.1  peter 	if (r != USBD_NORMAL_COMPLETION) {
    116  1.1  peter 		aprint_error("%s: init failed, error=%d\n",
    117  1.2  chris 		    devname, r);
    118  1.1  peter 		goto free_intr;
    119  1.1  peter 	}
    120  1.1  peter 
    121  1.2  chris #if 0
    122  1.1  peter 	sc->sc.sc_powerhook = powerhook_establish(sc->sc.sc_bus.bdev.dv_xname,
    123  1.1  peter 	    pxaohci_power, sc);
    124  1.1  peter 	if (sc->sc.sc_powerhook == NULL) {
    125  1.1  peter 		aprint_error("%s: cannot establish powerhook\n",
    126  1.1  peter 		    sc->sc.sc_bus.bdev.dv_xname);
    127  1.1  peter 	}
    128  1.2  chris #endif
    129  1.1  peter 
    130  1.2  chris 	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
    131  1.1  peter 
    132  1.1  peter 	return;
    133  1.1  peter 
    134  1.1  peter free_intr:
    135  1.1  peter 	pxa2x0_intr_disestablish(sc->sc_ih);
    136  1.1  peter 	sc->sc_ih = NULL;
    137  1.1  peter free_map:
    138  1.1  peter 	pxaohci_disable(sc);
    139  1.1  peter 	pxa2x0_clkman_config(CKEN_USBHC, 0);
    140  1.1  peter 	bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    141  1.1  peter 	sc->sc.sc_size = 0;
    142  1.1  peter }
    143  1.1  peter 
    144  1.1  peter static int
    145  1.2  chris pxaohci_detach(device_t self, int flags)
    146  1.1  peter {
    147  1.2  chris 	struct pxaohci_softc *sc = device_private(self);
    148  1.1  peter 	int error;
    149  1.1  peter 
    150  1.1  peter 	error = ohci_detach(&sc->sc, flags);
    151  1.1  peter 	if (error)
    152  1.1  peter 		return error;
    153  1.1  peter 
    154  1.2  chris #if 0
    155  1.1  peter 	if (sc->sc.sc_powerhook) {
    156  1.1  peter 		powerhook_disestablish(sc->sc.sc_powerhook);
    157  1.1  peter 		sc->sc.sc_powerhook = NULL;
    158  1.1  peter 	}
    159  1.2  chris #endif
    160  1.1  peter 
    161  1.1  peter 	if (sc->sc_ih) {
    162  1.1  peter 		pxa2x0_intr_disestablish(sc->sc_ih);
    163  1.1  peter 		sc->sc_ih = NULL;
    164  1.1  peter 	}
    165  1.1  peter 
    166  1.1  peter 	pxaohci_disable(sc);
    167  1.1  peter 
    168  1.1  peter 	/* stop clock */
    169  1.1  peter 	pxa2x0_clkman_config(CKEN_USBHC, 0);
    170  1.1  peter 
    171  1.1  peter 	if (sc->sc.sc_size) {
    172  1.1  peter 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
    173  1.1  peter 		sc->sc.sc_size = 0;
    174  1.1  peter 	}
    175  1.1  peter 
    176  1.1  peter 	return 0;
    177  1.1  peter }
    178  1.1  peter 
    179  1.2  chris #if 0
    180  1.1  peter static void
    181  1.1  peter pxaohci_power(int why, void *arg)
    182  1.1  peter {
    183  1.1  peter 	struct pxaohci_softc *sc = (struct pxaohci_softc *)arg;
    184  1.1  peter 	int s;
    185  1.1  peter 
    186  1.1  peter 	s = splhardusb();
    187  1.1  peter 	sc->sc.sc_bus.use_polling++;
    188  1.1  peter 	switch (why) {
    189  1.1  peter 	case PWR_STANDBY:
    190  1.1  peter 	case PWR_SUSPEND:
    191  1.1  peter #if 0
    192  1.1  peter 		ohci_power(why, &sc->sc);
    193  1.1  peter #endif
    194  1.1  peter 		pxa2x0_clkman_config(CKEN_USBHC, 0);
    195  1.1  peter 		break;
    196  1.1  peter 
    197  1.1  peter 	case PWR_RESUME:
    198  1.1  peter 		pxa2x0_clkman_config(CKEN_USBHC, 1);
    199  1.1  peter 		pxaohci_enable(sc);
    200  1.1  peter #if 0
    201  1.1  peter 		ohci_power(why, &sc->sc);
    202  1.1  peter #endif
    203  1.1  peter 		break;
    204  1.1  peter 	}
    205  1.1  peter 	sc->sc.sc_bus.use_polling--;
    206  1.1  peter 	splx(s);
    207  1.1  peter }
    208  1.2  chris #endif
    209  1.1  peter 
    210  1.1  peter static void
    211  1.1  peter pxaohci_enable(struct pxaohci_softc *sc)
    212  1.1  peter {
    213  1.1  peter 	uint32_t hr;
    214  1.1  peter 
    215  1.1  peter 	/* Full host reset */
    216  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    217  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR);
    218  1.1  peter 
    219  1.1  peter 	DELAY(USBHC_RST_WAIT);
    220  1.1  peter 
    221  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    222  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR));
    223  1.1  peter 
    224  1.1  peter 	/* Force system bus interface reset */
    225  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    226  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FSBIR);
    227  1.1  peter 
    228  1.1  peter 	while (HREAD4(sc, USBHC_HR) & USBHC_HR_FSBIR)
    229  1.1  peter 		DELAY(3);
    230  1.1  peter 
    231  1.1  peter 	/* Enable the ports (physically only one, only enable that one?) */
    232  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    233  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSE));
    234  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    235  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSEP2));
    236  1.1  peter }
    237  1.1  peter 
    238  1.1  peter static void
    239  1.1  peter pxaohci_disable(struct pxaohci_softc *sc)
    240  1.1  peter {
    241  1.1  peter 	uint32_t hr;
    242  1.1  peter 
    243  1.1  peter 	/* Full host reset */
    244  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    245  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR);
    246  1.1  peter 
    247  1.1  peter 	DELAY(USBHC_RST_WAIT);
    248  1.1  peter 
    249  1.1  peter 	hr = HREAD4(sc, USBHC_HR);
    250  1.1  peter 	HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR));
    251  1.1  peter }
    252  1.2  chris 
    253  1.2  chris 
    254  1.2  chris CFATTACH_DECL2_NEW(pxaohci, sizeof(struct pxaohci_softc),
    255  1.2  chris     pxaohci_match, pxaohci_attach, pxaohci_detach, ohci_activate, NULL,
    256  1.2  chris     ohci_childdet);
    257  1.2  chris 
    258  1.2  chris 
    259