pxa2x0_ohci.c revision 1.2
1 /* $NetBSD: pxa2x0_ohci.c,v 1.2 2008/03/31 23:18:49 chris Exp $ */ 2 /* $OpenBSD: pxa2x0_ohci.c,v 1.19 2005/04/08 02:32:54 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005 David Gwynne <dlg (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/param.h> 21 #include <sys/systm.h> 22 #include <sys/device.h> 23 #include <sys/kernel.h> 24 25 #include <machine/intr.h> 26 #include <machine/bus.h> 27 28 #include <dev/usb/usb.h> 29 #include <dev/usb/usbdi.h> 30 #include <dev/usb/usbdivar.h> 31 #include <dev/usb/usb_mem.h> 32 33 #include <dev/usb/ohcireg.h> 34 #include <dev/usb/ohcivar.h> 35 36 #include <arm/xscale/pxa2x0cpu.h> 37 #include <arm/xscale/pxa2x0reg.h> 38 #include <arm/xscale/pxa2x0var.h> 39 #include <arm/xscale/pxa2x0_gpio.h> 40 41 struct pxaohci_softc { 42 ohci_softc_t sc; 43 44 void *sc_ih; 45 }; 46 47 #if 0 48 static void pxaohci_power(int, void *); 49 #endif 50 static void pxaohci_enable(struct pxaohci_softc *); 51 static void pxaohci_disable(struct pxaohci_softc *); 52 53 #define HREAD4(sc,r) bus_space_read_4((sc)->sc.iot, (sc)->sc.ioh, (r)) 54 #define HWRITE4(sc,r,v) bus_space_write_4((sc)->sc.iot, (sc)->sc.ioh, (r), (v)) 55 56 static int 57 pxaohci_match(device_t parent, struct cfdata *cf, void *aux) 58 { 59 60 if (CPU_IS_PXA270) 61 return 1; 62 return 0; 63 } 64 65 static void 66 pxaohci_attach(device_t parent, device_t self, void *aux) 67 { 68 struct pxaohci_softc *sc = device_private(self); 69 struct pxaip_attach_args *pxa = aux; 70 usbd_status r; 71 const char *devname = device_xname(self); 72 73 #ifdef USB_DEBUG 74 { 75 //extern int ohcidebug; 76 //ohcidebug = 16; 77 } 78 #endif 79 80 sc->sc.iot = pxa->pxa_iot; 81 sc->sc.sc_bus.dmatag = pxa->pxa_dmat; 82 sc->sc.sc_size = 0; 83 sc->sc_ih = NULL; 84 sc->sc.sc_dev = self; 85 86 /* Map I/O space */ 87 if (bus_space_map(sc->sc.iot, PXA2X0_USBHC_BASE, PXA2X0_USBHC_SIZE, 0, 88 &sc->sc.ioh)) { 89 aprint_error(": couldn't map memory space\n"); 90 return; 91 } 92 sc->sc.sc_size = PXA2X0_USBHC_SIZE; 93 94 /* XXX copied from ohci_pci.c. needed? */ 95 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size, 96 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 97 98 /* start the usb clock */ 99 pxa2x0_clkman_config(CKEN_USBHC, 1); 100 pxaohci_enable(sc); 101 102 /* Disable interrupts, so we don't get any spurious ones. */ 103 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 104 OHCI_MIE); 105 106 sc->sc_ih = pxa2x0_intr_establish(PXA2X0_INT_USBH1, IPL_USB, 107 ohci_intr, &sc->sc); 108 if (sc->sc_ih == NULL) { 109 aprint_error(": unable to establish interrupt\n"); 110 goto free_map; 111 } 112 113 strlcpy(sc->sc.sc_vendor, "PXA27x", sizeof(sc->sc.sc_vendor)); 114 r = ohci_init(&sc->sc); 115 if (r != USBD_NORMAL_COMPLETION) { 116 aprint_error("%s: init failed, error=%d\n", 117 devname, r); 118 goto free_intr; 119 } 120 121 #if 0 122 sc->sc.sc_powerhook = powerhook_establish(sc->sc.sc_bus.bdev.dv_xname, 123 pxaohci_power, sc); 124 if (sc->sc.sc_powerhook == NULL) { 125 aprint_error("%s: cannot establish powerhook\n", 126 sc->sc.sc_bus.bdev.dv_xname); 127 } 128 #endif 129 130 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 131 132 return; 133 134 free_intr: 135 pxa2x0_intr_disestablish(sc->sc_ih); 136 sc->sc_ih = NULL; 137 free_map: 138 pxaohci_disable(sc); 139 pxa2x0_clkman_config(CKEN_USBHC, 0); 140 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 141 sc->sc.sc_size = 0; 142 } 143 144 static int 145 pxaohci_detach(device_t self, int flags) 146 { 147 struct pxaohci_softc *sc = device_private(self); 148 int error; 149 150 error = ohci_detach(&sc->sc, flags); 151 if (error) 152 return error; 153 154 #if 0 155 if (sc->sc.sc_powerhook) { 156 powerhook_disestablish(sc->sc.sc_powerhook); 157 sc->sc.sc_powerhook = NULL; 158 } 159 #endif 160 161 if (sc->sc_ih) { 162 pxa2x0_intr_disestablish(sc->sc_ih); 163 sc->sc_ih = NULL; 164 } 165 166 pxaohci_disable(sc); 167 168 /* stop clock */ 169 pxa2x0_clkman_config(CKEN_USBHC, 0); 170 171 if (sc->sc.sc_size) { 172 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 173 sc->sc.sc_size = 0; 174 } 175 176 return 0; 177 } 178 179 #if 0 180 static void 181 pxaohci_power(int why, void *arg) 182 { 183 struct pxaohci_softc *sc = (struct pxaohci_softc *)arg; 184 int s; 185 186 s = splhardusb(); 187 sc->sc.sc_bus.use_polling++; 188 switch (why) { 189 case PWR_STANDBY: 190 case PWR_SUSPEND: 191 #if 0 192 ohci_power(why, &sc->sc); 193 #endif 194 pxa2x0_clkman_config(CKEN_USBHC, 0); 195 break; 196 197 case PWR_RESUME: 198 pxa2x0_clkman_config(CKEN_USBHC, 1); 199 pxaohci_enable(sc); 200 #if 0 201 ohci_power(why, &sc->sc); 202 #endif 203 break; 204 } 205 sc->sc.sc_bus.use_polling--; 206 splx(s); 207 } 208 #endif 209 210 static void 211 pxaohci_enable(struct pxaohci_softc *sc) 212 { 213 uint32_t hr; 214 215 /* Full host reset */ 216 hr = HREAD4(sc, USBHC_HR); 217 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR); 218 219 DELAY(USBHC_RST_WAIT); 220 221 hr = HREAD4(sc, USBHC_HR); 222 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR)); 223 224 /* Force system bus interface reset */ 225 hr = HREAD4(sc, USBHC_HR); 226 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FSBIR); 227 228 while (HREAD4(sc, USBHC_HR) & USBHC_HR_FSBIR) 229 DELAY(3); 230 231 /* Enable the ports (physically only one, only enable that one?) */ 232 hr = HREAD4(sc, USBHC_HR); 233 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSE)); 234 hr = HREAD4(sc, USBHC_HR); 235 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSEP2)); 236 } 237 238 static void 239 pxaohci_disable(struct pxaohci_softc *sc) 240 { 241 uint32_t hr; 242 243 /* Full host reset */ 244 hr = HREAD4(sc, USBHC_HR); 245 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR); 246 247 DELAY(USBHC_RST_WAIT); 248 249 hr = HREAD4(sc, USBHC_HR); 250 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR)); 251 } 252 253 254 CFATTACH_DECL2_NEW(pxaohci, sizeof(struct pxaohci_softc), 255 pxaohci_match, pxaohci_attach, pxaohci_detach, ohci_activate, NULL, 256 ohci_childdet); 257 258 259
Indexes created Tue Oct 21 12:09:54 GMT 2025