pxa2x0_ohci.c revision 1.3
1 /* $NetBSD: pxa2x0_ohci.c,v 1.3 2008/04/04 17:44:43 drochner Exp $ */ 2 /* $OpenBSD: pxa2x0_ohci.c,v 1.19 2005/04/08 02:32:54 dlg Exp $ */ 3 4 /* 5 * Copyright (c) 2005 David Gwynne <dlg (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/param.h> 21 #include <sys/systm.h> 22 #include <sys/device.h> 23 #include <sys/kernel.h> 24 25 #include <machine/intr.h> 26 #include <machine/bus.h> 27 28 #include <dev/usb/usb.h> 29 #include <dev/usb/usbdi.h> 30 #include <dev/usb/usbdivar.h> 31 #include <dev/usb/usb_mem.h> 32 33 #include <dev/usb/ohcireg.h> 34 #include <dev/usb/ohcivar.h> 35 36 #include <arm/xscale/pxa2x0cpu.h> 37 #include <arm/xscale/pxa2x0reg.h> 38 #include <arm/xscale/pxa2x0var.h> 39 #include <arm/xscale/pxa2x0_gpio.h> 40 41 struct pxaohci_softc { 42 ohci_softc_t sc; 43 44 void *sc_ih; 45 }; 46 47 #if 0 48 static void pxaohci_power(int, void *); 49 #endif 50 static void pxaohci_enable(struct pxaohci_softc *); 51 static void pxaohci_disable(struct pxaohci_softc *); 52 53 #define HREAD4(sc,r) bus_space_read_4((sc)->sc.iot, (sc)->sc.ioh, (r)) 54 #define HWRITE4(sc,r,v) bus_space_write_4((sc)->sc.iot, (sc)->sc.ioh, (r), (v)) 55 56 static int 57 pxaohci_match(device_t parent, struct cfdata *cf, void *aux) 58 { 59 60 if (CPU_IS_PXA270) 61 return 1; 62 return 0; 63 } 64 65 static void 66 pxaohci_attach(device_t parent, device_t self, void *aux) 67 { 68 struct pxaohci_softc *sc = device_private(self); 69 struct pxaip_attach_args *pxa = aux; 70 usbd_status r; 71 const char *devname = device_xname(self); 72 73 #ifdef USB_DEBUG 74 { 75 //extern int ohcidebug; 76 //ohcidebug = 16; 77 } 78 #endif 79 80 sc->sc.iot = pxa->pxa_iot; 81 sc->sc.sc_bus.dmatag = pxa->pxa_dmat; 82 sc->sc.sc_size = 0; 83 sc->sc_ih = NULL; 84 sc->sc.sc_dev = self; 85 sc->sc.sc_bus.hci_private = sc; 86 87 /* Map I/O space */ 88 if (bus_space_map(sc->sc.iot, PXA2X0_USBHC_BASE, PXA2X0_USBHC_SIZE, 0, 89 &sc->sc.ioh)) { 90 aprint_error(": couldn't map memory space\n"); 91 return; 92 } 93 sc->sc.sc_size = PXA2X0_USBHC_SIZE; 94 95 /* XXX copied from ohci_pci.c. needed? */ 96 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size, 97 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 98 99 /* start the usb clock */ 100 pxa2x0_clkman_config(CKEN_USBHC, 1); 101 pxaohci_enable(sc); 102 103 /* Disable interrupts, so we don't get any spurious ones. */ 104 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 105 OHCI_MIE); 106 107 sc->sc_ih = pxa2x0_intr_establish(PXA2X0_INT_USBH1, IPL_USB, 108 ohci_intr, &sc->sc); 109 if (sc->sc_ih == NULL) { 110 aprint_error(": unable to establish interrupt\n"); 111 goto free_map; 112 } 113 114 strlcpy(sc->sc.sc_vendor, "PXA27x", sizeof(sc->sc.sc_vendor)); 115 r = ohci_init(&sc->sc); 116 if (r != USBD_NORMAL_COMPLETION) { 117 aprint_error("%s: init failed, error=%d\n", 118 devname, r); 119 goto free_intr; 120 } 121 122 #if 0 123 sc->sc.sc_powerhook = powerhook_establish(sc->sc.sc_bus.bdev.dv_xname, 124 pxaohci_power, sc); 125 if (sc->sc.sc_powerhook == NULL) { 126 aprint_error("%s: cannot establish powerhook\n", 127 sc->sc.sc_bus.bdev.dv_xname); 128 } 129 #endif 130 131 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 132 133 return; 134 135 free_intr: 136 pxa2x0_intr_disestablish(sc->sc_ih); 137 sc->sc_ih = NULL; 138 free_map: 139 pxaohci_disable(sc); 140 pxa2x0_clkman_config(CKEN_USBHC, 0); 141 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 142 sc->sc.sc_size = 0; 143 } 144 145 static int 146 pxaohci_detach(device_t self, int flags) 147 { 148 struct pxaohci_softc *sc = device_private(self); 149 int error; 150 151 error = ohci_detach(&sc->sc, flags); 152 if (error) 153 return error; 154 155 #if 0 156 if (sc->sc.sc_powerhook) { 157 powerhook_disestablish(sc->sc.sc_powerhook); 158 sc->sc.sc_powerhook = NULL; 159 } 160 #endif 161 162 if (sc->sc_ih) { 163 pxa2x0_intr_disestablish(sc->sc_ih); 164 sc->sc_ih = NULL; 165 } 166 167 pxaohci_disable(sc); 168 169 /* stop clock */ 170 pxa2x0_clkman_config(CKEN_USBHC, 0); 171 172 if (sc->sc.sc_size) { 173 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 174 sc->sc.sc_size = 0; 175 } 176 177 return 0; 178 } 179 180 #if 0 181 static void 182 pxaohci_power(int why, void *arg) 183 { 184 struct pxaohci_softc *sc = (struct pxaohci_softc *)arg; 185 int s; 186 187 s = splhardusb(); 188 sc->sc.sc_bus.use_polling++; 189 switch (why) { 190 case PWR_STANDBY: 191 case PWR_SUSPEND: 192 #if 0 193 ohci_power(why, &sc->sc); 194 #endif 195 pxa2x0_clkman_config(CKEN_USBHC, 0); 196 break; 197 198 case PWR_RESUME: 199 pxa2x0_clkman_config(CKEN_USBHC, 1); 200 pxaohci_enable(sc); 201 #if 0 202 ohci_power(why, &sc->sc); 203 #endif 204 break; 205 } 206 sc->sc.sc_bus.use_polling--; 207 splx(s); 208 } 209 #endif 210 211 static void 212 pxaohci_enable(struct pxaohci_softc *sc) 213 { 214 uint32_t hr; 215 216 /* Full host reset */ 217 hr = HREAD4(sc, USBHC_HR); 218 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR); 219 220 DELAY(USBHC_RST_WAIT); 221 222 hr = HREAD4(sc, USBHC_HR); 223 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR)); 224 225 /* Force system bus interface reset */ 226 hr = HREAD4(sc, USBHC_HR); 227 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FSBIR); 228 229 while (HREAD4(sc, USBHC_HR) & USBHC_HR_FSBIR) 230 DELAY(3); 231 232 /* Enable the ports (physically only one, only enable that one?) */ 233 hr = HREAD4(sc, USBHC_HR); 234 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSE)); 235 hr = HREAD4(sc, USBHC_HR); 236 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_SSEP2)); 237 } 238 239 static void 240 pxaohci_disable(struct pxaohci_softc *sc) 241 { 242 uint32_t hr; 243 244 /* Full host reset */ 245 hr = HREAD4(sc, USBHC_HR); 246 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) | USBHC_HR_FHR); 247 248 DELAY(USBHC_RST_WAIT); 249 250 hr = HREAD4(sc, USBHC_HR); 251 HWRITE4(sc, USBHC_HR, (hr & USBHC_HR_MASK) & ~(USBHC_HR_FHR)); 252 } 253 254 255 CFATTACH_DECL2_NEW(pxaohci, sizeof(struct pxaohci_softc), 256 pxaohci_match, pxaohci_attach, pxaohci_detach, ohci_activate, NULL, 257 ohci_childdet); 258 259 260
Indexes created Tue Oct 21 12:09:54 GMT 2025