wdc_mb.c revision 1.1.2.4
1 /* $NetBSD: wdc_mb.c,v 1.1.2.4 1998/08/13 14:37:52 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 5 * 6 * DMA and multi-sector PIO handling are derived from code contributed by 7 * Onno van der Linden. 8 * 9 * ISA attachment created by Christopher G. Demetriou. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 43 #include <machine/cpu.h> 44 #include <machine/bus.h> 45 #include <machine/iomap.h> 46 #include <machine/mfp.h> 47 #include <machine/dma.h> 48 49 #include <dev/ata/atavar.h> 50 #include <dev/ic/wdcvar.h> 51 52 #include <m68k/asm_single.h> 53 54 #include <atari/dev/ym2149reg.h> 55 #include <atari/atari/device.h> 56 57 /* 58 * XXX This code currently doesn't even try to allow 32-bit data port use. 59 */ 60 static int claim_hw __P((void *, int)); 61 static void free_hw __P((void *)); 62 static void read_multi_2_swap __P((bus_space_tag_t, bus_space_handle_t, 63 bus_size_t, u_int16_t *, bus_size_t)); 64 static void write_multi_2_swap __P((bus_space_tag_t, bus_space_handle_t, 65 bus_size_t, const u_int16_t *, bus_size_t)); 66 67 struct wdc_mb_softc { 68 struct wdc_softc sc_wdcdev; 69 struct channel_softc wdc_channel; 70 void *sc_ih; 71 }; 72 73 int wdc_mb_probe __P((struct device *, struct cfdata *, void *)); 74 void wdc_mb_attach __P((struct device *, struct device *, void *)); 75 76 struct cfattach wdc_mb_ca = { 77 sizeof(struct wdc_mb_softc), wdc_mb_probe, wdc_mb_attach 78 }; 79 80 int 81 wdc_mb_probe(parent, cfp, aux) 82 struct device *parent; 83 struct cfdata *cfp; 84 void *aux; 85 { 86 struct channel_softc ch = { 0 }; 87 int result = 0; 88 u_char sv_ierb; 89 90 if ((machineid & ATARI_TT) || strcmp("wdc", aux) || cfp->cf_unit != 0) 91 return 0; 92 if (!atari_realconfig) 93 return 0; 94 95 ch.cmd_iot = ch.ctl_iot = mb_alloc_bus_space_tag(); 96 if (ch.cmd_iot == NULL) 97 return 0; 98 ch.cmd_iot->stride = 2; 99 ch.cmd_iot->wo_1 = 1; 100 101 if (bus_space_map(ch.cmd_iot, 0xfff00000, 0x40, 0, &ch.cmd_ioh)) 102 return 0; 103 if (bus_space_subregion(ch.cmd_iot, ch.cmd_ioh, 0x38, 1, &ch.ctl_ioh)) 104 return 0; 105 106 /* 107 * Make sure IDE interrupts are disabled during probing. 108 */ 109 sv_ierb = MFP->mf_ierb; 110 MFP->mf_ierb &= ~IB_DINT; 111 112 /* 113 * Make sure that IDE is turned on on the Falcon. 114 */ 115 if (machineid & ATARI_FALCON) 116 ym2149_ser2(0); 117 118 result = wdcprobe(&ch); 119 120 MFP->mf_ierb = sv_ierb; 121 122 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, 0x40); 123 mb_free_bus_space_tag(ch.cmd_iot); 124 125 return (result); 126 } 127 128 void 129 wdc_mb_attach(parent, self, aux) 130 struct device *parent, *self; 131 void *aux; 132 { 133 struct wdc_mb_softc *sc = (void *)self; 134 135 printf("\n"); 136 137 sc->wdc_channel.cmd_iot = sc->wdc_channel.ctl_iot = 138 mb_alloc_bus_space_tag(); 139 sc->wdc_channel.cmd_iot->stride = 2; 140 sc->wdc_channel.cmd_iot->wo_1 = 1; 141 sc->wdc_channel.cmd_iot->abs_rms_2 = read_multi_2_swap; 142 sc->wdc_channel.cmd_iot->abs_wms_2 = write_multi_2_swap; 143 if (bus_space_map(sc->wdc_channel.cmd_iot, 0xfff00000, 0x40, 0, 144 &sc->wdc_channel.cmd_ioh)) { 145 printf("%s: couldn't map registers\n", 146 sc->sc_wdcdev.sc_dev.dv_xname); 147 return; 148 } 149 if (bus_space_subregion(sc->wdc_channel.cmd_iot, 150 sc->wdc_channel.cmd_ioh, 0x38, 1, &sc->wdc_channel.ctl_ioh)) 151 return; 152 153 /* 154 * Play a nasty trick here. Normally we only manipulate the 155 * interrupt *mask*. However to defeat wd_get_parms(), we 156 * disable the interrupts here using the *enable* register. 157 */ 158 MFP->mf_ierb &= ~IB_DINT; 159 160 sc->sc_wdcdev.cap |= WDC_CAPABILITY_HWLOCK|WDC_CAPABILITY_ATA_NOSTREAM; 161 sc->sc_wdcdev.pio_mode = 0; 162 sc->sc_wdcdev.claim_hw = &claim_hw; 163 sc->sc_wdcdev.free_hw = &free_hw; 164 sc->sc_wdcdev.channels = &sc->wdc_channel; 165 sc->sc_wdcdev.nchannels = 1; 166 sc->wdc_channel.channel = 0; 167 sc->wdc_channel.wdc = &sc->sc_wdcdev; 168 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 169 M_DEVBUF, M_NOWAIT); 170 if (sc->wdc_channel.ch_queue == NULL) { 171 printf("%s: can't allocate memory for command queue", 172 sc->sc_wdcdev.sc_dev.dv_xname); 173 return; 174 } 175 wdcattach(&sc->wdc_channel); 176 177 /* 178 * Setup & enable disk related interrupts. 179 */ 180 MFP->mf_ierb |= IB_DINT; 181 MFP->mf_iprb &= ~IB_DINT; 182 MFP->mf_imrb |= IB_DINT; 183 } 184 185 /* 186 * Hardware locking 187 */ 188 static int wd_lock; 189 190 static int 191 claim_hw(softc, maysleep) 192 void *softc; 193 int maysleep; 194 { 195 if (wd_lock != DMA_LOCK_GRANT) { 196 if (wd_lock == DMA_LOCK_REQ) { 197 /* 198 * ST_DMA access is being claimed. 199 */ 200 return 0; 201 } 202 if (!st_dmagrab((dma_farg)wdcintr, 203 (dma_farg)(maysleep ? NULL : wdcrestart), softc, 204 &wd_lock, 1)) 205 return 0; 206 } 207 return 1; 208 } 209 210 static void 211 free_hw(softc) 212 void *softc; 213 { 214 /* 215 * Flush pending interrupts before giving-up lock 216 */ 217 single_inst_bclr_b(MFP->mf_iprb, IB_DINT); 218 219 /* 220 * Only free the lock on a Falcon. On the Hades, keep it. 221 */ 222 /* if (machineid & ATARI_FALCON) */ 223 st_dmafree(softc, &wd_lock); 224 } 225 226 /* 227 * XXX 228 * This piece of uglyness is caused by the fact that the byte lanes of 229 * the data-register are swapped on the atari. This works OK for an IDE 230 * disk, but turns into a nightmare when used on atapi devices. 231 */ 232 #define calc_addr(base, off, stride, wm) \ 233 ((u_long)(base) + ((off) << (stride)) + (wm)) 234 235 static void 236 read_multi_2_swap(t, h, o, a, c) 237 bus_space_tag_t t; 238 bus_space_handle_t h; 239 bus_size_t o, c; 240 u_int16_t *a; 241 { 242 u_int16_t *ba; 243 244 ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2); 245 for (; c; a++, c--) 246 *a = bswap16(*ba); 247 } 248 249 static void 250 write_multi_2_swap(t, h, o, a, c) 251 bus_space_tag_t t; 252 bus_space_handle_t h; 253 bus_size_t o, c; 254 const u_int16_t *a; 255 { 256 u_int16_t *ba; 257 258 ba = (u_int16_t *)calc_addr(h, o, t->stride, t->wo_2); 259 for (; c; a++, c--) 260 *ba = bswap16(*a); 261 } 262
Indexes created Tue Sep 30 11:09:46 GMT 2025