wdc_mb.c revision 1.38.28.1 1 /* $NetBSD: wdc_mb.c,v 1.38.28.1 2017/04/24 08:48:45 jdolecek Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: wdc_mb.c,v 1.38.28.1 2017/04/24 08:48:45 jdolecek Exp $");
34
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/malloc.h>
39 #include <sys/device.h>
40
41 #include <sys/bswap.h>
42 #include <machine/cpu.h>
43 #include <sys/bus.h>
44 #include <machine/iomap.h>
45 #include <machine/mfp.h>
46 #include <machine/dma.h>
47
48 #include <dev/ata/atavar.h>
49 #include <dev/ic/wdcvar.h>
50
51 #include <m68k/asm_single.h>
52
53 #include <atari/dev/ym2149reg.h>
54 #include <atari/atari/device.h>
55
56 /* Falcon IDE register locations (base and offsets). */
57 #define FALCON_WD_BASE 0xfff00000
58 #define FALCON_WD_LEN 0x40
59 #define FALCON_WD_AUX 0x38
60
61 /*
62 * XXX This code currently doesn't even try to allow 32-bit data port use.
63 */
64 static int claim_hw(struct ata_channel *, int);
65 static void free_hw(struct ata_channel *);
66 static void read_multi_2_swap(bus_space_tag_t, bus_space_handle_t,
67 bus_size_t, uint16_t *, bus_size_t);
68 static void write_multi_2_swap(bus_space_tag_t, bus_space_handle_t,
69 bus_size_t, const uint16_t *, bus_size_t);
70
71 struct wdc_mb_softc {
72 struct wdc_softc sc_wdcdev;
73 struct ata_channel *sc_chanlist[1];
74 struct ata_channel sc_channel;
75 struct wdc_regs sc_wdc_regs;
76 void *sc_ih;
77 };
78
79 int wdc_mb_probe(device_t, struct cfdata *, void *);
80 void wdc_mb_attach(device_t, device_t, void *);
81
82 CFATTACH_DECL_NEW(wdc_mb, sizeof(struct wdc_mb_softc),
83 wdc_mb_probe, wdc_mb_attach, NULL, NULL);
84
85 int
86 wdc_mb_probe(device_t parent, cfdata_t cfp, void *aux)
87 {
88 static int wdc_matched = 0;
89 struct ata_channel ch;
90 struct wdc_softc wdc;
91 struct wdc_regs wdr;
92 int result = 0, i;
93 uint8_t sv_ierb;
94
95 if ((machineid & ATARI_TT) || strcmp("wdc", aux) || wdc_matched)
96 return 0;
97 if (!atari_realconfig)
98 return 0;
99
100 memset(&wdc, 0, sizeof(wdc));
101 memset(&ch, 0, sizeof(ch));
102 ch.ch_atac = &wdc.sc_atac;
103 wdc.regs = &wdr;
104
105 wdr.cmd_iot = wdr.ctl_iot = mb_alloc_bus_space_tag();
106 if (wdr.cmd_iot == NULL)
107 return 0;
108 wdr.cmd_iot->stride = 0;
109 wdr.cmd_iot->wo_1 = 1;
110
111 if (bus_space_map(wdr.cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
112 &wdr.cmd_baseioh))
113 goto out;
114 for (i = 0; i < WDC_NREG; i++) {
115 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh,
116 i * 4, 4, &wdr.cmd_iohs[i]) != 0)
117 goto outunmap;
118 }
119 wdc_init_shadow_regs(&ch);
120
121 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_AUX, 4,
122 &wdr.ctl_ioh))
123 goto outunmap;
124
125 /*
126 * Make sure IDE interrupts are disabled during probing.
127 */
128 sv_ierb = MFP->mf_ierb;
129 MFP->mf_ierb &= ~IB_DINT;
130
131 /*
132 * Make sure that IDE is turned on on the Falcon.
133 */
134 if (machineid & ATARI_FALCON)
135 ym2149_ser2(0);
136
137 result = wdcprobe(&ch);
138
139 MFP->mf_ierb = sv_ierb;
140
141 outunmap:
142 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, FALCON_WD_LEN);
143 out:
144 mb_free_bus_space_tag(wdr.cmd_iot);
145
146 if (result)
147 wdc_matched = 1;
148 return result;
149 }
150
151 void
152 wdc_mb_attach(device_t parent, device_t self, void *aux)
153 {
154 struct wdc_mb_softc *sc = device_private(self);
155 struct wdc_regs *wdr;
156 int i;
157
158 aprint_normal("\n");
159
160 sc->sc_wdcdev.sc_atac.atac_dev = self;
161 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
162 wdr->cmd_iot = wdr->ctl_iot =
163 mb_alloc_bus_space_tag();
164 wdr->cmd_iot->stride = 0;
165 wdr->cmd_iot->wo_1 = 1;
166 wdr->cmd_iot->abs_rms_2 = read_multi_2_swap;
167 wdr->cmd_iot->abs_wms_2 = write_multi_2_swap;
168 if (bus_space_map(wdr->cmd_iot, FALCON_WD_BASE, FALCON_WD_LEN, 0,
169 &wdr->cmd_baseioh)) {
170 aprint_error_dev(self, "couldn't map registers\n");
171 return;
172 }
173 for (i = 0; i < WDC_NREG; i++) {
174 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
175 i * 4, 4, &wdr->cmd_iohs[i]) != 0) {
176 aprint_error_dev(self,
177 "couldn't subregion cmd reg %i\n", i);
178 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
179 FALCON_WD_LEN);
180 return;
181 }
182 }
183
184 if (bus_space_subregion(wdr->cmd_iot,
185 wdr->cmd_baseioh, FALCON_WD_AUX, 4, &wdr->ctl_ioh)) {
186 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, FALCON_WD_LEN);
187 aprint_error_dev(self, "couldn't subregion aux reg\n");
188 return;
189 }
190
191 /*
192 * Play a nasty trick here. Normally we only manipulate the
193 * interrupt *mask*. However to defeat wd_get_parms(), we
194 * disable the interrupts here using the *enable* register.
195 */
196 MFP->mf_ierb &= ~IB_DINT;
197
198 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 |
199 ATAC_CAP_ATA_NOSTREAM;
200 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
201 sc->sc_wdcdev.sc_atac.atac_claim_hw = &claim_hw;
202 sc->sc_wdcdev.sc_atac.atac_free_hw = &free_hw;
203 sc->sc_chanlist[0] = &sc->sc_channel;
204 sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
205 sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
206 sc->sc_wdcdev.wdc_maxdrives = 2;
207 sc->sc_channel.ch_channel = 0;
208 sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
209 sc->sc_channel.ch_queue = ata_queue_alloc(1);
210 wdc_init_shadow_regs(&sc->sc_channel);
211
212 /*
213 * Setup & enable disk related interrupts.
214 */
215 MFP->mf_ierb |= IB_DINT;
216 MFP->mf_iprb = (uint8_t)~IB_DINT;
217 MFP->mf_imrb |= IB_DINT;
218
219 wdcattach(&sc->sc_channel);
220 }
221
222 /*
223 * Hardware locking
224 */
225 static int wd_lock;
226
227 static int
228 claim_hw(struct ata_channel *chp, int maysleep)
229 {
230
231 if (wd_lock != DMA_LOCK_GRANT) {
232 if (wd_lock == DMA_LOCK_REQ) {
233 /*
234 * ST_DMA access is being claimed.
235 */
236 return 0;
237 }
238 if (!st_dmagrab((dma_farg)wdcintr,
239 (dma_farg)(maysleep ? NULL : wdcrestart), chp,
240 &wd_lock, 1))
241 return 0;
242 }
243 return 1;
244 }
245
246 static void
247 free_hw(struct ata_channel *chp)
248 {
249
250 /*
251 * Flush pending interrupts before giving-up lock
252 */
253 MFP->mf_iprb = (uint8_t)~IB_DINT;
254
255 /*
256 * Only free the lock on a Falcon. On the Hades, keep it.
257 */
258 /* if (machineid & ATARI_FALCON) */
259 st_dmafree(chp, &wd_lock);
260 }
261
262 /*
263 * XXX
264 * This piece of uglyness is caused by the fact that the byte lanes of
265 * the data-register are swapped on the atari. This works OK for an IDE
266 * disk, but turns into a nightmare when used on atapi devices.
267 */
268 #define calc_addr(base, off, stride, wm) \
269 ((u_long)(base) + ((off) << (stride)) + (wm))
270
271 static void
272 read_multi_2_swap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
273 uint16_t *a, bus_size_t c)
274 {
275 volatile uint16_t *ba;
276
277 ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2);
278 for (; c; a++, c--)
279 *a = bswap16(*ba);
280 }
281
282 static void
283 write_multi_2_swap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
284 const uint16_t *a, bus_size_t c)
285 {
286 volatile uint16_t *ba;
287
288 ba = (volatile uint16_t *)calc_addr(h, o, t->stride, t->wo_2);
289 for (; c; a++, c--)
290 *ba = bswap16(*a);
291 }
292