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      1 /*	$NetBSD: acia.h,v 1.4 2009/10/20 19:10:11 snj Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Leo Weppelman.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 #ifndef _MACHINE_ACIA_H
     29 #define _MACHINE_ACIA_H
     30 /*
     31  * Atari ST hardware:
     32  * Motorola 6850 Asynchronous Communications Interface Adapter
     33  */
     34 
     35 #define	KBD	(((struct acia *)AD_ACIA))
     36 #define	MDI	(((struct acia *)AD_ACIA) + 1)
     37 
     38 struct acia {
     39 	volatile u_char	acb[4];	/* use only the even bytes */
     40 };
     41 
     42 #define	ac_cs	acb[0]		/* control and status register	*/
     43 #define	ac_da	acb[2]		/* data register		*/
     44 
     45 /* bits in control register: */
     46 /*		0x03		*//* clock divider */
     47 #define A_Q01	0x00		/* don't divide				*/
     48 #define A_Q16	0x01		/* divide by 16				*/
     49 #define A_Q64	0x02		/* divide by 64				*/
     50 #define A_RESET	0x03		/* master reset				*/
     51 /*		0x1C		*//* word select bits */
     52 #define	A_72E	0x00		/* 7 data, 2 stop, parity even		*/
     53 #define	A_72O	0x04		/* 7 data, 2 stop, parity odd		*/
     54 #define	A_71E	0x08		/* 7 data, 1 stop, parity even		*/
     55 #define	A_71O	0x0C		/* 7 data, 1 stop, parity odd		*/
     56 #define	A_82N	0x10		/* 8 data, 2 stop, no parity		*/
     57 #define	A_81N	0x14		/* 8 data, 1 stop, no parity		*/
     58 #define	A_81E	0x18		/* 8 data, 1 stop, parity even		*/
     59 #define	A_81O	0x1C		/* 8 data, 1 stop, parity odd		*/
     60 /*		0x60		*//* RTS Low/High, TXINT en/dis, BREAK	*/
     61 #define	A_TXPOL	0x00		/* RTS Low, TXINT disabled		*/
     62 #define	A_TXINT	0x20		/* RTS Low, TXINT enabled		*/
     63 #define	A_TXOFF	0x40		/* RTS High, TXINT disabled		*/
     64 #define	A_BREAK	0x60		/* RTS Low, TXINT disabled, BREAK	*/
     65 #define	A_RXINT	0x80		/* enable receiver interrupt		*/
     66 
     67 /* bits in status register: */
     68 #define	A_RXRDY	0x01		/* receiver ready			*/
     69 #define	A_TXRDY	0x02		/* transmitter ready			*/
     70 #define	A_CLOST	0x04		/* Carrier Lost				*/
     71 #define	A_CTS	0x08		/* Clear To Send			*/
     72 #define	A_FE	0x10		/* Frame Error				*/
     73 #define	A_OE	0x20		/* Overrun Error			*/
     74 #define	A_PE	0x40		/* Parity Error				*/
     75 #define	A_IRQ	0x80		/* State of IRQ signal			*/
     76 
     77 /* values for the TT: */
     78 #define	KBD_INIT	(A_81N|A_Q64)
     79 #define	MDI_INIT	(A_81N|A_Q16)
     80 
     81 #endif /* _MACHINE_ACIA_H */
     82