acia.h revision 1.1.1.1 1 /* $NetBSD: acia.h,v 1.1.1.1 1995/03/26 07:12:07 leo Exp $ */
2
3 /*
4 * Copyright (c) 1995 Leo Weppelman.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Leo Weppelman.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _MACHINE_ACIA_H
34 #define _MACHINE_ACIA_H
35 /*
36 * Atari ST hardware:
37 * Motorola 6850 Asynchronous Communications Interface Adapter
38 */
39
40 #define KBD (((struct acia *)AD_ACIA))
41 #define MDI (((struct acia *)AD_ACIA) + 1)
42
43 struct acia {
44 volatile char acb[4]; /* use only the even bytes */
45 };
46
47 #define ac_cs acb[0] /* control and status register */
48 #define ac_da acb[2] /* data register */
49
50 /* bits in control register: */
51 /* 0x03 *//* clock divider */
52 #define A_Q01 0x00 /* don't divide */
53 #define A_Q16 0x01 /* divide by 16 */
54 #define A_Q64 0x02 /* divide by 64 */
55 #define A_RESET 0x03 /* master reset */
56 /* 0x1C *//* word select bits */
57 #define A_72E 0x00 /* 7 data, 2 stop, parity even */
58 #define A_72O 0x04 /* 7 data, 2 stop, parity odd */
59 #define A_71E 0x08 /* 7 data, 1 stop, parity even */
60 #define A_71O 0x0C /* 7 data, 1 stop, parity odd */
61 #define A_82N 0x10 /* 8 data, 2 stop, no parity */
62 #define A_81N 0x14 /* 8 data, 1 stop, no parity */
63 #define A_81E 0x18 /* 8 data, 1 stop, parity even */
64 #define A_81O 0x1C /* 8 data, 1 stop, parity odd */
65 /* 0x60 *//* RTS Low/High, TXINT en/dis, BREAK */
66 #define A_TXPOL 0x00 /* RTS Low, TXINT disabled */
67 #define A_TXINT 0x20 /* RTS Low, TXINT enabled */
68 #define A_TXOFF 0x40 /* RTS High, TXINT disabled */
69 #define A_BREAK 0x60 /* RTS Low, TXINT disabled, BREAK */
70 #define A_RXINT 0x80 /* enable receiver interrupt */
71
72 /* bits in status register: */
73 #define A_RXRDY 0x01 /* receiver ready */
74 #define A_TXRDY 0x02 /* transmitter ready */
75 #define A_CLOST 0x04 /* Carrier Lost */
76 #define A_CTS 0x08 /* Clear To Send */
77 #define A_FE 0x10 /* Frame Error */
78 #define A_OE 0x20 /* Overrun Error */
79 #define A_PE 0x40 /* Parity Error */
80 #define A_IRQ 0x80 /* State of IRQ signal */
81
82 /* values for the TT: */
83 #define KBD_INIT (A_81N|A_Q64)
84 #define MDI_INIT (A_81N|A_Q16)
85
86 #endif /* _MACHINE_ACIA_H */
87