pci_machdep.c revision 1.5 
1/*	$NetBSD: pci_machdep.c,v 1.5 2000/04/09 00:13:27 soren Exp $	*/
2
3/*
4 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions, and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/types.h>
29#include <sys/param.h>
30#include <sys/time.h>
31#include <sys/systm.h>
32#include <sys/errno.h>
33#include <sys/device.h>
34
35#include <vm/vm.h>
36#include <vm/vm_kern.h>
37
38#define _COBALT_BUS_DMA_PRIVATE
39#include <machine/bus.h>
40#include <machine/intr.h>
41
42#include <dev/pci/pcivar.h>
43#include <dev/pci/pcireg.h>
44#include <dev/pci/pcidevs.h>
45
46/*
47 * PCI doesn't have any special needs; just use
48 * the generic versions of these functions.
49 */
50struct cobalt_bus_dma_tag pci_bus_dma_tag = {
51	_bus_dmamap_create,
52	_bus_dmamap_destroy,
53	_bus_dmamap_load,
54	_bus_dmamap_load_mbuf,
55	_bus_dmamap_load_uio,
56	_bus_dmamap_load_raw,
57	_bus_dmamap_unload,
58	_bus_dmamap_sync,
59	_bus_dmamem_alloc,
60	_bus_dmamem_free,
61	_bus_dmamem_map,
62	_bus_dmamem_unmap,
63	_bus_dmamem_mmap,
64};
65
66void
67pci_attach_hook(parent, self, pba)
68	struct device *parent, *self;
69	struct pcibus_attach_args *pba;
70{
71	/* XXX */
72
73	return;
74}
75
76int
77pci_bus_maxdevs(pc, busno)
78	pci_chipset_tag_t pc;
79	int busno;
80{
81	return 31;		/* Probing device 31 hangs the system. */
82}
83
84pcitag_t
85pci_make_tag(pc, bus, device, function)
86	pci_chipset_tag_t pc;
87	int bus, device, function;
88{
89	return (bus << 16) | (device << 11) | (function << 8);
90}
91
92void
93pci_decompose_tag(pc, tag, bp, dp, fp)
94	pci_chipset_tag_t pc;
95	pcitag_t tag;
96	int *bp, *dp, *fp;
97{
98	if (bp != NULL)
99		*bp = (tag >> 16) & 0xff;
100	if (dp != NULL)
101		*dp = (tag >> 11) & 0x1f;
102	if (fp != NULL)
103		*fp = (tag >> 8) & 0x07;
104}
105
106#define PCI_CFG_ADDR	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8))
107#define PCI_CFG_DATA	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc))
108
109pcireg_t
110pci_conf_read(pc, tag, reg)
111	pci_chipset_tag_t pc;
112	pcitag_t tag;
113	int reg;
114{
115	pcireg_t data;
116
117	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
118	data = *PCI_CFG_DATA;
119	*PCI_CFG_ADDR = 0;
120
121	return data;
122}
123
124void
125pci_conf_write(pc, tag, reg, data)
126	pci_chipset_tag_t pc;
127	pcitag_t tag;
128	int reg;
129	pcireg_t data;
130{
131	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
132	*PCI_CFG_DATA = data;
133	*PCI_CFG_ADDR = 0;
134
135	return;
136}
137
138int
139pci_intr_map(pc, intrtag, pin, line, ihp)
140	pci_chipset_tag_t pc;
141	pcitag_t intrtag;
142	int pin, line;
143	pci_intr_handle_t *ihp;
144{
145	int bus, dev, func;
146
147	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
148
149	/*
150	 * The interrupt lines of the two Tulips are connected
151	 * directly to the CPU.
152	 */
153
154	if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A)
155		*ihp = 16 + 1;
156	else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A)
157		*ihp = 16 + 2;
158	else
159		*ihp = line;
160
161	return 0;
162}
163
164const char *
165pci_intr_string(pc, ih)
166	pci_chipset_tag_t pc;
167	pci_intr_handle_t ih;
168{
169	static char irqstr[8];
170
171	if (ih >= 16)
172		sprintf(irqstr, "level %d", ih - 16);
173	else
174		sprintf(irqstr, "irq %d", ih);
175
176	return irqstr;
177}
178
179void *
180pci_intr_establish(pc, ih, level, func, arg)
181	pci_chipset_tag_t pc;
182	pci_intr_handle_t ih;
183	int level, (*func)(void *);
184	void *arg;
185{
186	if (ih >= 16)
187		return cpu_intr_establish(ih - 16, level, func, arg);
188	else
189		return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
190}
191
192void
193pci_intr_disestablish(pc, cookie)
194	pci_chipset_tag_t pc;
195	void *cookie;
196{
197	panic("pci_intr_disestablish: not implemented");
198
199	return;
200}
201