pci_machdep.c revision 1.8 
1/*	$NetBSD: pci_machdep.c,v 1.8 2000/06/26 14:20:42 mrg Exp $	*/
2
3/*
4 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions, and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/types.h>
29#include <sys/param.h>
30#include <sys/time.h>
31#include <sys/systm.h>
32#include <sys/errno.h>
33#include <sys/device.h>
34
35#include <vm/vm.h>
36
37#define _COBALT_BUS_DMA_PRIVATE
38#include <machine/bus.h>
39#include <machine/intr.h>
40
41#include <dev/pci/pcivar.h>
42#include <dev/pci/pcireg.h>
43#include <dev/pci/pcidevs.h>
44
45/*
46 * PCI doesn't have any special needs; just use
47 * the generic versions of these functions.
48 */
49struct cobalt_bus_dma_tag pci_bus_dma_tag = {
50	_bus_dmamap_create,
51	_bus_dmamap_destroy,
52	_bus_dmamap_load,
53	_bus_dmamap_load_mbuf,
54	_bus_dmamap_load_uio,
55	_bus_dmamap_load_raw,
56	_bus_dmamap_unload,
57	_bus_dmamap_sync,
58	_bus_dmamem_alloc,
59	_bus_dmamem_free,
60	_bus_dmamem_map,
61	_bus_dmamem_unmap,
62	_bus_dmamem_mmap,
63};
64
65void
66pci_attach_hook(parent, self, pba)
67	struct device *parent, *self;
68	struct pcibus_attach_args *pba;
69{
70	/* XXX */
71
72	return;
73}
74
75int
76pci_bus_maxdevs(pc, busno)
77	pci_chipset_tag_t pc;
78	int busno;
79{
80	return 32;
81}
82
83pcitag_t
84pci_make_tag(pc, bus, device, function)
85	pci_chipset_tag_t pc;
86	int bus, device, function;
87{
88	return (bus << 16) | (device << 11) | (function << 8);
89}
90
91void
92pci_decompose_tag(pc, tag, bp, dp, fp)
93	pci_chipset_tag_t pc;
94	pcitag_t tag;
95	int *bp, *dp, *fp;
96{
97	if (bp != NULL)
98		*bp = (tag >> 16) & 0xff;
99	if (dp != NULL)
100		*dp = (tag >> 11) & 0x1f;
101	if (fp != NULL)
102		*fp = (tag >> 8) & 0x07;
103}
104
105#define PCI_CFG_ADDR	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8))
106#define PCI_CFG_DATA	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc))
107
108pcireg_t
109pci_conf_read(pc, tag, reg)
110	pci_chipset_tag_t pc;
111	pcitag_t tag;
112	int reg;
113{
114	pcireg_t data;
115	int bus, dev, func;
116
117	pci_decompose_tag(pc, tag, &bus, &dev, &func);
118
119	/*
120	 * 2700 hardware wedges on accesses to device 6.
121	 */
122	if (bus == 0 && dev == 6)
123		return 0;
124	/*
125	 * 2800 hardware wedges on accesses to device 31.
126	 */
127	if (bus == 0 && dev == 31)
128		return 0;
129
130	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
131	data = *PCI_CFG_DATA;
132	*PCI_CFG_ADDR = 0;
133
134	return data;
135}
136
137void
138pci_conf_write(pc, tag, reg, data)
139	pci_chipset_tag_t pc;
140	pcitag_t tag;
141	int reg;
142	pcireg_t data;
143{
144	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
145	*PCI_CFG_DATA = data;
146	*PCI_CFG_ADDR = 0;
147
148	return;
149}
150
151int
152pci_intr_map(pc, intrtag, pin, line, ihp)
153	pci_chipset_tag_t pc;
154	pcitag_t intrtag;
155	int pin, line;
156	pci_intr_handle_t *ihp;
157{
158	int bus, dev, func;
159
160	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
161
162	/*
163	 * The interrupt lines of the two Tulips are connected
164	 * directly to the CPU.
165	 */
166
167	if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A)
168		*ihp = 16 + 1;
169	else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A)
170		*ihp = 16 + 2;
171	else
172		*ihp = line;
173
174	return 0;
175}
176
177const char *
178pci_intr_string(pc, ih)
179	pci_chipset_tag_t pc;
180	pci_intr_handle_t ih;
181{
182	static char irqstr[8];
183
184	if (ih >= 16)
185		sprintf(irqstr, "level %d", ih - 16);
186	else
187		sprintf(irqstr, "irq %d", ih);
188
189	return irqstr;
190}
191
192const struct evcnt *
193pci_intr_evcnt(pc, ih)
194	pci_chipset_tag_t pc;
195	pci_intr_handle_t ih;
196{
197
198	/* XXX for now, no evcnt parent reported */
199	return NULL;
200}
201
202void *
203pci_intr_establish(pc, ih, level, func, arg)
204	pci_chipset_tag_t pc;
205	pci_intr_handle_t ih;
206	int level, (*func)(void *);
207	void *arg;
208{
209	if (ih >= 16)
210		return cpu_intr_establish(ih - 16, level, func, arg);
211	else
212		return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
213}
214
215void
216pci_intr_disestablish(pc, cookie)
217	pci_chipset_tag_t pc;
218	void *cookie;
219{
220	panic("pci_intr_disestablish: not implemented");
221
222	return;
223}
224