pci_machdep.c revision 1.9 
1/*	$NetBSD: pci_machdep.c,v 1.9 2000/06/27 18:10:05 soren Exp $	*/
2
3/*
4 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions, and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/types.h>
29#include <sys/param.h>
30#include <sys/time.h>
31#include <sys/systm.h>
32#include <sys/errno.h>
33#include <sys/device.h>
34
35#define _COBALT_BUS_DMA_PRIVATE
36#include <machine/bus.h>
37#include <machine/intr.h>
38
39#include <dev/pci/pcivar.h>
40#include <dev/pci/pcireg.h>
41#include <dev/pci/pcidevs.h>
42
43/*
44 * PCI doesn't have any special needs; just use
45 * the generic versions of these functions.
46 */
47struct cobalt_bus_dma_tag pci_bus_dma_tag = {
48	_bus_dmamap_create,
49	_bus_dmamap_destroy,
50	_bus_dmamap_load,
51	_bus_dmamap_load_mbuf,
52	_bus_dmamap_load_uio,
53	_bus_dmamap_load_raw,
54	_bus_dmamap_unload,
55	_bus_dmamap_sync,
56	_bus_dmamem_alloc,
57	_bus_dmamem_free,
58	_bus_dmamem_map,
59	_bus_dmamem_unmap,
60	_bus_dmamem_mmap,
61};
62
63void
64pci_attach_hook(parent, self, pba)
65	struct device *parent, *self;
66	struct pcibus_attach_args *pba;
67{
68	/* XXX */
69
70	return;
71}
72
73int
74pci_bus_maxdevs(pc, busno)
75	pci_chipset_tag_t pc;
76	int busno;
77{
78	return 32;
79}
80
81pcitag_t
82pci_make_tag(pc, bus, device, function)
83	pci_chipset_tag_t pc;
84	int bus, device, function;
85{
86	return (bus << 16) | (device << 11) | (function << 8);
87}
88
89void
90pci_decompose_tag(pc, tag, bp, dp, fp)
91	pci_chipset_tag_t pc;
92	pcitag_t tag;
93	int *bp, *dp, *fp;
94{
95	if (bp != NULL)
96		*bp = (tag >> 16) & 0xff;
97	if (dp != NULL)
98		*dp = (tag >> 11) & 0x1f;
99	if (fp != NULL)
100		*fp = (tag >> 8) & 0x07;
101}
102
103#define PCI_CFG_ADDR	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8))
104#define PCI_CFG_DATA	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc))
105
106pcireg_t
107pci_conf_read(pc, tag, reg)
108	pci_chipset_tag_t pc;
109	pcitag_t tag;
110	int reg;
111{
112	pcireg_t data;
113	int bus, dev, func;
114
115	pci_decompose_tag(pc, tag, &bus, &dev, &func);
116
117	/*
118	 * 2700 hardware wedges on accesses to device 6.
119	 */
120	if (bus == 0 && dev == 6)
121		return 0;
122	/*
123	 * 2800 hardware wedges on accesses to device 31.
124	 */
125	if (bus == 0 && dev == 31)
126		return 0;
127
128	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
129	data = *PCI_CFG_DATA;
130	*PCI_CFG_ADDR = 0;
131
132	return data;
133}
134
135void
136pci_conf_write(pc, tag, reg, data)
137	pci_chipset_tag_t pc;
138	pcitag_t tag;
139	int reg;
140	pcireg_t data;
141{
142	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
143	*PCI_CFG_DATA = data;
144	*PCI_CFG_ADDR = 0;
145
146	return;
147}
148
149int
150pci_intr_map(pc, intrtag, pin, line, ihp)
151	pci_chipset_tag_t pc;
152	pcitag_t intrtag;
153	int pin, line;
154	pci_intr_handle_t *ihp;
155{
156	int bus, dev, func;
157
158	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
159
160	/*
161	 * The interrupt lines of the two Tulips are connected
162	 * directly to the CPU.
163	 */
164
165	if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A)
166		*ihp = 16 + 1;
167	else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A)
168		*ihp = 16 + 2;
169	else
170		*ihp = line;
171
172	return 0;
173}
174
175const char *
176pci_intr_string(pc, ih)
177	pci_chipset_tag_t pc;
178	pci_intr_handle_t ih;
179{
180	static char irqstr[8];
181
182	if (ih >= 16)
183		sprintf(irqstr, "level %d", ih - 16);
184	else
185		sprintf(irqstr, "irq %d", ih);
186
187	return irqstr;
188}
189
190const struct evcnt *
191pci_intr_evcnt(pc, ih)
192	pci_chipset_tag_t pc;
193	pci_intr_handle_t ih;
194{
195
196	/* XXX for now, no evcnt parent reported */
197	return NULL;
198}
199
200void *
201pci_intr_establish(pc, ih, level, func, arg)
202	pci_chipset_tag_t pc;
203	pci_intr_handle_t ih;
204	int level, (*func)(void *);
205	void *arg;
206{
207	if (ih >= 16)
208		return cpu_intr_establish(ih - 16, level, func, arg);
209	else
210		return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
211}
212
213void
214pci_intr_disestablish(pc, cookie)
215	pci_chipset_tag_t pc;
216	void *cookie;
217{
218	panic("pci_intr_disestablish: not implemented");
219
220	return;
221}
222